GS70328SGJ15T [GSI]

Standard SRAM, 32KX8, 15ns, CMOS, PDSO28, 0.300 INCH, SOJ-28;


型号：	GS70328SGJ15T
厂家：	GSI TECHNOLOGY
描述：	Standard SRAM, 32KX8, 15ns, CMOS, PDSO28, 0.300 INCH, SOJ-28 静态存储器光电二极管
文件：	总11页 (文件大小：527K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

GS70328SJ/TS

7, 8, 10, 12, 15 ns

SOJ, TSOP

Commercial Temp

Industrial Temp

32K x 8

256Kb Asynchronous SRAM

3.3 V V

Corner V and V

Features

• Fast access time: 7, 8, 10, 12, 15 ns

• 75/65/50/50/50 mA at max cycle rate

• Single 3.3 V ± 0.3 V power supply

• All inputs and outputs are TTL-compatible

• Fully static operation

Pin Descriptions

Symbol

Description

Address input

A0–A14

DQ1–DQ8

• Industrial Temperature Option: –40° to 85°C

• Package line up

Data input/output

Chip enable input

Write enable input

Output enable input

+3.3 V power supply

SJ: 300 mil, 28-pin SOJ package

TS: 8 mm x 13.4 mm, 28-pin TSOP Type I package

Description

The GS70328 is a high speed CMOS static RAM organized as

32,763 words by 8 bits. Static design eliminates the need for

external clocks or timing strobes. The GS70328 operates on a

single 3.3 V power supply, and all inputs and outputs are TTL-

compatible. The GS70328 is available in 300 mil, 28-pin SOJ

Ground

No connect

and 8 x 13.4 mm , 28-pin TSOP Type-I packages.

Pin Configuration

Top view

A14

A12

V_DD

A13

A11

A10

A13

V_DD

DQ8

DQ7

DQ6

DQ5

DQ4

A11

28-pin

28- pin

300 mil

A10

A14

A12

V_SS

DQ3

DQ2

DQ1

8 x 13.4 TSOP I

SOJ

DQ8

DQ7

DQ6

DQ5

DQ4

DQ1

DQ2

DQ3

V_SS

Rev: 1.11a 2/2006

1/11

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

GS70328SJ/TS

Block Diagram

Row

Decoder

Memory Array

Address

Input

Buffer

Column

Decoder

A14

I/O Buffer

Control

DQ8

DQ1

Truth Table

V_DDCurrent

DQ1 to DQ8

Not Selected

Read

ISB1, ISB2

Write

IDD

High Z

X: “H” or “L”

Absolute Maximum Ratings

Parameter

Symbol

Rating

Unit

Supply Voltage

VDD

–0.5 to +4.6

–0.5 to V + 0.5

Input Voltage

VIN

(≤ 4.6 V max.)

–0.5 to V + 0.5

Output Voltage

VOUT

(≤ 4.6 V max.)

Allowable power dissipation

Storage temperature

0.7

TSTG

–55 to 150

Note:

Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation shall be restricted to Recommended

Operating Conditions. Exposure to higher than recommended voltages for extended periods of time could affect device reliability.

Rev: 1.11a 2/2006

2/11

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

GS70328SJ/TS

Recommended Operating Conditions

Parameter

Supply Voltage for -7/8/10/12

Input High Voltage

Symbol

Minimum

3.0

Typical

Maximum

Unit

3.3

—

3.6

+ 0.3

VIH

VIL

2.0

Input Low Voltage

–0.3

—

0.8

Ambient Temperature,

Commercial Range

TAc

TAI

—

Ambient Temperature,

Industrial Range

–40

Notes:

1. Input overshoot voltage should be less than V +2 V and not exceed 20 ns.

2. Input undershoot voltage should be greater than –2 V and not exceed 20 ns.

Capacitance

Parameter

Input Capacitance

Output Capacitance

Symbol

Test Condition

Maximum

Unit

= 0 V

OUT

Notes:

1. Tested at TA = 25°C, f = 1 MHz

2. These parameters are sampled and are not 100% tested.

DC I/O Pin Characteristics

Parameter

Symbol

Test Conditions

Min

Max

= 0 to V

Input Leakage Current

IIL

–1uA

1uA

Output High Z

= 0 to V

Output Leakage Current

ILO

–1uA

1uA

OUT

Output High Voltage

Output Low Voltage

VOH

VOL

IOH = –4 mA

ILO = +4 mA

2.4 V

—

0.4 V

Rev: 1.11a 2/2006

3/11

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

GS70328SJ/TS

Power Supply Currents

0 to 70°C

-40 to 85°C

Parameter Symbol Test Conditions

7 ns 8 ns 10 ns 12 ns 15 ns 7 ns 8 ns 10 ns 12 ns 15 ns

CE ≤ VIL

Operating

Supply

Current

All other inputs

≥ VIH or ≤ VIL

Min. cycle time

IOUT = 0 mA

75 mA 65 mA 50 mA 50 mA 50 mA 80 mA 70 mA 55 mA 55 mA 55 mA

IDD

CE ≥ VIH

Standby

Current

All other inputs

≥ VIH or ≤VIL

Min. cycle time

35 mA 30 mA 25 mA 25 mA 25 mA 40 mA 35 mA 30 mA 30 mA 30 mA

ISB1

ISB2

CE ≥ V – 0.2 V

Standby

Current

All other inputs

1 mA

2 mA

≥ V – 0.2 V or

≤ 0.2 V

AC Test Conditions

Output Load 1

Parameter

Input high level

Input low level

Conditions

VIH = 2.4 V

V^IL= 0.4 V

tr = 1 V/ns

tf = 1 V/ns

1.4 V

30pF

50Ω

Input rise time

VT = 1.4 V

Input fall time

Input reference level

Output reference level

Output load

Output Load 2

1.4 V

3.3 V

Fig. 1& 2

589Ω

434Ω

Notes:

1. Include scope and jig capacitance

5pF

2. Test conditions as specified with output loading as shown in Fig. 1

unless otherwise noted

3. Output load 2 for t^LZ, tHZ, tOLZ and tOHZ

Rev: 1.11a 2/2006

4/11

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

GS70328SJ/TS

AC Characteristics

Read Cycle

-7

-8

-10

-12

-15

Parameter

Symbol

Unit

Min Max Min Max Min Max Min Max Min Max

Read cycle time

tRC

tAA

tAC

tOE

tOH

—

Address access time

Chip enable access time (CE)

Output enable to output valid (OE)

Output hold from address change

Chip enable to output in low Z (CE)

3.5

—

tLZ

Output enable to output in low Z (OE)

Chip disable to output in High Z (CE)

Output disable to output in High Z (OE)

—

3.5

—

tOLZ

—

tHZ

3.5

tOHZ

* These parameters are sampled and are not 100% tested

Read Cycle 1: CE = OE = V , WE = V

tRC

Address

Data Out

tAA

tOH

Previous Data

Data valid

Rev: 1.11a 2/2006

5/11

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

GS70328SJ/TS

Read Cycle 2: WE = V

tRC

Address

tAA

tAC

tHZ

tLZ

tOE

tOHZ

tOLZ

DATA VALID

Data Out

High impedance

Write Cycle

-7

-8

-10

-12

-15

Parameter

Symbol

Unit

Min Max Min Max Min Max

Min

Max

—

Min

Max

—

Write cycle time

tWC

tAW

tCW

tDW

tDH

—

5.5

—

Address valid to end of write

Chip enable to end of write

Data set up time

3.5

Data hold time

Write pulse width

tWP

tAS

5.5

Address set up time

Write recovery time (WE)

Write recovery time (CE)

Output Low Z from end of write

tWR

tWR1

tWLZ

Write to output in High Z

—

3.5

—

tWHZ

* These parameters are sampled and are not 100% tested

Rev: 1.11a 2/2006

6/11

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

GS70328SJ/TS

Write Cycle 1: WE control

tWC

Address

tAW

tWR

tCW

tAS

tWP

tDW

tDH

DATA VALID

Data In

tWHZ

tWLZ

Data Out

HIGH IMPEDANCE

Write Cycle 2: CE control

tWC

Address

tAW

tWR1

tAS

tCW

UB, LB

tWP

tDW

tDH

DATA VALID

Data In

Data Out

HIGH IMPEDANCE

Rev: 1.11a 2/2006

7/11

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

GS70328SJ/TS

28-Pin SOJ, 300 mil

Dimension in inch

Dimension in mm

Symbol

min

nom

—

max

min

—

nom

—

max

3.76

—

0.148

—

0.025

—

0.64

—

0.095 0.100 0.105 2.41

0.015 0.020 0.38

2.54

—

2.67

0.51

0.81

0.30

—

0.026 0.028 0.032 0.66

0.008 0.010 0.012 0.20

0.71

0.25

0.705 0.71 0.715 17.91 18.03 18.16

0.295 0.300 0.305 7.49

0.05

7.62

1.27

8.51

7.75

—

0.330 0.335 0.340 8.38

0.255 0.265 0.275 6.48

8.64

6.73 6.985

Detail A

0.082

—

2.08

—

0.004

0.10

Notes:

1. Dimension D& E do not include interlead flash

2. Dimension B1 does not include dambar protrusion/intrusion

3. Controlling dimension: inches

Rev: 1.11a 2/2006

8/11

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

GS70328SJ/TS

28-Pin TSOP-I, 8 mm x 13.4 mm

Dimension in inch

Dimension in mm

Symbol

min

nom

—

max

0.047

min

nom

—

max

1.20

0.15

1.05

0.27

—

0.002

—

0.006 0.05

—

0.035 0.040 0.041 0.90

0.007 0.008 0.011 0.17

1.00

0.20

11.8

13.4

0.15

8.00

0.55

0.60

0.80

—

0.465

.528

—

0.004 0.006 0.008 0.10

0.21

—

0.315

0.022

—

0.020 0.024 0.028 0.50

0.024 0.032 0.040 0.60

0.70

1.00

0.08

—

0.003

—

Notes:

1. Dimension D& E do not include interlead flash

2. Dimension B1 does not include dambar protrusion/intrusion

3. Controlling dimension: inches

Detail A

4. Profile tolerance zones for D and E do not include mold

protrusion. Allowable mold protrusion on E is 0.15 mm per side

and on D is 0.25 mm per side.

Rev: 1.11a 2/2006

9/11

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

GS70328SJ/TS

Ordering Information

Package

Access Time

Temp. Range

Status

Part Number

GS70328SJ-7

GS70328SJ-8

GS70328SJ-10

GS70328SJ-12

GS70328SJ-15

GS70328SJ-7I

GS70328SJ-8I

GS70328SJ-10I

GS70328SJ-12I

GS70328SJ-15I

GS70328TS-7

300-mil SOJ

7 ns

8 ns

Commercial

Industrial

10 ns

12 ns

15 ns

7 ns

8 ns

Industrial

10 ns

12 ns

15 ns

7 ns

Industrial

Commercial

TSOP-I 8 x 13.4 mm

GS70328TS-8

GS70328TS-10

GS70328TS-12

GS70328TS-15

GS70328TS-7I

GS70328TS-8I

GS70328TS-10I

GS70328TS-12I

8 ns

10 ns

12 ns

15 ns

7 ns

Commercial

Industrial

8 ns

Industrial

10 ns

12 ns

15 ns

Industrial

GS70328TS-15I

Industrial

Customers requiring delivery in Tape and Reel should add the character “T” to the end of the part number. For example: GS70328TP-8T

Rev: 1.11a 2/2006

10/11

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

GS70328SJ/TS

Revision History

Rev. Code: Old;

Types of Changes

Format or Content

Page #/Revisions/Reason

New

• Added 12ns speed bin information to 70328 datasheet.

• GSI Logo

1.03 8/1999;

1.04 11/1999

Content

GS70328Rev1.04 12/1999KRev

1.05 2/2000L

Format/Content

• Nominal value for H on the TSOP-I 28-pin package changed

Rev 1.05 2/2000L; Rev1.06 6/2000

Rev1.06; Rev1.07

Content

Format/Content

Content

to 13.4

• Updated format to conform to Tech Pubs standards

• Corrected errors in both case diagrams

• Added 12 ns reference to Parameter column in

Recommended Operating Conditions table on page 3

70328_r1_07; 70328_r1_08

• Added 15 ns references to entire document

• Removed 6 ns speed bin from entire document

70328_r1_08; 70328_r1_09

70328_r1_09; 70328_r1_10

Content

• Updated format

• (rev. 1.11a): Removed extra material from TSOP-I mechanical

70328_r1_10; 70328_r1_11

Format

Rev: 1.11a 2/2006

11/11

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

GS70328SGJ15T [GSI]

相关型号：

SI9130DB

SI9135LG-T1

SI9135LG-T1-E3

SI9135_11

SI9136_11

SI9130CG-T1-E3

SI9130LG-T1-E3

SI9130_11

SI9137

SI9137DB

SI9137LG

SI9122E