GS70328SGJ6T [GSI]
Standard SRAM, 32KX8, 6ns, CMOS, PDSO28, 0.300 INCH, SOJ-28;
| 型号： | GS70328SGJ6T |
| 厂家： | 
GSI TECHNOLOGY |
| 描述： | Standard SRAM, 32KX8, 6ns, CMOS, PDSO28, 0.300 INCH, SOJ-28 静态存储器 光电二极管 |
| 文件： | 总12页 (文件大小：421K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
GS70328SJ/TS
6, 7, 8, 10, 12 ns
SOJ, TSOP
Commercial Temp
Industrial Temp
32K x 8
256Kb Asynchronous SRAM
3.3 V V
DD
Corner V and V
DD
SS
Features
• Fast access time: 6, 7, 8, 10, 12 ns
• 90/75/65/50/50 mA at max cycle rate
• Single 3.3 V ± 0.3 V power supply
• All inputs and outputs are TTL-compatible
• Fully static operation
Pin Descriptions
Symbol
A0–A14
DQ1–DQ8
CE
Description
Address input
• Industrial Temperature Option: –40° to 85°C
• Package line up
Data input/output
Chip enable input
Write enable input
Output enable input
+3.3 V power supply
SJ: 300 mil, 28-pin SOJ package
TS: 8 mm x 13.4 mm, 28-pin TSOP Type I package
WE
OE
Description
VDD
The GS70328 is a high speed CMOS static RAM organized as
32,763 words by 8 bits. Static design eliminates the need for
external clocks or timing strobes. The GS70328 operates on a
single 3.3 V power supply, and all inputs and outputs are TTL-
compatible. The GS70328 is available in 300 mil, 28-pin SOJ
and 8 x 13.4 mm2, 28-pin TSOP Type-I packages.
VSS
NC
Ground
No connect
Pin Configuration
Top view
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
1
VDD
WE
A13
A8
2
3
OE
A11
1
2
3
4
5
6
7
8
4
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A10
CE
5
A9
A9
A8
A13
WE
VDD
DQ8
DQ7
DQ6
DQ5
DQ4
6
A11
OE
28-pin
7
28- pin
300 mil
8
A10
CE
A14
A12
A7
A6
VSS
DQ3
DQ2
DQ1
8 x 13.4 TSOP I
9
SOJ
9
10
11
12
13
14
10
11
12
13
14
DQ8
DQ7
DQ6
DQ5
DQ4
A5
A4
A3
A0
A1
A2
DQ1
DQ2
DQ3
VSS
Rev: 1.08 12/2000
1/12
© 1999, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS70328SJ/TS
Block Diagram
A0
Row
Decoder
Memory Array
Address
Input
Buffer
Column
Decoder
A14
CE
WE
OE
I/O Buffer
Control
DQ8
DQ1
Truth Table
VDD Current
CE
H
OE
WE
X
DQ1 to DQ8
X
L
Not Selected
Read
ISB1, ISB2
L
H
L
X
H
L
Write
IDD
L
H
High Z
Note: X: “H” or “L”
Absolute Maximum Ratings
Parameter
Symbol
Rating
Unit
Supply Voltage
VDD
–0.5 to +4.6
V
–0.5 to VDD + 0.5
(£ 4.6 V max.)
Input Voltage
VIN
V
V
–0.5 to VDD + 0.5
(£ 4.6 V max.)
Output Voltage
VOUT
Allowable power dissipation
Storage temperature
PD
0.7
W
oC
TSTG
–55 to 150
Note:
Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation shall be restricted to Recommended
Operating Conditions. Exposure to higher than recommended voltages for extended periods of time could affect device reliability.
Rev: 1.08 12/2000
2/12
© 1999, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS70328SJ/TS
Recommended Operating Conditions
Parameter
Supply Voltage for -7/8/10/12
Supply Voltage for -6
Input High Voltage
Symbol
Minimum
3.0
Typical
Maximum
3.6
Unit
VDD
VDD
3.3
3.3
—
V
V
V
V
3.135
2.0
3.6
VDD + 0.3
0.8
VIH
VIL
Input Low Voltage
–0.3
—
Ambient Temperature,
Commercial Range
oC
oC
TAc
TAI
0
—
—
70
85
Ambient Temperature,
Industrial Range
–40
Notes:
1. Input overshoot voltage should be less than VDD +2 V and not exceed 20 ns.
2. Input undershoot voltage should be greater than –2 V and not exceed 20 ns.
Capacitance
Parameter
Input Capacitance
Output Capacitance
Symbol
CIN
Test Condition
Maximum
Unit
pF
VIN = 0 V
5
7
COUT
VOUT = 0 V
pF
Notes:
1. Tested at TA = 25°C, f = 1 MHz
2. These parameters are sampled and are not 100% tested.
DC I/O Pin Characteristics
Parameter
Symbol
Test Conditions
Min
Max
VIN = 0 to VDD
Input Leakage Current
IIL
–1uA
1uA
Output High Z
VOUT = 0 to VDD
Output Leakage Current
ILO
–1uA
1uA
Output High Voltage
Output Low Voltage
VOH
VOL
IOH = –4 mA
ILO = +4 mA
2.4 V
—
—
0.4 V
Rev: 1.08 12/2000
3/12
© 1999, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS70328SJ/TS
Power Supply Currents
0 to 70°C
-40 to 85°C
Parameter Symbol Test Conditions
6 ns 7 ns 8 ns 10 ns 12 ns 6 ns 7 ns 8 ns 10 ns 12 ns
CE £ VIL
Operating
Supply
Current
All other inputs
³ VIH or £ VIL
Min. cycle time
IOUT = 0 mA
IDD
90 mA 75 mA 65 mA 50 mA 50 mA 95 mA 80 mA 70 mA 55 mA 55 mA
CE ³ VIH
Standby
Current
All other inputs
³ VIH or £VIL
Min. cycle time
ISB1
ISB2
45 mA 35 mA 30 mA 25 mA 25 mA 50 mA 40 mA 35 mA 30 mA 30 mA
CE ³ VDD – 0.2 V
All other inputs
³ VDD – 0.2 V or
Standby
Current
1 mA
2 mA
£ 0.2 V
AC Test Conditions
Output Load 1
Parameter
Input high level
Input low level
Conditions
VIH = 2.4 V
VIL = 0.4 V
tr = 1 V/ns
tf = 1 V/ns
1.4 V
DQ
30pF1
50W
Input rise time
VT = 1.4 V
Input fall time
Input reference level
Output reference level
Output load
Output Load 2
1.4 V
3.3 V
Fig. 1& 2
589W
434W
DQ
Notes:
5pF1
1. Include scope and jig capacitance
2. Test conditions as specified with output loading as shown in Fig. 1
unless otherwise noted
3. Output load 2 for tLZ, tHZ, tOLZ and tOHZ
Rev: 1.08 12/2000
4/12
© 1999, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS70328SJ/TS
AC Characteristics
Read Cycle
-6
-7
-8
-10
-12
Parameter
Symbol
Unit
Min Max Min Max Min Max Min Max Min Max
Read cycle time
tRC
tAA
tAC
tOE
tOH
6
—
—
—
2
—
6
7
—
—
—
2
—
7
8
—
—
—
2
—
8
10
—
—
—
2
—
10
10
5
12
—
—
—
3
—
12
12
6
ns
ns
ns
ns
ns
ns
Address access time
Chip enable access time (CE)
Output enable to output valid (OE)
Output hold from address change
Chip enable to output in low Z (CE)
6
7
8
3
3.5
—
—
4
—
—
—
—
—
—
—
—
*
2
2
2
2
3
tLZ
*
Output enable to output in low Z (OE)
Chip disable to output in High Z (CE)
Output disable to output in High Z (OE)
0
—
3
0
—
3.5
3
0
—
4
0
—
5
0
—
6
ns
ns
ns
tOLZ
*
—
—
—
—
—
—
—
—
—
—
tHZ
*
3
3.5
4
5
tOHZ
* These parameters are sampled and are not 100% tested
Rev: 1.08 12/2000
5/12
© 1999, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS70328SJ/TS
Read Cycle 1: CE = OE = V , WE = V
IL
IH
tRC
Address
Data Out
tAA
tOH
Previous Data
Data valid
Read Cycle 2: WE = V
IH
tRC
Address
CE
tAA
tAC
tHZ
tLZ
OE
tOE
tOHZ
tOLZ
DATA VALID
Data Out
High impedance
Rev: 1.08 12/2000
6/12
© 1999, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS70328SJ/TS
Write Cycle
-6
-7
-8
-10
-12
Parameter
Symbol
Unit
Min Max Min Max Min Max Min Max Min Max
Write cycle time
Address valid to end of write
Chip enable to end of write
Data set up time
tWC
tAW
tCW
tDW
tDH
6
4.5
4.5
3
—
—
—
—
—
—
—
—
—
—
7
5
—
—
—
—
—
—
—
—
—
—
8
5.5
5.5
4
—
—
—
—
—
—
—
—
—
—
10
7
—
—
—
—
—
—
—
—
—
—
12
10
10
7
—
—
—
—
—
—
—
—
—
—
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
5
7
3.5
0
5
Data hold time
0
0
0
0
Write pulse width
tWP
tAS
4.5
0
5
5.5
0
7
10
0
Address set up time
0
0
Write recovery time (WE)
Write recovery time (CE)
Output Low Z from end of write
tWR
tWR1
0
0
0
0
0
0
0
0
0
0
tWLZ*
tWHZ*
2
2
2
2
3
Write to output in High Z
—
3
—
3
—
3.5
—
4
—
5
ns
* These parameters are sampled and are not 100% tested
Rev: 1.08 12/2000
7/12
© 1999, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS70328SJ/TS
Write Cycle 1: WE control
tWC
Address
tAW
tWR
OE
tCW
CE
tAS
tWP
WE
tDW
tDH
DATA VALID
Data In
Data Out
tWHZ
tWLZ
HIGH IMPEDANCE
Write Cycle 2: CE control
tWC
Address
OE
tAW
tWR1
tAS
tCW
CE
t
BW
UB, LB
WE
tWP
tDW
tDH
DATA VALID
Data In
Data Out
HIGH IMPEDANCE
Rev: 1.08 12/2000
8/12
© 1999, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS70328SJ/TS
28-Pin SOJ, 300 mil
Dimension in inch
Dimension in mm
Symbol
min
nom
—
max
min
—
nom
—
max
3.76
—
L
A
A1
A2
B
—
0.148
—
D
c
0.025
—
0.64
—
0.095 0.100 0.105 2.41
0.015 0.020 0.38
2.54
—
2.67
0.51
0.81
0.30
—
B1
c
0.026 0.028 0.032 0.66
0.008 0.010 0.012 0.20
0.71
0.25
1
e
A
0.705 0.71 0.715 17.91 18.03 18.16
D
E
0.295 0.300 0.305 7.49
0.05
7.62
1.27
8.51
7.75
—
e
—
—
—
B
B1
y
HE
GE
L
0.330 0.335 0.340 8.38
0.255 0.265 0.275 6.48
8.64
Q
6.73 6.985
Detail A
0.082
—
—
—
—
—
2.08
—
—
—
—
—
y
0.004
0.10
0o
10o
0o
10o
Q
Notes:
1. Dimension D& E do not include interlead flash
2. Dimension B1 does not include dambar protrusion/intrusion
3. Controlling dimension: inches
Rev: 1.08 12/2000
9/12
© 1999, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS70328SJ/TS
28-Pin TSOP-I, 8 mm x 13.4 mm
Dimension in inch
Dimension in mm
E
Symbol
c
min
nom
—
max
0.047
min
nom
—
max
1.20
0.15
1.05
0.27
—
28
A
A1
A2
B
—
—
0.002
—
0.006 0.05
—
0.035 0.040 0.041 0.90
0.007 0.008 0.011 0.17
1.00
0.20
11.8
13.4
0.15
8.00
0.55
0.60
0.80
—
D
—
—
0.465
.528
—
—
—
—
HD
—
A
c
0.004 0.006 0.008 0.10
0.21
—
E
—
—
0.315
0.022
—
—
—
—
e
—
1
L1
L
L1
0.020 0.024 0.028 0.50
0.024 0.032 0.040 0.60
0.70
1.00
0.08
e
B
Q
y
—
0o
—
—
0.003
5o
—
0o
5o
Q
—
y
Notes:
Q
1. Dimension D& E do not include interlead flash
2. Dimension B1 does not include dambar protrusion/intrusion
3. Controlling dimension: inches
Detail A
4. Profile tolerance zones for D and E do not include mold
protrusion. Allowable mold protrusion on E is 0.15 mm per side
and on D is 0.25 mm per side.
Rev: 1.08 12/2000
10/12
© 1999, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS70328SJ/TS
Ordering Information
*
Package
Access Time
Temp. Range
Status
Part Number
GS70328SJ-6
GS70328SJ-7
GS70328SJ-8
GS70328SJ-10
GS70328SJ-12
GS70328SJ-6I
GS70328SJ-7I
GS70328SJ-8I
GS70328SJ-10I
GS70328SJ-12I
GS70328TS-6
300-mil SOJ
300-mil SOJ
300-mil SOJ
300-mil SOJ
300-mil SOJ
300-mil SOJ
300-mil SOJ
300-mil SOJ
300-mil SOJ
300-mil SOJ
6 ns
7 ns
Commercial
Commercial
Commercial
Commercial
Commercial
Industrial
8 ns
10 ns
12 ns
6 ns
7 ns
Industrial
8 ns
Industrial
10 ns
12 ns
6 ns
Industrial
Industrial
TSOP-I 8 x 13.4 mm2
TSOP-I 8 x 13.4 mm2
TSOP-I 8 x 13.4 mm2
TSOP-I 8 x 13.4 mm2
TSOP-I 8 x 13.4 mm2
TSOP-I 8 x 13.4 mm2
TSOP-I 8 x 13.4 mm2
TSOP-I 8 x 13.4 mm2
TSOP-I 8 x 13.4 mm2
TSOP-I 8 x 13.4 mm2
Commercial
GS70328TS-7
GS70328TS-8
GS70328TS-10
GS70328TS-12
GS70328TS-6I
GS70328TS-7I
GS70328TS-8I
GS70328TS-10I
GS70328TS-12I
7 ns
8 ns
Commercial
Commercial
Commercial
Commercial
Industrial
10 ns
12 ns
6 ns
7 ns
Industrial
8 ns
Industrial
10 ns
12 ns
Industrial
Industrial
* Customers requiring delivery in Tape and Reel should add the character “T” to the end of the part number. For example: GS70328TP-8T
Rev: 1.08 12/2000
11/12
© 1999, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS70328SJ/TS
Revision History
Rev. Code: Old;
New
Types of Changes
Format or Content
Page #/Revisions/Reason
• Added 12ns speed bin information to 70328 datasheet.
• GSI Logo
1.03 8/1999;
1.04 11/1999
Content
GS70328Rev1.04 12/1999KRev
1.05 2/2000L
Format/Content
• Nominal value for HD on the TSOP-I 28-pin package changed
to 13.4
Rev 1.05 2/2000L; Rev1.06 6/2000
Rev1.06; Rev1.07
Content
Format/Content
Content
• Updated format to conform to Tech Pubs standards
• Corrected errors in both case diagrams
• Added 12 ns reference to Parameter column in
Recommended Operating Conditions table on page 3
70328_r1_07; 70328_r1_08
Rev: 1.08 12/2000
12/12
© 1999, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
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