GS71024GT-10T [GSI]
Standard SRAM, 64KX24, 10ns, CMOS, PQFP100, ROHS COMPLIANT, TQFP-100;
| 型号： | GS71024GT-10T |
| 厂家： | 
GSI TECHNOLOGY |
| 描述： | Standard SRAM, 64KX24, 10ns, CMOS, PQFP100, ROHS COMPLIANT, TQFP-100 静态存储器 内存集成电路 |
| 文件： | 总13页 (文件大小：378K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
GS71024T/U
8, 9, 10, 12, 15 ns
TQFP, FP-BGA
Commercial Temp
Industrial Temp
64K x 24
1.5Mb Asynchronous SRAM
3.3 V V
DD
Center V and V
DD
SS
Features
Fine Pitch BGA Bump Configuration
• Fast access time: 8, 9, 10, 12, 15 ns
• CMOS low power operation: 190/170/160/130/110 mA at
minimum cycle time.
1
2
3
4
5
6
A
B
C
D
DQ
A3
A2
A1
A0
DQ
• Single 3.3 V ± 0.3 V power supply
• All inputs and outputs are TTL-compatible
• Fully static operation
DQ DQ CE2 WE DQ DQ
DQ DQ CE1 OE DQ DQ
• Industrial Temperature Option: –40 to 85°C
• Package
V
V
DQ
DQ
A5
A7
A9
A4
A6
A8
DQ
DQ
SS
DD
DD
SS
T: 100-pin TQFP package
U: 6 mm x 8 mm Fine Pitch Ball Grid Array
GT: Pb-Free 100-pin TQFP available
V
V
E
F
DQ DQ
DQ DQ
Description
G
H
DQ DQ A11 A10 DQ DQ
DQ A15 A14 A13 A12 DQ
The GS71024 is a high speed CMOS static RAM organized as
65,536 words by 24 bits. Static design eliminates the need for
external clocks or timing strobes. The GS71024 operates on a
single 3.3 V power supply, and all inputs and outputs are TTL-
compatible. The GS71024 is available in a 6 mm x 8 mm Fine
Pitch BGA package, as well as in a 100-pin TQFP package.
6 mm x 8 mm, 0.75 mm Bump Pitch
Top View
Pin Descriptions
Symbol
A0 to A15
X/Y
Description
Address input
Symbol
DQ1 to DQ24
Description
Data input/output
Address Multiplexer Control
Output enable input
—
Vector Input
V/S
OE
—
WE
Write enable input
Chip enable input
+3.3 V power supply
CE1, CE2
V
V
Ground
DD
SS
Block Diagram
A0
Row
Decoder
Memory Array
1024 x 1536
Address
Input
A14
Column
Decoder
A15
X/Y
0
1
Q
V/S
CE1
CE2
I/O Buffer
Control
WE
OE
DQ1
DQ24
Rev: 1.05 11/2004
1/13
© 1999, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS71024T/U
100-Pin TQFP Pinout
100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81
NC
NC
NC
NC
NC
DQ
DQ
DQ
DQ
NC
1
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
NC
NC
NC
NC
DQ
DQ
DQ
DQ
2
3
4
5
6
7
8
9
V
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
V
V
SS
DD
SS
DD
V
Top View
DQ
DQ
NC
DQ
DQ
V
SS
V
DD
NC
NC
V
DD
V
SS
DQ
DQ
NC
DQ
DQ
V
V
DD
DD
SS
V
V
SS
DQ
DQ
DQ
DQ
DQ
NC
NC
NC
NC
NC
DQ
DQ
DQ
NC
NC
NC
NC
NC
31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
Rev: 1.05 11/2004
2/13
© 1999, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS71024T/U
Truth Table
V
Current
CE1
H
X
CE2
OE
X
WE
X
V/S
X
Mode
DQ0 to DQ23
High Z
DD
X
L
Not selected
ISB1, ISB2
X
X
X
Not selected
High Z
L
H
H
H
H
H
L
H
H
L
H
L
Read using X/Y
Read using A15
Write using X/Y
Write using A15
Output disable
Data Out
Data Out
Data In
L
L
I
L
X
H
L
DD
L
X
L
Data In
L
H
H
X
High Z
X: “H” or “L”
Absolute Maximum Ratings
Parameter
Symbol
Rating
Unit
Supply Voltage
VDD
–0.5 to +4.6
V
–0.5 to V + 0.5
DD
Input Voltage
VIN
V
V
(≤ 4.6 V max.)
–0.5 to V + 0.5
DD
Output Voltage
VOUT
(≤ 4.6 V max.)
Allowable TQFP power dissipation
Allowable FPBGA power dissipation
Storage temperature
PD
PD
1
1
W
W
o
T
–55 to 150
C
STG
Note:
Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation shall be restricted to Recommended
Operating Conditions. Exposure to higher than recommended voltages for extended periods of time could affect device reliability.
Rev: 1.05 11/2004
3/13
© 1999, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS71024T/U
Recommended Operating Conditions
Parameter
Supply Voltage for -10/12/15
Supply Voltage for -8
Input High Voltage
Symbol
Minimum
3.0
Typical
Maximum
Unit
V
3.3
3.3
—
3.6
3.6
V
V
V
V
DD
V
3.135
2.0
DD
V
V
+ 0.3
DD
IH
V
Input Low Voltage
–0.3
—
0.8
IL
Ambient Temperature,
Commercial Range
o
T
0
—
—
70
85
C
Ac
Ambient Temperature,
Industrial Range
o
T
–40
C
Ai
Notes:
1. Input overshoot voltage should be less than V + 2 V and not exceed 20 ns.
DD
2. Input undershoot voltage should be greater than –2 V and not exceed 20 ns.
Capacitance
Parameter
Input Capacitance
I/O Capacitance
Symbol
Test Condition
Maximum
Unit
pF
C
V
= 0 V
= 0 V
5
7
IN
IN
C
V
OUT
pF
OUT
Notes:
1. Tested at T = 25°C, f = 1 MHz
A
2. These parameters are sampled and are not 100% tested
DC I/O Pin Characteristics
Parameter
Symbol
Test Conditions
Minimum
Maximum
I
V = 0 to V
IN DD
Input Leakage Current
–1uA
1uA
IL
Output High Z, V
= 0
OUT
I
Output Leakage Current
–1uA
1uA
OL
to V
DD
V
I
= –4mA
= +4mA
Output High Voltage
Output Low Voltage
2.4
—
—
OH
OH
V
I
0.4 V
OL
OL
Rev: 1.05 11/2004
4/13
© 1999, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS71024T/U
AC Test Conditions
Output Load 1
Parameter
Conditions
DQ
V
= 2.4 V
Input high level
IH
1
30pF
50Ω
V = 0.4 V
Input low level
Input rise time
IL
VT = 1.4 V
tr = 1 V/ns
tf = 1 V/ns
1.4 V
Input fall time
Output Load 2
Input reference level
Output reference level
Output load
3.3 V
1.4 V
Fig. 1& 2
589Ω
434Ω
DQ
Notes:
1
5pF
1. Include scope and jig capacitance.
2. Test conditions as specified with output loading as shown in Fig. 1
unless otherwise noted
3. Output load 2 for t , t , t
and t
.
OHZ
LZ HZ OLZ
Power Supply Currents
0 to 70°C
10 ns
-40 to 85°C
12 ns 15 ns
Parameter
Symbol
Test Conditions
CE ≤ V
8 ns
9 ns
12 ns
15 ns
10 ns
IL
All other inputs
Operating
Supply
I
≥ V or ≤ V
190 mA 170 mA 160 mA 130 mA 110 mA 165 mA 135 mA 115 mA
DD
IH
IL
Current
Min. cycle time
= 0 mA
I
OUT
CE ≥ V
IH
Standby
Current
All other inputs
≥ V or ≤V
I
45 mA 45 mA 40 mA 35 mA 30 mA 45 mA 40 mA 35 mA
SB1
IH
IL
Min. cycle time
CE ≥ V – 0.2 V
DD
Standby
Current
I
All other inputs
10 mA
15 mA
SB2
≥ V – 0.2 V or ≤ 0.2 V
DD
Rev: 1.05 11/2004
5/13
© 1999, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS71024T/U
AC Characteristics
Read Cycle
-8
-9
-10
-12
-15
Parameter
Symbol
Unit
Min Max Min Max Min Max Min Max Min Max
t
Read cycle time
8
—
—
—
—
3
—
8
9
—
—
—
—
3
—
9
10
—
—
—
—
3
—
10
10
10
5
12
—
—
—
—
3
—
12
12
12
6
15
—
—
—
—
3
—
15
15
15
7
ns
ns
ns
ns
ns
ns
ns
ns
RC
t
Address access time
AA
t
Chip enable access time (CE1, CE2)
MUX control to output valid (V/S)
Output enable to output valid (OE)
Output hold from address change
Output hold from MUX controls change
Chip enable to output in low Z (CE1, CE2)
8
9
AC
t
8
9
AV
t
4
4.5
—
—
—
OE
t
—
—
—
—
—
—
—
—
—
—
—
—
OH
t
3
3
3
3
3
OH1
*
3
3
3
3
3
t
LZ
*
Output enable to output in low Z (OE)
Chip disable to output in High Z (CE1, CE2)
Output disable to output in High Z (OE)
0
—
4
0
—
0
—
5
0
—
6
0
—
7
ns
ns
ns
t
OLZ
*
—
—
—
—
4.5
4.5
—
—
—
—
—
—
t
HZ
*
4
5
6
7
t
OHZ
* These parameters are sampled and are not 100% tested
Read Cycle 1: CE = OE = V , WE = V
IL
IH
t
RC
Address
t
AA
V/S
t
OH
Data Out
Previous Data
Data valid
t
OH1
t
AV
Rev: 1.05 11/2004
6/13
© 1999, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS71024T/U
Read Cycle 2: WE = V
IH
t
RC
Address
t
AA
(*1)
CE1
t
AC
t
HZ
t
LZ
t
AV
V/S
OE
t
OE
t
OHZ
t
OLZ
Data Out
Data valid
High impedance
*1 CE1 represents both CE1 low and CE2 high.
Rev: 1.05 11/2004
7/13
© 1999, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS71024T/U
Write Cycle
-8
-9
-10
-12
-15
Parameter
Symbol
Unit
Min Max Min Max Min Max Min Max Min Max
t
Write cycle time
8
5.5
5.5
5.5
4
—
—
—
—
—
—
—
—
—
—
—
—
9
6.25
6.25
6.25
4.5
0
—
—
—
—
—
—
—
—
—
—
—
—
10
7
7
7
5
0
7
0
0
0
0
3
—
—
—
—
—
—
—
—
—
—
—
—
12
8
8
8
6
0
8
0
0
0
0
3
—
—
—
—
—
—
—
—
—
—
—
—
15
10
10
10
7
—
—
—
—
—
—
—
—
—
—
—
—
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
WC
t
Address valid to end of write
Chip enable to end of write (CE1, CE2)
MUX control to end of write (V/S)
Data set up time
AW
t
CW
t
VW
t
DW
t
Data hold time
0
0
DH
t
Write pulse width
5.5
0
6.25
0
10
0
WP
t
Address set up time
AS
t
MUX control set up time
Write recovery time (WE)
Write recovery time (V/S, CE1, CE2 )
Output Low Z from end of write
0
0
0
VS
t
0
0
0
WR
t
0
0
0
WR1
*
2
2.5
3
t
WLZ
WHZ
*
Write to output in High Z
—
4
—
4.5
—
5
—
6
—
7
ns
t
* These parameters are sampled and are not 100% tested
Rev: 1.05 11/2004
8/13
© 1999, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS71024T/U
Write Cycle 1: WE control
t
WC
Address
OE
t
t
WR
AW
t
t
CW
(*1)
CE1
VW
t
VS
V/S
WE
t
t
WP
AS
(*2)
t
t
DH
DW
Data valid
Data In
t
t
WLZ
WHZ
Data Out
High impedance
(*3)
*1 CE1 represents both CE1 low and CE2 high.
(*3)
*2 Write is executed when both CE1 and WE are at low simultaneously.
*3 Do not apply the data input voltage to the output while DQ pin is in output condition.
Write Cycle 2: CE control
t
WC
Address
OE
t
t
WR1
AW
t
t
t
AS
CW
VW
(*1)
CE1
V/S
WE
t
WP
t
t
DH
DW
Data valid
Data In
Data Out
High impedance
*1 CE1 represents both CE1 low and CE2 high.
Rev: 1.05 11/2004
9/13
© 1999, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS71024T/U
6 mm x 8 mm Fine Pitch BGA
8 . 0 0 ± 0 . 1 0
0.10
5 . 2 5
Rev: 1.05 11/2004
10/13
© 1999, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS71024T/U
TQFP Package Drawing
θ
L
c
Symbol
Description
Standoff
Min. Nom. Max
L1
A1
0.05
1.35
0.20
0.09
0.10
1.40
0.30
0.15
1.45
0.40
0.20
22.1
20.1
16.1
14.1
A2
Body Thickness
Lead Width
b
c
Lead Thickness
D
Terminal Dimension 21.9
Package Body 19.9
Terminal Dimension 15.9
22.0
20.0
16.0
14.0
0.65
0.60
1.00
D1
e
E
E1
Package Body
Lead Pitch
13.9
e
b
L
Foot Length
Lead Length
Coplanarity
Lead Angle
0.45
0.75
L1
Y
θ
0.10
0°
7°
A1
Notes:
A2
E1
E
1. All dimensions are in millimeters (mm).
2. Package width and length do not include mold protrusion
BPR 1999.05.18
Rev: 1.05 11/2004
11/13
© 1999, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS71024T/U
Ordering Information
Part Number
GS71024T-8
Package
100-Pin TQFP
Access Time
8 ns
Temp. Range
Commercial
Commercial
Commercial
Commercial
Commercial
Industrial
Status
GS71024T-9
100-Pin TQFP
9 ns
GS71024T-10
GS71024T-12
GS71024T-15
GS71024T-8I
GS71024T-9I
GS71024T-10I
GS71024T-12I
GS71024T-15I
GS71024GT-8
GS71024GT-9
GS71024GT-10
GS71024GT-12
GS71024GT-15
GS71024GT-8I
GS71024GT-9I
GS71024GT-10I
GS71024GT-12I
GS71024GT-15I
GS71024U-8
100-Pin TQFP
10 ns
12 ns
15 ns
8 ns
100-Pin TQFP
100-Pin TQFP
100-Pin TQFP
100-Pin TQFP
9 ns
Industrial
100-Pin TQFP
10 ns
12 ns
15 ns
8 ns
Industrial
100-Pin TQFP
Industrial
100-Pin TQFP
Industrial
Pb-free 100-Pin TQFP
Pb-free 100-Pin TQFP
Pb-free 100-Pin TQFP
Pb-free 100-Pin TQFP
Pb-free 100-Pin TQFP
Pb-free 100-Pin TQFP
Pb-free 100-Pin TQFP
Pb-free 100-Pin TQFP
Pb-free 100-Pin TQFP
Pb-free 100-Pin TQFP
6 mm x 8 mm Fine Pitch BGA
6 mm x 8 mm Fine Pitch BGA
6 mm x 8 mm Fine Pitch BGA
6 mm x 8 mm Fine Pitch BGA
6 mm x 8 mm Fine Pitch BGA
6 mm x 8 mm Fine Pitch BGA
6 mm x 8 mm Fine Pitch BGA
6 mm x 8 mm Fine Pitch BGA
Commercial
Commercial
Commercial
Commercial
Commercial
Industrial
9 ns
10 ns
12 ns
15 ns
8 ns
9 ns
Industrial
10 ns
12 ns
15 ns
8 ns
Industrial
Industrial
Industrial
Commercial
Commercial
Commercial
Commercial
Commercial
Industrial
GS71024U-9
9 ns
GS71024U-10
GS71024U-12
GS71024U-15
GS71024U-8I
GS71024U-9I
GS71024U-10I
10 ns
12 ns
15 ns
8 ns
9 ns
Industrial
10 ns
Industrial
Rev: 1.05 11/2004
12/13
© 1999, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS71024T/U
Ordering Information
Part Number
GS71024U-12I
GS71024U-15I
Package
Access Time
12 ns
Temp. Range
Industrial
Status
6 mm x 8 mm Fine Pitch BGA
6 mm x 8 mm Fine Pitch BGA
15 ns
Industrial
* Customers requiring Tape and Reel should add the character “T” to the end of the part number. For example: GS71024T/U-12T.
Revision History
Rev. Code: Old;
New
Types of Changes
Format or Content
Page/Revisions/Reason
• Document Changed subscripts to small caps.
• 1/Features: Changed TP to T.
Format/Typos
• Document/Replaced “micro” with “fine pitch”.
GS71024Rev 2:17pm, 4/8/
1999;
• Ordering Information/Added Tape and Reel Note/
Enhancement
1.00a5/1999
• Pin Description/Changed A0 - A14 to A0 - A15/Correction
• Page 1/Took out “Byte Control” from Features/Correction
• 3/Changed pin 97 from NC to CE2/Correction
•
Content
1. Pin out/Changed Pin 89 from CK to NC/Correction
GS710241.00a5/1999;
1.01 8/1999B
2. Pin out/Changed Pin 92 from NC to V/S/Correction
3. Pin out/Changed Pin 93 from V/S to X/Y/Correction
4. Pin out/Changed Pin 94 from X/Y to NC/Correction
Content
• Package Diagram/Changed Dimension “D Max” from 20.1 to
22.1/Correction
GS710241.01 8/1999C;
1.02 9/1999C
Content
Format
• GSI Logo
GS71024Rev1.01 8/
1999C;Rev1.02 2/2000D
• Updated format to comply with Technical Publications
standards
Rev1.02 2/2000D;
71024_r1_03
• Changed all V
page 2
to V and all V
to V in pinout on
DDQ DD
Format and Content
SSQ
SS
• Updated Revision History (revision notes for 8/1999 incorrect)
• Added 9 ns references to entire document
71024_r1_03; 71024_r1_04
71024_r1_04; 71024_r1_05
Content
• Updated format
Content/Format
• Added Pb-free information for TQFP package
Rev: 1.05 11/2004
13/13
© 1999, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
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