GS74104AGP-10IT [GSI]

Standard SRAM, 1MX4, 10ns, CMOS, PDSO44, 0.400 INCH, ROHS COMPLIANT, TSOP2-44;
GS74104AGP-10IT
型号: GS74104AGP-10IT
厂家: GSI TECHNOLOGY    GSI TECHNOLOGY
描述:

Standard SRAM, 1MX4, 10ns, CMOS, PDSO44, 0.400 INCH, ROHS COMPLIANT, TSOP2-44

静态存储器 光电二极管 内存集成电路
文件: 总10页 (文件大小:127K)
中文:  中文翻译
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GS74104AGP  
8, 10, 12 ns  
TSOP  
Commercial Temp  
Industrial Temp  
1M x 4  
3.3 V V  
DD  
Center V and V  
4Mb Asynchronous SRAM  
DD  
SS  
Features  
TSOP-II 1M x 4-Pin Configuration  
• Fast access time: 8, 10, 12 ns  
• CMOS low power operation: 120/95/85 mA at minimum  
cycle time  
• Single 3.3 V power supply  
• All inputs and outputs are TTL-compatible  
• Fully static operation  
NC  
NC  
NC  
A4  
1
44  
43  
NC  
NC  
NC  
A5  
2
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
3
4
5
A3  
A6  
6
• Industrial Temperature Option: –40° to 85°C  
• Package line up  
A2  
A7  
7
A1  
A8  
8
GP:RoHS-compliant 400 mil, 44-pin TSOP Type II  
package  
A0  
A9  
9
CE  
DQ1  
VDD  
VSS  
DQ2  
WE  
A19  
A18  
A17  
A16  
OE  
DQ4  
VSS  
VDD  
DQ3  
A10  
A11  
A12  
A13  
A14  
NC  
NC  
10  
11  
12  
13  
14  
15  
16  
17  
18  
44-pin  
Description  
400 mil TSOP II  
The GS74104A is a high speed CMOS Static RAM organized  
as 1,048,576 words by 4 bits. Static design eliminates the need  
for external clocks or timing strobes. The GS74104A operates  
on a single 3.3 V power supply and all inputs and outputs are  
TTL-compatible. The GS74104A is available in a RoHS-  
compliant 400 mil TSOP Type-II package.  
A15  
NC  
NC  
NC  
19  
20  
21  
22  
24  
23  
NC  
NC  
Pin Descriptions  
Symbol  
A0–A19  
DQ1–DQ4  
CE  
Description  
Address input  
Data input/output  
Chip enable input  
Write enable input  
Output enable input  
+3.3 V power supply  
WE  
OE  
V
DD  
V
Ground  
SS  
NC  
No connect  
Rev: 1.08 1/2013  
1/10  
© 2001, GSI Technology  
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.  
GS74104AGP  
Block Diagram  
A0  
Row  
Decoder  
Memory Array  
Address  
Input  
Buffer  
Column  
Decoder  
A19  
CE  
WE  
OE  
I/O Buffer  
Control  
DQ4  
DQ1  
Truth Table  
CE  
V
Current  
OE  
WE  
DQ1 to DQ8  
DD  
H
L
L
L
X
L
X
H
L
Not Selected  
Read  
ISB1, ISB2  
X
H
Write  
IDD  
H
High Z  
Note:  
X: “H” or “L”  
Rev: 1.08 1/2013  
2/10  
© 2001, GSI Technology  
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.  
GS74104AGP  
Absolute Maximum Ratings  
Parameter  
Symbol  
Rating  
Unit  
Supply Voltage  
VDD  
–0.5 to +4.6  
V
–0.5 to V +0.5  
DD  
Input Voltage  
VIN  
V
(4.6 V max.)  
–0.5 to V +0.5  
DD  
Output Voltage  
VOUT  
V
(4.6 V max.)  
Allowable power dissipation  
Storage temperature  
PD  
0.7  
W
o
TSTG  
–55 to 150  
C
Note:  
Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation shall be restricted to Recommended  
Operating Conditions. Exposure to higher than recommended voltages for extended periods of time could affect device reliability.  
Recommended Operating Conditions  
Parameter  
Supply Voltage for -8/-10/-12  
Input High Voltage  
Symbol  
Min  
3.0  
Typ  
3.3  
Max  
Unit  
V
3.6  
V
V
V
DD  
V
+0.3  
VIH  
VIL  
2.0  
DD  
Input Low Voltage  
–0.3  
0.8  
Ambient Temperature,  
Commercial Range  
o
TAc  
TAI  
0
70  
85  
C
Ambient Temperature,  
Industrial Range  
o
–40  
C
Notes:  
1. Input overshoot voltage should be less than V +2 V and not exceed 20 ns.  
DD  
2. Input undershoot voltage should be greater than –2 V and not exceed 20 ns.  
Capacitance  
Parameter  
Input Capacitance  
Output Capacitance  
Symbol  
CIN  
Test Condition  
Max  
Unit  
pF  
VIN = 0 V  
5
7
COUT  
VOUT = 0 V  
pF  
Notes:  
1. Tested at TA = 25°C, f = 1 MHz  
2. These parameters are sampled and are not 100% tested.  
Rev: 1.08 1/2013  
3/10  
© 2001, GSI Technology  
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.  
GS74104AGP  
DC I/O Pin Characteristics  
Parameter  
Symbol  
Test Conditions  
Min  
Max  
VIN = 0 to V  
DD  
Input Leakage Current  
IIL  
– 1 uA  
1 uA  
Output High Z  
Output Leakage Current  
ILO  
–1 uA  
1 uA  
VOUT = 0 to V  
DD  
Output High Voltage  
Output Low Voltage  
VOH  
VOL  
IOH = –4mA  
ILO = +4mA  
2.4  
0.4 V  
Power Supply Currents  
0 to 70°C  
–40 to 85°C  
Parameter  
Symbol  
Test Conditions  
8 ns  
10 ns  
12 ns  
8 ns  
10 ns  
12 ns  
CE VIL  
Operating  
Supply  
Current  
All other inputs  
VIH or VIL  
Min. cycle time  
IOUT = 0 mA  
IDD  
120 mA  
95 mA  
85 mA  
22 mA  
130 mA  
105 mA  
95 mA  
CE VIH  
Standby  
Current  
All other inputs  
VIH or VIL  
Min. cycle time  
ISB1  
30 mA  
25 mA  
10 mA  
40 mA  
35 mA  
20 mA  
32 mA  
CE VDD - 0.2V  
All other inputs  
VDD - 0.2V or 0.2V  
Standby  
Current  
ISB2  
Rev: 1.08 1/2013  
4/10  
© 2001, GSI Technology  
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.  
GS74104AGP  
AC Test Conditions  
Output Load 1  
Parameter  
Input high level  
Input low level  
Conditions  
VIH = 2.4 V  
VIL = 0.4 V  
tr = 1 V/ns  
tf = 1 V/ns  
1.4 V  
DQ  
1
30pF  
50Ω  
Input rise time  
VT = 1.4 V  
Input fall time  
Input reference level  
Output reference level  
Output load  
Output Load 2  
1.4 V  
3.3 V  
Fig. 1& 2  
589Ω  
434Ω  
DQ  
Notes:  
1
1. Include scope and jig capacitance.  
5pF  
2. Test conditions as specified with output loading as shown in Fig. 1  
unless otherwise noted.  
3. Output load 2 for tLZ, tHZ, tOLZ and tOHZ  
AC Characteristics  
Read Cycle  
-8  
-10  
-12  
Parameter  
Symbol  
Unit  
Min  
8
Max  
8
Min  
10  
3
Max  
Min  
12  
3
Max  
Read cycle time  
tRC  
tAA  
tAC  
tOE  
tOH  
12  
12  
5
ns  
ns  
ns  
ns  
ns  
ns  
Address access time  
3
10  
10  
4
Chip enable access time (CE)  
Output enable to output valid (OE)  
Output hold from address change  
Chip enable to output in low Z (CE)  
8
3.5  
*
3
3
3
tLZ  
*
Output enable to output in low Z (OE)  
Chip disable to output in High Z (CE)  
Output disable to output in High Z (OE)  
0
4
0
5
0
6
ns  
ns  
ns  
tOLZ  
*
tHZ  
*
3.5  
4
5
tOHZ  
* These parameters are sampled and are not 100% tested.  
Rev: 1.08 1/2013  
5/10  
© 2001, GSI Technology  
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.  
GS74104AGP  
Read Cycle 1: CE = OE = V , WE = V  
IL  
IH  
tRC  
Address  
Data Out  
tAA  
tOH  
Previous Data  
Data valid  
Read Cycle 2: WE = V  
IH  
tRC  
Address  
CE  
tAA  
tAC  
tHZ  
tLZ  
OE  
tOE  
tOHZ  
tOLZ  
DATA VALID  
Data Out  
High impedance  
Rev: 1.08 1/2013  
6/10  
© 2001, GSI Technology  
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.  
GS74104AGP  
Write Cycle  
-8  
-10  
-12  
Parameter  
Symbol  
Unit  
Max  
Min  
8
Max  
Min  
10  
7
Max  
Min  
12  
8
Write cycle time  
tWC  
tAW  
tCW  
tDW  
tDH  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
Address valid to end of write  
Chip enable to end of write  
Data set up time  
5.5  
5.5  
4
7
8
5
6
Data hold time  
0
0
0
Write pulse width  
tWP  
tAS  
5.5  
0
7
8
Address set up time  
0
0
Write recovery time (WE)  
Write recovery time (CE)  
Output Low Z from end of write  
tWR  
tWR1  
0
0
0
0
0
0
*
3
3
3
tWLZ  
*
Write to output in High Z  
3.5  
4
5
ns  
tWHZ  
* These parameters are sampled and are not 100% tested.  
Write Cycle 1: WE control  
tWC  
Address  
OE  
tAW  
tWR  
tCW  
CE  
tAS  
tWP  
WE  
tDW  
tDH  
DATA VALID  
Data In  
Data Out  
tWHZ  
tWLZ  
HIGH IMPEDANCE  
Rev: 1.08 1/2013  
7/10  
© 2001, GSI Technology  
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.  
GS74104AGP  
Write Cycle 2: CE control  
tWC  
Address  
OE  
tAW  
tWR1  
tAS  
tCW  
CE  
tWP  
WE  
tDW  
tDH  
DATA VALID  
Data In  
Data Out  
HIGH IMPEDANCE  
44-Pin, 400 mil TSOP-II  
Dimension in inch  
Dimension in mm  
Symbol  
min  
nom max  
min  
nom max  
D
c
44  
23  
22  
A
0.047  
1.20  
A1  
0.002  
0.05  
A2  
0.037 0.039 0.041 0.95  
0.01 0.014 0.018 0.25  
1.00  
0.35  
0.15  
1.05  
0.45  
A
B
c
0.006  
D
0.721 0.725 0.729 18.31 18.41 18.51  
0.396 0.400 0.404 10.06 10.16 10.26  
1
E
e
B
e
0.031  
0.80  
HE  
0.455 0.463 0.471 11.56 11.76 11.96  
L
0.016 0.020 0.024 0.40  
0.50  
0.80  
0.60  
y
L1  
0.031  
y
Q
0.004  
0.10  
o
o
o
o
0
5
0
5
Q
Detail A  
Notes:  
1. Dimension D& E do not include interlead flash.  
2. Dimension B does not include dambar protrusion/intrusion.  
3. Controlling dimension: mm  
Rev: 1.08 1/2013  
8/10  
© 2001, GSI Technology  
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.  
GS74104AGP  
Ordering Information  
*
Package  
Access Time  
Temp. Range  
Part Number  
GS74104AGP-8  
GS74104AGP-10  
GS74104AGP-12  
GS74104AGP-8I  
GS74104AGP-10I  
RoHS-compliant 400 mil TSOP-II  
RoHS-compliant 400 mil TSOP-II  
RoHS-compliant 400 mil TSOP-II  
RoHS-compliant 400 mil TSOP-II  
RoHS-compliant 400 mil TSOP-II  
RoHS-compliant 400 mil TSOP-II  
8 ns  
10 ns  
12 ns  
8 ns  
Commercial  
Commercial  
Commercial  
Industrial  
10 ns  
12 ns  
Industrial  
GS74104AGP-12I  
Industrial  
Note:  
Customers requiring delivery in Tape and Reel should add the character “T” to the end of the part number. For example: GS74104AGP-8T.  
Rev: 1.08 1/2013  
9/10  
© 2001, GSI Technology  
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.  
GS74104AGP  
4Mb Asynchronous Datasheet Revision History  
Rev. Code: Old;  
New  
Types of Changes  
Format or Content  
Page #/Revisions/Reason  
• Created new datasheet  
74104A_r1  
Content/Format  
• Added 6 ns speed bin  
• Updated all power numbers  
74104A_r1; 74104A_r1_01  
Content  
• Updated Recommended Operating Currents on page 3  
• Added 7 ns bin to entire document  
• Add X package  
74104A_r1_01; 74104A_r1_02  
Content  
• Removed 6 ns speed bin from entire document  
• Removed all references to “X” package  
74104A_r1_02; 74104A_r1_03  
74104A_r1_03; 74104A_r1_04  
74104A_r1_04; 74104A_r1_05  
74104A_r1_05; 74104A_r1_06  
74104A_r1_06; 74104A_r1_07  
74104A_r1_07; 74104A_r1_08  
Content  
Content  
• Removed 7 ns speed bin from entire document  
• Updated format  
• Added RoHS-compliant information for TSOP-II package  
Content/Format  
Content6  
• Added RoHS-compliant 400 mil, 32-pin SOJ  
• Removed status column (all parts MP)  
• (Rev1.07a: Removed SOJ references due to EOL)  
Content6  
• Removed TSOP-II 5/6 RoHS references due to EOL  
Content6  
Rev: 1.08 1/2013  
10/10  
© 2001, GSI Technology  
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.  

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