GS74104AGP-12_技术文档

GS74104ATP/J

8, 10, 12 ns

SOJ, TSOP

Commercial Temp

Industrial Temp

1M x 4

3.3 V V

DD

Center V and V

4Mb Asynchronous SRAM

DD

SS

Features

SOJ 1M x 4-Pin Configuraton

• Fast access time: 8, 10, 12 ns

• CMOS low power operation: 120/95/85 mA at minimum

cycle time

• Single 3.3 V power supply

• All inputs and outputs are TTL-compatible

• Fully static operation

32

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

1

A4

A5

2

A3

A6

3

A2

A7

4

A1

A8

5

A0

A9

6

CE

OE

DQ4

V_SS

V_DD

DQ3

A10

A11

A12

A13

A14

NC

• Industrial Temperature Option: –40° to 85°C

• Package line up

32-pin

7

DQ1

V_DD

V_SS

DQ2

WE

A19

A18

A17

A16

A15

8

400 mil SOJ

J: 400 mil, 32-pin SOJ package

GJ:RoHS-compliant 400 mil, 32-pin SOJ package

TP: 400 mil, 44-pin TSOP Type II package

GP:RoHS-compliant 400 mil, 44-pin TSOP Type II

package

9

10

11

12

13

14

15

16

Description

The GS74104A is a high speed CMOS Static RAM organized

as 1,048,576 words by 4 bits. Static design eliminates the need

for external clocks or timing strobes. The GS operates on a

single 3.3 V power supply and all inputs and outputs are TTL-

compatible. The GS74104A is available in 400 mil SOJ and

400 mil TSOP Type-II packages.

TSOP-II 1M x 4-Pin Configuration

1

44

NC

A5

NC

A4

2

43

42

3

41

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

4

5

A3

A6

Pin Descriptions

6

A2

A7

7

A1

A8

Symbol

A0–A19

DQ1–DQ4

CE

Description

Address input

8

A0

A9

9

CE

DQ1

V_DD

V_SS

DQ2

WE

A19

A18

A17

A16

OE

10

11

12

13

14

15

16

17

18

DQ4

Data input/output

Chip enable input

Write enable input

Output enable input

+3.3 V power supply

44-pin

V_SS

V_DD

DQ3

A10

A11

A12

A13

A14

NC

400 mil TSOP II

WE

OE

V

DD

V

Ground

SS

NC

No connect

A15

NC

19

20

21

22

NC

24

23

NC

Rev: 1.06 6/2006

1/11

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

GS74104ATP/J

Block Diagram

A0

Row

Decoder

Memory Array

Address

Input

Buffer

Column

Decoder

A19

CE

WE

OE

I/O Buffer

Control

DQ4

DQ1

Truth Table

CE

V

Current

OE

WE

DQ1 to DQ8

DD

H

L

X

L

X

H

L

Not Selected

Read

ISB1, ISB2

X

H

Write

IDD

H

High Z

Note:

X: “H” or “L”

Rev: 1.06 6/2006

2/11

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

GS74104ATP/J

Absolute Maximum Ratings

Parameter

Symbol

Rating

Unit

Supply Voltage

VDD

–0.5 to +4.6

V

–0.5 to V +0.5

DD

Input Voltage

VIN

V

(≤ 4.6 V max.)

–0.5 to V +0.5

DD

Output Voltage

VOUT

V

(≤ 4.6 V max.)

Allowable power dissipation

Storage temperature

PD

0.7

W

o

TSTG

–55 to 150

C

Note:

Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation shall be restricted to Recommended

Operating Conditions. Exposure to higher than recommended voltages for extended periods of time could affect device reliability.

Recommended Operating Conditions

Parameter

Supply Voltage for -8/-10/-12

Input High Voltage

Symbol

Min

3.0

Typ

3.3

—

Max

Unit

V

3.6

V

DD

V

+0.3

VIH

VIL

2.0

DD

Input Low Voltage

–0.3

—

0.8

Ambient Temperature,

Commercial Range

o

TAc

TAI

0

—

70

85

C

Ambient Temperature,

Industrial Range

o

–40

C

Notes:

1. Input overshoot voltage should be less than V +2 V and not exceed 20 ns.

DD

2. Input undershoot voltage should be greater than –2 V and not exceed 20 ns.

Capacitance

Parameter

Input Capacitance

Output Capacitance

Symbol

CIN

Test Condition

VIN = 0 V

Max

Unit

pF

5

7

COUT

VOUT = 0 V

pF

Notes:

1. Tested at TA = 25°C, f = 1 MHz

2. These parameters are sampled and are not 100% tested.

Rev: 1.06 6/2006

3/11

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

GS74104ATP/J

DC I/O Pin Characteristics

Parameter

Symbol

Test Conditions

Min

Max

Input Leakage

Current

VIN = 0 to V

DD

IIL

– 1 uA

1 uA

Output High Z

Output Leakage

Current

ILO

–1 uA

1 uA

VOUT = 0 to V

DD

Output High Voltage

Output Low Voltage

VOH

VOL

IOH = –4mA

ILO = +4mA

2.4

—

0.4 V

Power Supply Currents

0 to 70°C

10 ns

–40 to 85°C

Parameter

Symbol

Test Conditions

8 ns

12 ns

8 ns

10 ns

12 ns

CE ≤ VIL

Operating

Supply

Current

All other inputs

≥ VIH or ≤ VIL

Min. cycle time

IOUT = 0 mA

IDD

120 mA

95 mA

85 mA

130 mA

40 mA

105 mA

95 mA

CE ≥ VIH

Standby

Current

All other inputs

≥ VIH or ≤VIL

Min. cycle time

ISB1

ISB2

30 mA

25 mA

10 mA

22 mA

35 mA

20 mA

32 mA

CE ≥ VDD - 0.2V

All other inputs

≥ VDD - 0.2V or ≤ 0.2V

Standby

Current

Rev: 1.06 6/2006

4/11

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

GS74104ATP/J

AC Test Conditions

Output Load 1

Parameter

Input high level

Input low level

Conditions

VIH = 2.4 V

V^IL= 0.4 V

tr = 1 V/ns

tf = 1 V/ns

1.4 V

DQ

1

30pF

50Ω

Input rise time

VT = 1.4 V

Input fall time

Input reference level

Output reference level

Output load

Output Load 2

1.4 V

3.3 V

Fig. 1& 2

589Ω

434Ω

DQ

Notes:

1

1. Include scope and jig capacitance.

5pF

2. Test conditions as specified with output loading as shown in Fig. 1

unless otherwise noted.

3. Output load 2 for t^LZ, tHZ, tOLZ and tOHZ

AC Characteristics

Read Cycle

-8

-10

-12

Parameter

Symbol

Unit

Min

8

Max

—

8

Min

10

—

3

Max

—

Min

12

—

3

Max

Read cycle time

tRC

tAA

tAC

tOE

tOH

—

12

5

ns

Address access time

—

3

10

4

Chip enable access time (CE)

Output enable to output valid (OE)

Output hold from address change

Chip enable to output in low Z (CE)

8

3.5

—

*

3

—

3

tLZ

*

Output enable to output in low Z (OE)

Chip disable to output in High Z (CE)

Output disable to output in High Z (OE)

0

—

4

0

—

5

0

—

6

ns

tOLZ

*

—

tHZ

*

3.5

4

5

tOHZ

* These parameters are sampled and are not 100% tested.

Rev: 1.06 6/2006

5/11

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

GS74104ATP/J

Read Cycle 1: CE = OE = V , WE = V

IL

IH

tRC

Address

Data Out

tAA

tOH

Previous Data

Data valid

Read Cycle 2: WE = V

IH

tRC

Address

CE

tAA

tAC

tHZ

tLZ

OE

tOE

tOHZ

tOLZ

DATA VALID

Data Out

High impedance

Rev: 1.06 6/2006

6/11

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

GS74104ATP/J

Write Cycle

-8

-10

-12

Parameter

Symbol

Unit

Min

8

Max

—

Min

10

7

Max

—

Min

12

8

Max

—

Write cycle time

tWC

tAW

tCW

tDW

tDH

ns

Address valid to end of write

Chip enable to end of write

Data set up time

5.5

4

7

8

5

6

Data hold time

0

Write pulse width

tWP

tAS

5.5

0

7

8

Address set up time

0

Write recovery time (WE)

Write recovery time (CE)

Output Low Z from end of write

tWR

tWR1

0

*

3

tWLZ

*

Write to output in High Z

—

3.5

—

4

—

5

ns

tWHZ

* These parameters are sampled and are not 100% tested.

Write Cycle 1: WE control

tWC

Address

OE

tAW

tWR

tCW

CE

tAS

tWP

WE

tDW

tDH

DATA VALID

Data In

Data Out

tWHZ

tWLZ

HIGH IMPEDANCE

Rev: 1.06 6/2006

7/11

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

GS74104ATP/J

Write Cycle 2: CE control

tWC

Address

OE

tAW

tWR1

tAS

tCW

CE

tWP

WE

tDW

tDH

DATA VALID

Data In

Data Out

HIGH IMPEDANCE

32-Pin SOJ, 400 mil

Dimension in inch

Dimension in mm

Symbol

min

nom

—

max

min

—

nom

—

max

3.70

—

L

A

—

0.146

—

D

c

A1

0.026

—

0.66

2.67

—

A2

0.105 0.110 0.115

2.80

0.43

0.71

0.20

2.92

0.53

0.81

0.30

B

0.013 0.017 0.021 0.33

0.024 0.028 0.032 0.61

0.006 0.008 0.012 0.15

B1

1

c

e

A

D

0.820 0.824 0.829 20.83 20.93 21.06

0.395 0.400 0.405 10.04 10.16 10.28

E

e

—

0.05

—

1.27

—

B

B1

y

H^E

0.430 0.435 0.440 10.93 11.05 11.17

Q

G^E

0.354 0.366 0.378 9.00

9.30

—

9.60

—

Detail A

L

y

0.082

—

2.08

—

0.004

—

0.10

o

Q

—

0

10

0

10

Notes:

1. Dimension D& E do not include interlead flash.

2. Dimension B1 does not include dambar protrusion/intrusion.

3. Controlling dimension: inches

Rev: 1.06 6/2006

8/11

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

GS74104ATP/J

44-Pin, 400 mil TSOP-II

Dimension in inch

Dimension in mm

Symbol

min

—

nom max

min

nom max

D

c

44

23

22

A

—

0.047

—

1.20

—

A1

0.002

0.05

—

A2

0.037 0.039 0.041 0.95

0.01 0.014 0.018 0.25

1.00

0.35

0.15

1.05

0.45

—

A

B

c

—

0.006

—

D

0.721 0.725 0.729 18.31 18.41 18.51

0.396 0.400 0.404 10.06 10.16 10.26

1

E

e

B

e

—

0.031

—

0.80

—

H^E

0.455 0.463 0.471 11.56 11.76 11.96

L

0.016 0.020 0.024 0.40

0.50

0.80

—

0.60

—

y

L1

—

0.031

—

y

Q

0.004

0.10

o

—

0

5

0

5

Q

Detail A

Notes:

1. Dimension D& E do not include interlead flash.

2. Dimension B does not include dambar protrusion/intrusion.

3. Controlling dimension: mm

Rev: 1.06 6/2006

9/11

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

GS74104ATP/J

Ordering Information

*

Package

Access Time

Temp. Range

Status

Part Number

GS74104ATP-8

GS74104ATP-10

GS74104ATP-12

GS74104ATP-8I

GS74104ATP-10I

GS74104ATP-12I

GS74104AGP-8

GS74104AGP-10

GS74104AGP-12

GS74104AGP-8I

GS74104AGP-10I

GS74104AGP-12I

GS74104AJ-8

400 mil TSOP-II

8 ns

10 ns

12 ns

8 ns

Commercial

Industrial

MP

PQ

MP

PQ

400 mil TSOP-II

10 ns

12 ns

8 ns

Industrial

400 mil TSOP-II

Industrial

RoHS-compliant 400 mil TSOP-II

400 mil SOJ

Commercial

Industrial

10 ns

12 ns

8 ns

10 ns

12 ns

8 ns

Industrial

Commercial

Industrial

GS74104AJ-10

GS74104AJ-12

GS74104AJ-8I

400 mil SOJ

10 ns

12 ns

8 ns

400 mil SOJ

GS74104AJ-10I

GS74104AJ-12I

GS74104AGJ-8

GS74104AGJ-10

GS74104AGJ-12

GS74104AGJ-8I

GS74104AGJ-10I

400 mil SOJ

10 ns

12 ns

8 ns

Industrial

400 mil SOJ

Industrial

RoHS-compliant 400 mil SOJ

Commercial

Industrial

10 ns

12 ns

8 ns

10 ns

12 ns

Industrial

GS74104AGJ-12I

Industrial

Notes:

1. Customers requiring delivery in Tape and Reel should add the character “T” to the end of the part number. For example: GS74104TP-8T.

2. MP = Mass Production. PQ = Pre-Qualification.

Rev: 1.06 6/2006

10/11

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

GS74104ATP/J

4Mb Asynchronous Datasheet Revision History

Rev. Code: Old;

New

Types of Changes

Format or Content

Page #/Revisions/Reason

• Created new datasheet

74104A_r1

Content/Format

• Added 6 ns speed bin

• Updated all power numbers

74104A_r1; 74104A_r1_01

Content

• Updated Recommended Operating Currents on page 3

• Added 7 ns bin to entire document

• Add X package

74104A_r1_01; 74104A_r1_02

Content

• Removed 6 ns speed bin from entire document

• Removed all references to “X” package

74104A_r1_02; 74104A_r1_03

74104A_r1_03; 74104A_r1_04

74104A_r1_04; 74104A_r1_05

74104A_r1_05; 74104A_r1_06

Content

• Removed 7 ns speed bin from entire document

• Updated format

• Added RoHS-compliant information for TSOP-II package

Content/Format

Content6

• Added RoHS-compliant 400 mil, 32-pin SOJ

Rev: 1.06 6/2006

11/11

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.


型号：	GS74104AGP-12
厂家：	GSI TECHNOLOGY
描述：	1M x 4 4Mb Asynchronous SRAM 1M ×4 4Mb的异步SRAM 静态存储器
文件：	总11页 (文件大小：516K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

GS74104AGP-12 [GSI]

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