HM2012Q [HMSEMI]
2.1W/ch Stereo Filter-free Class-D Audio Power Amplifier;型号: | HM2012Q |
厂家: | H&M Semiconductor |
描述: | 2.1W/ch Stereo Filter-free Class-D Audio Power Amplifier |
文件: | 总7页 (文件大小:548K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
HM2012
2.1W/ch Stereo Filter-free Class-D Audio Power Amplifier
General Description
Personal Digital Assistant(PDA)
Portable gaming device
Powered speakers
The HM2012 is a 2.1W/ch stereo high efficiency
filter-free class-D audio power amplifier. The HM2012
can operate from 2.7 to 5.5V supply. When powered
with 5V voltage, the HM2012 can deliver 2.1W per
channel to dual 4Ω load at 10% THD+N, and also
capable of driving 1.5W/ch to dual 8Ω load. The
HM2012 is thermally limited in WCSP and may not
achieve 2.1W/ch for 4Ω.
Notebook computer
Features
Output power
– 2.1W/ch into 4Ω at 5V
– 1.5W/ch into 8Ω at 5V
As a Class D audio power amplifier, the HM2012
supports 90% high efficiency and -75dB PSRR at
217Hz which make the device ideal for
battery-supplied, high quality audio applications.
The HM2012 features independent shutdown controls
for each channel. The gain can be selected to 6, 12,
18, or 24 dB utilizing the G0 and G1 gain select pins.
The HM2012 also features the minimized
click-and-pop noise during the turn-on and
shutdown.
– 750mW/ch into 8Ω at 3.6V
PSRR: -75dB (typical)
CMRR: -70dB (typical)
Efficiency up to 90%
Only two external components required
Independent shutdown control for each channel
Short-circuit and thermal protection
Shutdown current: 1.0μA (typical)
Power supply range: 2.7V to 5.5V)
Packaging
The HM2012 is manufactured in space-saving QFN-20
(4mm x 4mm) and WCSP-16 (2mm x 2mm) package
Applications
-
-
QFN-20 (4mm x 4mm)
WCSP-16 (2mm x 2mm)
Applications
Mobile phone
Pin Out Diagram
Figure1. QFN 20 Top View
Figure2. WCSP 16 Top View
1
HM2012
Ordering Information
P/N
TEMP RANGE
-40°C to +85°C
-40°C to +85°C
PIN-PACKAGE
20 pin QFN
HM2012Q
HM2012W
16 ball WCSP
Note: The HM2012 is thermally limited in WCSP and may not achieve 2.1W/ch for 4Ω.
Absolute Maximum Ratings
Supply Voltage (VDD) in active mode
Supply Voltage (VDD) in shutdown mode
Input Voltage (VI)
-0.3 V to 5.5V
-0.3 V to 6.0V
-0.3V to VDD+0.3V
-40°C to 85°C
Operating Free-air Temperature range (TA)
Operating Junction Temperature range (TJ) -40°C to +125°C
Storage Temperature (TSTG) range
-65°C to +150°C
Operation Ratings
Supply Voltage (VDD)
2.7V to 5.5V
High Level Input Voltage (VIH)
Low Level Input Voltage (VIL)
Operating Temperature (TA)
1.3V to VDD
0 to 0.35V
-40°C to +85°C
Electrical Characteristics
TA=25°C
Symbol
Parameter
Test Conditions
Min
Typ
5
Max
25
Unit
mV
dB
Output offset voltage (measured Inputs ac grounded, AV=6dB,
∣VOO
∣
differentially)
VDD=2.7V to 5.5V
PSRR
CMRR
Power supply rejection ratio
Common mode rejection ratio
VDD=2.7V to 5.5V
-75
-70
-55
-50
Inputs shouted together,
dB
V
V
V
DD=2.7V to 5.5V
DD=5.5V, VI= VDD
DD=5.5V, VI=-0V
∣IIH∣
∣IIL∣
High-level input current
Low-level input current
50
5
μA
μA
VDD=5.5V, no load or output filter
DD=3.6V, no load or output filter
On-state VDD=5.5V
DD=3.6V
Output impedance in SHUTDOWN V(SHOUTDOWN)=0.35V
7.5
5.5
420
520
2
10
8
IDD
Supply current
mA
V
Static
Drain-source
rDS(ON)
mΩ
Resistance
V
kΩ
f(SW)
Switching frequency
VDD=2.7V to 5.5V
G0, G1=0.35V
250
5.5
300
6
350
6.5
kHZ
G0= VDD, G1=0.35V
G0=0.35V, G1= VDD
G0, G1= VDD
11.5
17.5
23.5
12
12.5
18.5
24.5
Closed-loop voltage gain
dB
18
24
2
HM2012
Operating Characteristics
TA=25°C, RL=8Ω
Symbol
Parameter
Test Conditions
Min
Typ
2.1
Max
Unit
THD+N=10%, f=1kHz, RL=4Ω
VDD=5V
Output
channel)
power
(per
PO
W
VDD=5V
1.5
THD+N=10%, f=1kHz, RL=8Ω
VDD=3.6V
0.75
0.14%
0.10%
-85
Total harmonic distortion VDD=5V, PO=1W, AV=6dB, f=1kHz
THD+N
plus noise
V
DD=5V, PO=0.5W, AV=6dB, f=1kHz
Channel crosstalk
f=1KHz
dB
dB
μV
Supply ripple rejection VDD=5V, AV=6dB, f=217Hz
-75
kSVR
Vn
ratio
V
DD=3.6V, AV=6dB, f=217Hz
DD=3.6V, f=20 to 20KHz, No weighting
-70
V
35
Output voltage noise
Inputs ac-grounded, AV=6dB
A weighting
27
Common mode rejection
ratio
CMRR
VDD=3.6V, VIC=1Vpp
f=217Hz
-70
dB
AV=6dB
28.1
17.3
9.8
kΩ
AV=12dB
AV=18dB
AV=24dB
ZI
Input impedance
5.2
Start-up
time
from
VDD=3.6V
3.5
ms
shutdown
Block Diagram
Figure3. Block Diagram
3
HM2012
Terminal Functions
Terminal
I/O
Description
Name
INR+
QFN
16
17
20
19
8
WCSP
D1
C1
A1
I
I
Right channel positive input
Right channel negative input
Left channel positive input
Left channel negative input
INR-
INL+
I
INL-
B1
I
SDR
B3
I
Right channel shutdown terminal (active low)
Left channel shutdown terminal (active low)
Gain select (LSB)
SDL
7
B4
I
G0
15
1
C2
B2
I
G1
I
Gain select (MSB)
PVDD
3,13
9
A2
I
Power supply (Must be same voltage as AVDD)
AVDD
D2
C4
C3
D3
D4
A3
I
Analog supply (Must be same voltage as PVDD
)
PGND
AGND
OUTR+
OUTR-
OUTL+
OUTL-
NC
4,12
18
14
11
2
I
Power ground
I
Power ground
O
O
O
O
Right channel positive differential output
Right channel negative differential output
Left channel positive differential output
Left channel negative differential output
No internal connection
5
A4
6,10
N/A
Thermal Pad
Connect the thermal pad of QFN or PWP package to PCB GND
Application Information
4
HM2012
If the corner frequency is within the audio band, the
capacitors should have a tolerance of ±10% or
better, because any mismatch in capacitance
causes an impedance mismatch at the corner
frequency and below.
Decoupling Capacitor (CS)
The HM2012 is a high-performance Class-D audio
amplifier that requires adequate power supply
decoupling to ensure the efficiency is high and total
harmonic distortion (THD) is low. For higher
frequency transients, spikes, or digital hash on the
line a good low equivalent-series-resistance (ESR)
ceramic capacitor, typically 1µF, placed as close as
possible to the device PVDD lead works best. Placing
this decoupling capacitor close to the HM2012 is
important for the efficiency of the Class-D amplifier,
because any resistance or inductance in the trace
between the device and the capacitor can cause a
loss in efficiency. For filtering lower-frequency noise
signals, a 4.7µF or greater capacitor placed near the
audio power amplifier would also help, but it is not
required in most applications because of the high
PSRR of this device.
Operation with DACs and CODECs
In using Class-D amplifiers with CODECs and DACs,
sometimes there is an increase in the output noise
floor from the audio amplifier. This occurs when
mixing of the output frequencies of the CODEC/DAC
mix with the switching frequencies of the audio
amplifier input stage. The noise increase can be
solved by placing a low-pass filter between the
CODEC/DAC and audio amplifier. This filters off the
high frequencies that cause the problem and allow
proper performance.
Filter Free Operation and Ferrite Bead
Filters
Audio Amplifier Gain Setting
The HM2012 features four internally configured gain
settings. The device gain is selected through the two
gain select pins, G0 and G1. The gain settings are
shown in the following table.
A ferrite bead filter can often be used if the design is
failing radiated emissions without an LC filter and
the frequency sensitive circuit is greater than 1MHz.
This filter functions well for circuits that just have to
pass FCC and CE because FCC and CE only test
radiated emissions greater than 30MHz. When
choosing a ferrite bead, choose one with high
impedance at high frequencies, and very low
impedance at low frequencies. In addition, select a
ferrite bead with adequate current rating to prevent
distortion of the output signal.
G1
0
G2
0
Gain (V/V)
Gain (dB)
RI (KΩ)
28.1
17.3
9.8
2
4
6
0
1
12
18
24
1
0
8
1
1
16
5.2
Gain Setting Table
Input Capacitors (CI)
Use an LC output filter if there are low frequency
(<1MHz) EMI sensitive circuits and/or there are long
leads from amplifier to speaker.
The input capacitors and input resistors form a
high-pass filter with the corner frequency, fC,
determined in Equation 1.
Figure 6 shows typical ferrite bead and LC output
filters.
1
fc
=
(1)
(2πR
I
C )
I
The value of the input capacitor is important to
consider as it directly affects the bass (low
frequency) performance of the circuit. Speakers in
wireless phones cannot usually respond well to low
frequencies, so the corner frequency can be set to
block low frequencies in this application. Not using
input capacitors can increase output offset.
Figure6. Typical ferrite chip bead filter
Equation 2 is used to solve for the input coupling
capacitance.
1
CI
=
(2)
(2πR f )
I
C
5
HM2012
Mechanical Data
WCSP-16
6
HM2012
QFN-20
7
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