HT66FU60A [HOLTEK]
Enhanced A/D Flash Type 8-Bit MCU with EEPROM and UART Interface; 增强A / D型闪存的8位微控制器与EEPROM和UART接口
| 型号： | HT66FU60A |
| 厂家： | 
HOLTEK SEMICONDUCTOR INC |
| 描述： | Enhanced A/D Flash Type 8-Bit MCU with EEPROM and UART Interface |
| 文件： | 总23页 (文件大小：3336K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Enhanced A/D Flash Type 8-Bit MCU with EEPROM and UART Interface
HT66FU60A/HT66FU70A
Revision: V1.00 Date: �oveꢀꢁeꢂ ꢃꢄꢅ ꢃ01ꢃ
HT66FU60A/HT66FU70A
Enhanced A/D Flash Type 8-Bit MCU with EEPROM and UART Interface
Table of Contents
Features............................................................................................................ 3
CPU Featuꢂes ......................................................................................................................... 3
Peꢂipheꢂal Featuꢂes................................................................................................................. 3
UART Module Featuꢂes........................................................................................................... 4
General Description......................................................................................... 4
Selection Table................................................................................................. 5
Block Diagram.................................................................................................. 5
Pin Assignment................................................................................................ 6
Pin Description ................................................................................................ 9
Inteꢂnally Connected Pins ..................................................................................................... 15
Functional Description.................................................................................. 16
Multi-chip Haꢂdwaꢂe Consideꢂations ..................................................................................... 16
Multi-chip Pꢂogꢂaꢀꢀing Consideꢂations ............................................................................... 17
Application Circuits....................................................................................... 19
Package Information ..................................................................................... 20
48-pin LQFP (7ꢀꢀ×7ꢀꢀ) Outline Diꢀensions .................................................................... ꢃ1
64-pin LQFP (7ꢀꢀ×7ꢀꢀ) Outline Diꢀensions .................................................................... ꢃꢃ
Rev. 1.00
ꢃ
�oveꢀꢁeꢂ ꢃꢄꢅ ꢃ01ꢃ
HT66FU60A/HT66FU70A
Enhanced A/D Flash Type 8-Bit MCU with EEPROM and UART Interface
Features
CPU Features
•ꢀ OperatingꢀVoltage:
ꢀ
♦
ꢀ
♦
ꢀ
♦
fSYS=8MHz:ꢀ2.2V~5.5V
fSYS=12MHz:ꢀ2.7V~5.5V
fSYS=16MHz:ꢀ4.5V~5.5V
•ꢀ Upꢀtoꢀ0.25μsꢀinstructionꢀcycleꢀwithꢀ16MHzꢀsystemꢀclockꢀatꢀVDD=5V
•ꢀ Powerꢀdownꢀandꢀwake-upꢀfunctionsꢀtoꢀreduceꢀpowerꢀconsumption
•ꢀ Fiveꢀoscillators
ꢀ
♦
ꢀ
♦
ꢀ
♦
ꢀ
♦
ꢀ
♦
ExternalꢀCrystalꢀ−ꢀHXT
Externalꢀ32.768kHzꢀ−ꢀLXT
ExternalꢀRCꢀ−ꢀERC
InternalꢀRCꢀ−ꢀHIRC
Internalꢀ32kHzꢀRCꢀ−ꢀLIRC
•ꢀ Multi-modeꢀoperation:ꢀNORMAL,ꢀSLOW,ꢀIDLEꢀandꢀSLEEP
•ꢀ Fullyꢀintegratedꢀinternalꢀ8MHzꢀoscillatorꢀrequiresꢀnoꢀexternalꢀcomponents
•ꢀ Allꢀinstructionsꢀexecutedꢀinꢀoneꢀorꢀtwoꢀinstructionꢀcycles
•ꢀ Tableꢀreadꢀinstructions
•ꢀ 63ꢀpowerfulꢀinstructions
•ꢀ Upꢀtoꢀ16-levelꢀsubroutineꢀnesting
•ꢀ Bitꢀmanipulationꢀinstruction
Peripheral Features
×
×
•ꢀ FlashꢀProgramꢀMemory:ꢀ16K 16ꢀ~ꢀ32K 16
×
×
•ꢀ DataꢀMemory:ꢀ1024 8ꢀ~ꢀ2048 8
×
•ꢀ EEPROMꢀMemory:ꢀ128 8
•ꢀ InꢀApplicationꢀProgrammingꢀfunction
•ꢀ WatchdogꢀTimerꢀfunction
•ꢀ Upꢀtoꢀ53ꢀbidirectionalꢀI/Oꢀlines
•ꢀ Softwareꢀcontrolledꢀ4-SCOMꢀlinesꢀLCDꢀdriverꢀwithꢀ1/2ꢀbias
•ꢀ Multipleꢀpin-sharedꢀexternalꢀinterrupts
•ꢀ MultipleꢀTimerꢀModuleꢀforꢀtimeꢀmeasure,ꢀinputꢀcapture,ꢀcompareꢀmatchꢀoutput,ꢀPWMꢀoutputꢀorꢀ
singleꢀpulseꢀoutputꢀfunction
•ꢀ SerialꢀInterfacesꢀModuleꢀ–ꢀSIMꢀforꢀSPIꢀorꢀI2C
•ꢀ SingleꢀsefialꢀSPIꢀinterfaceꢀ–ꢀSPIA
•ꢀ DualꢀComparatorꢀfunctions
•ꢀ DualꢀTime-Baseꢀfunctionsꢀforꢀgenerationꢀofꢀfixedꢀtimeꢀinterruptꢀsignals
•ꢀ Multi-channelꢀ12-bitꢀresolutionꢀA.Dꢀconverter
•ꢀ Lowꢀvoltageꢀresetꢀfunction
•ꢀ Lowꢀvoltageꢀdetectꢀfunction
•ꢀ Wideꢀrangeꢀofꢀavailableꢀpackageꢀtypes
•ꢀ Flashꢀprogramꢀmemoryꢀcanꢀbeꢀre-programmedꢀupꢀtoꢀ100,000ꢀtimes
•ꢀ Flashꢀprogramꢀmemoryꢀdataꢀretentionꢀ>ꢀ10ꢀyears
•ꢀ EEPROMꢀdataꢀmemoryꢀcanꢀbeꢀre-programmedꢀupꢀtoꢀ1,000,000ꢀtimes
•ꢀ EEPROMꢀdataꢀmemoryꢀdataꢀretentionꢀ>ꢀ10ꢀyears
Rev. 1.00
3
�oveꢀꢁeꢂ ꢃꢄꢅ ꢃ01ꢃ
HT66FU60A/HT66FU70A
Enhanced A/D Flash Type 8-Bit MCU with EEPROM and UART Interface
UART Module Features
•ꢀ InterconnectedꢀtoꢀHoltekꢀMCUꢀviaꢀSPIꢀInterface
•ꢀ Full-duplex,ꢀUniversalꢀAsynchronousꢀReceiverꢀandꢀTransmitterꢀ(UART)ꢀcommunication
ꢀ
♦
ꢀ
♦
ꢀ
♦
ꢀ
♦
ꢀ
♦
ꢀ
♦
ꢀ
♦
ꢀ
♦
ꢀ
♦
ꢀ
♦
8-bitꢀorꢀ9-bitꢀcharacterꢀlength
Even,ꢀOddꢀorꢀNoꢀparityꢀoptions
Oneꢀorꢀtwoꢀstopꢀbits
Baudꢀrateꢀgeneratorꢀwithꢀ8-bitꢀprescaler
Parity,ꢀframing,ꢀnoiseꢀandꢀoverrunꢀerrorꢀdetection
Supportꢀforꢀinterruptꢀonꢀaddressꢀdetect
AddressꢀDetectꢀInterruptꢀ–ꢀlastꢀcharacterꢀbit=1
TransmitterꢀandꢀReceiverꢀennabledꢀindependently
4-byteꢀdeepꢀFIFOꢀreceiverꢀdataꢀbuffer
TransmitꢀandꢀReceiveꢀMultipleꢀInterruptꢀGenerationꢀSourcesꢀ
-ꢀTransmitterꢀEmptyꢀ
-ꢀTransmitterꢀIdleꢀ
-ꢀReceiverꢀFullꢀ
-ꢀReceiverꢀOverrunꢀ
-ꢀAddressꢀModeꢀDetect
ꢀ
♦
TXꢀpinꢀisꢀhighꢀimpedanceꢀwhenꢀtheꢀUARTꢀtransmitꢀmoduleꢀisꢀdisabled
RXꢀpinꢀisꢀhighꢀimpedanceꢀwhenꢀtheꢀUARTꢀReceiveꢀmoduleꢀisꢀdisabled
ꢀ
♦
•ꢀ CMOSꢀclockꢀinput,ꢀCLKI,ꢀupꢀtoꢀ20MHzꢀatꢀ5Vꢀoperatingꢀvoltage
General Description
TheꢀHT66FU60A/HT66FU70AꢀseriesꢀofꢀdevicesꢀareꢀFlashꢀMemoryꢀA/Dꢀtypeꢀ8-bitꢀhighꢀperformanceꢀ
RISCꢀarchitectureꢀmicrocontrollers,ꢀdesignedꢀforꢀaꢀwideꢀrangeꢀofꢀapplications.ꢀOfferingꢀusersꢀtheꢀ
convenienceꢀofꢀFlashꢀMemoryꢀmulti-programmingꢀfeatures,ꢀtheseꢀdevicesꢀalsoꢀincludeꢀaꢀwideꢀrangeꢀ
ofꢀfunctionsꢀandꢀfeatures.ꢀOtherꢀmemoryꢀincludesꢀanꢀareaꢀofꢀRAMꢀDataꢀMemoryꢀasꢀwellꢀasꢀanꢀareaꢀ
ofꢀEEPROMꢀmemoryꢀforꢀstorageꢀofꢀnon-volatileꢀdataꢀsuchꢀasꢀserialꢀnumbers,ꢀcalibrationꢀdataꢀetc.
Analogꢀfeaturesꢀincludeꢀaꢀmulti-channelꢀ12-bitꢀA/Dꢀconverterꢀandꢀdualꢀcomparatorꢀfunctions.ꢀ
MultipleꢀandꢀextremelyꢀflexibleꢀTimerꢀModulesꢀprovideꢀtiming,ꢀpulseꢀgenerationꢀandꢀPWMꢀ
generationꢀfunctions.ꢀCommunicationꢀwithꢀtheꢀoutsideꢀworldꢀisꢀcateredꢀforꢀbyꢀincludingꢀfullyꢀ
integratedꢀSPIꢀorꢀI2Cꢀinterfaceꢀfunctions,ꢀtwoꢀpopularꢀinterfacesꢀwhichꢀprovideꢀdesignersꢀwithꢀaꢀ
meansꢀofꢀeasyꢀcommunicationꢀwithꢀexternalꢀperipheralꢀhardware.ꢀProtectiveꢀfeaturesꢀsuchꢀasꢀanꢀ
internalꢀWatchdogꢀTimer,ꢀLowꢀVoltageꢀResetꢀandꢀLowꢀVoltageꢀDetectorꢀcoupledꢀwithꢀexcellentꢀ
noiseꢀimmunityꢀandꢀESDꢀprotectionꢀensureꢀthatꢀreliableꢀoperationꢀisꢀmaintainedꢀinꢀhostileꢀelectricalꢀ
environments.ꢀAꢀfullꢀchoiceꢀofꢀHXT,ꢀLXT,ꢀERC,ꢀHIRCꢀandꢀLIRCꢀoscillatorꢀfunctionsꢀareꢀprovidedꢀ
includingꢀaꢀfullyꢀintegratedꢀsystemꢀoscillatorꢀwhichꢀrequiresꢀnoꢀexternalꢀcomponentsꢀforꢀitsꢀ
implementation.ꢀTheꢀabilityꢀtoꢀoperateꢀandꢀswitchꢀdynamicallyꢀbetweenꢀaꢀrangeꢀofꢀoperatingꢀmodesꢀ
usingꢀdifferentꢀclockꢀsourcesꢀgivesꢀusersꢀtheꢀabilityꢀtoꢀoptimiseꢀmicrocontrollerꢀoperationꢀandꢀ
minimiseꢀpowerꢀconsumption.
TheꢀUARTꢀmoduleꢀisꢀcontainedꢀinꢀthisꢀseriesꢀofꢀdevices.ꢀItꢀcanꢀsupportꢀtheꢀapplicationsꢀsuchꢀasꢀdataꢀ
communicationꢀnetworksꢀbetweenꢀmicrocontrollers,ꢀlow-costꢀdataꢀlinksꢀbetweenꢀPCsꢀandꢀperipheralꢀ
devices,ꢀportableꢀandꢀbatteryꢀoperatedꢀdeviceꢀcommunication,ꢀetc.
TheꢀinclusionꢀofꢀflexibleꢀI/Oꢀprogrammingꢀfeatures,ꢀTime-Baseꢀfunctionsꢀalongꢀwithꢀmanyꢀotherꢀ
featuresꢀensureꢀthatꢀtheꢀdevicesꢀwillꢀfindꢀexcellentꢀuseꢀinꢀapplicationsꢀsuchꢀasꢀelectronicꢀmetering,ꢀ
environmentalꢀmonitoring,ꢀhandheldꢀinstruments,ꢀhouseholdꢀappliances,ꢀelectronicallyꢀcontrolledꢀ
tools,ꢀmotorꢀdrivingꢀinꢀadditionꢀtoꢀmanyꢀothers.
Rev. 1.00
4
�oveꢀꢁeꢂ ꢃꢄꢅ ꢃ01ꢃ
HT66FU60A/HT66FU70A
Enhanced A/D Flash Type 8-Bit MCU with EEPROM and UART Interface
Selection Table
Mostꢀfeaturesꢀareꢀcommonꢀtoꢀallꢀdevices.ꢀTheꢀmainꢀfeaturesꢀdistinguishingꢀthemꢀareꢀProgramꢀ
MemoryꢀandꢀDataꢀMemoryꢀcapacity.ꢀTheꢀfollowingꢀtableꢀsummarisesꢀtheꢀmainꢀfeaturesꢀofꢀeachꢀ
device.
Program
Memory
Data
Memory
Data
EEPROM
External
Interrupt
A/D
Converter
Part No.
I/O
×
×
×
×
×
×
1ꢃ-ꢁit 1ꢃ
HT66FU60A
HT66FU70A
16K 16
10ꢃ4
ꢃ048
8
8
1ꢃ8
1ꢃ8
8
8
53
53
4
4
×
×
3ꢃK 16
1ꢃ-ꢁit 1ꢃ
Time
Base
Part No.
Timer Module
SIM
SPIA
Comparators
UART
Stacks
Package
×
×
×
10-ꢁit CTM
16-ꢁit STM
10-ꢁit ETM
ꢃ
3
1
48/64
LQFP
HT66FU60A
√
√
ꢃ
ꢃ
ꢃ
√
16
×
×
×
10-ꢁit CTM
16-ꢁit STM
10-ꢁit ETM
ꢃ
3
1
48/64
LQFP
HT66FU70A
√
√
ꢃ
√
16
Note:ꢀAsꢀdevicesꢀexistꢀinꢀmoreꢀthanꢀoneꢀpackageꢀformat,ꢀtheꢀtableꢀreflectsꢀtheꢀsituationꢀforꢀtheꢀ
packageꢀwithꢀtheꢀmostꢀpins.
Block Diagram
Theꢀfollowingꢀblockꢀdiagramꢀillustratesꢀtheꢀdual-chipꢀstructureꢀofꢀtheꢀdevices,ꢀwhereꢀanꢀindividualꢀ
MCUꢀandꢀSPIꢀtoꢀUARTꢀchipsꢀareꢀcombinedꢀintoꢀaꢀsingleꢀpackage.
Rev. 1.00
5
�oveꢀꢁeꢂ ꢃꢄꢅ ꢃ01ꢃ
HT66FU60A/HT66FU70A
Enhanced A/D Flash Type 8-Bit MCU with EEPROM and UART Interface
Watchdog
Timer
Reset
Circuit
Stack
8-bit
RISC
MCU
Core
Interrupt
Controller
OCDS / ICP
LVD
LVR
External
Oscillators
ERC/HXT/LXT
Time
Bases
RAM
EEPROM
Flash
ROM
Internal
Osillators
HIRC/LIRC
12-bit A/D
Converter
IO
UART
SIM
SPIA
STMs
ETM
CTMs
Comparators
Pin Assignment
48 47 46 45 44 43 42 41 40 39 38 37
36
1
PF1/A�11/C1P
PD6/SCK/SCL
2
35
34
33
32
31
30
29
28
27
26
25
PF0/A�10/C1�
PE7/A�ꢄ/I�T1
PE6/A�8/I�T0
VSS
PCꢃ/PCK/TCKꢃ/C0X
3
PC3/PI�T/TPꢃ/TPꢃB/TPꢃI/C1X
4
RX
5
TX
HT66FU60A/HT66FU70A
48 LQFP-A
6
VDD
�C
7
PB4/XTꢃ
�C
8
PB3/XT1
�C
9
VSSꢃ
�C
10
11
12
PB1/OSC1
PBꢃ/OSCꢃ
PE5/TP3/TP3B
�C
�C
PD4/TPꢃ/TPꢃB/TPꢃI
13 14 15 16 17 18 19 20 21 22 23 24
Rev. 1.00
6
�oveꢀꢁeꢂ ꢃꢄꢅ ꢃ01ꢃ
HT66FU60A/HT66FU70A
Enhanced A/D Flash Type 8-Bit MCU with EEPROM and UART Interface
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
1
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
PH0/TP0/TP0B/A�0/VREF/C0X
PF1/A�11/C1P
PF0/A�10/C1�
PE7/A�ꢄ/I�T1
PE6/A�8/I�T0
PF6
PH5/SDOA
2
PB7/SDI/SDA
3
PD6/SCK/SCL
4
PCꢃ/PCK/TCKꢃ/C0X
5
PC3/PI�T/TPꢃ/TPꢃB/TPꢃI/C1X
6
RX
7
VSS
TX
HT66FU60A/HT66FU70A
64 LQFP-A
8
VDD
�C
9
PB4/XTꢃ
�C
10
11
12
13
14
15
16
PB3/XT1
�C
VSSꢃ
�C
PB1/OSC1
PBꢃ/OSCꢃ
PF4
�C
�C
PGꢃ/TCK4
PF3
PG3/TP4/TP4B/TP4I
PG4/TP4/TP4B/TP4I
PE5/TP3/TP3B
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
48 47 46 45 44 43 42 41 40 39 38 37
36
1
PF1/A�11/C1P
PF0/A�10/C1�
PE7/A�ꢄ/I�T1
PE6/A�8/I�T0
VSS
PD6/SCK/SCL
2
35
34
33
32
31
30
29
28
27
26
25
PCꢃ/PCK/TCKꢃ/C0X
3
PC3/PI�T/TPꢃ/TPꢃB/TPꢃI/C1X
4
RX
5
TX
HT66VU60A/HT66VU70A
48 LQFP-A
6
VDD
�C
7
PB4/XTꢃ
�C
8
PB3/XT1
�C
9
VSSꢃ
�C
10
11
12
PB1/OSC1
PBꢃ/OSCꢃ
PE5/TP3/TP3B
�C
�C
PD4/TPꢃ/TPꢃB/TPꢃI
13 14 15 16 17 18 19 20 21 22 23 24
Rev. 1.00
7
�oveꢀꢁeꢂ ꢃꢄꢅ ꢃ01ꢃ
HT66FU60A/HT66FU70A
Enhanced A/D Flash Type 8-Bit MCU with EEPROM and UART Interface
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
1
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
PH0/TP0/TP0B/A�0/VREF/C0X
PF1/A�11/C1P
PF0/A�10/C1�
PE7/A�ꢄ/I�T1
PE6/A�8/I�T0
PF6
PH5/SDOA
2
PB7/SDI/SDA
3
PD6/SCK/SCL
4
PCꢃ/PCK/TCKꢃ/C0X
5
PC3/PI�T/TPꢃ/TPꢃB/TPꢃI/C1X
6
RX
7
VSS
TX
HT66VU60A/HT66VU70A
64 LQFP-A
8
VDD
�C
9
PB4/XTꢃ
�C
10
11
12
13
14
15
16
PB3/XT1
�C
VSSꢃ
�C
PB1/OSC1
PBꢃ/OSCꢃ
PF4
�C
�C
PGꢃ/TCK4
PF3
PG3/TP4/TP4B/TP4I
PG4/TP4/TP4B/TP4I
PE5/TP3/TP3B
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
Note:ꢀ1.ꢀIfꢀtheꢀpin-sharedꢀpinꢀfunctionsꢀhaveꢀmultipleꢀoutputsꢀsimultaneously,ꢀtheꢀpin-sharedꢀfunctionꢀisꢀ
determinedꢀbyꢀtheꢀcorrespondingꢀsoftwareꢀcontrolꢀbitsꢀexceptꢀtheꢀfunctionsꢀdeterminedꢀbyꢀtheꢀ
configurationꢀoptions.
2.ꢀTheꢀHT66VU60A/HT66VU70AꢀdeviceꢀisꢀtheꢀEVꢀchipꢀofꢀtheꢀHT66FU60A/HT66FU70Aꢀseriesꢀofꢀ
devices.ꢀItꢀsupportsꢀtheꢀ“On-ChipꢀDebug”ꢀfunctionꢀforꢀdebuggingꢀduringꢀdevelopmentꢀusingꢀtheꢀ
OCDSDAꢀandꢀOCDSCKꢀpinsꢀconnectedꢀtoꢀtheꢀHoltekꢀHT-IDEꢀdevelopmentꢀtools.ꢀReferꢀtoꢀtheꢀ
OCDSꢀsectionꢀofꢀtheꢀMCUꢀdatasheetꢀforꢀmoreꢀdetails.
Rev. 1.00
8
�oveꢀꢁeꢂ ꢃꢄꢅ ꢃ01ꢃ
HT66FU60A/HT66FU70A
Enhanced A/D Flash Type 8-Bit MCU with EEPROM and UART Interface
Pin Description
Withꢀtheꢀexceptionꢀofꢀtheꢀpowerꢀpins,ꢀallꢀpinsꢀonꢀtheseꢀdevicesꢀcanꢀbeꢀreferencedꢀbyꢀtheirꢀPortꢀname,ꢀ
e.g.ꢀPA.0,ꢀPA.1ꢀetc,ꢀwhichꢀreferꢀtoꢀtheꢀdigitalꢀI/Oꢀfunctionꢀofꢀtheꢀpins.ꢀHoweverꢀtheseꢀPortꢀpinsꢀareꢀ
alsoꢀsharedꢀwithꢀotherꢀfunctionꢀsuchꢀasꢀtheꢀAnalogꢀtoꢀDigitalꢀConverter,ꢀSerialꢀPortꢀpins,ꢀetc.ꢀTheꢀ
functionꢀofꢀeachꢀpinꢀisꢀlistedꢀinꢀtheꢀfollowingꢀtables,ꢀhoweverꢀtheꢀdetailsꢀbehindꢀhowꢀeachꢀpinꢀisꢀ
configuredꢀisꢀcontainedꢀinꢀindividualꢀMCUꢀandꢀSPIꢀtoꢀUARTꢀchipꢀdatasheet.ꢀTheꢀimportantꢀpointꢀtoꢀ
noteꢀhereꢀisꢀthatꢀsomeꢀI/Oꢀlinesꢀareꢀnotꢀbondedꢀtoꢀtheꢀexternalꢀpins.ꢀUsersꢀshouldꢀtakeꢀspecialꢀcareꢀofꢀ
theseꢀI/Oꢀportꢀlines.ꢀReferꢀtoꢀtheꢀHardwareꢀConsiderationsꢀsectionꢀforꢀmoreꢀdetails.
Pad Name
Function OPT
I/T
O/T
Description
PAWU
PA0
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled
pull-up and wake-up.
ST
CMOS
PAPU
PA0/ICPDA/OCDSDA
ICPDA
—
—
ST
ST
CMOS ICP Data/Addꢂess
OCDSDA
CMOS OCDS Data/Addꢂessꢅ foꢂ EV chip only.
PAWU
PAPU
PAS0
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled
pull-up and wake-up.
PA1
ST
CMOS
PA1/TP1A/TP1IA/A�1
PAꢃ /ICPCK/OCDSCK
TP1A
TP1IA
A�1
PAS0
IFSꢃ
—
ST
A�
CMOS TM1 A output
—
—
TM1 A input
PAS0
A/D Conveꢂteꢂ analog input
PAWU
PAPU
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled
pull-up and wake-up.
PAꢃ
ST
CMOS
ICPCK
—
—
ST
ST
CMOS ICP Clock pin
OCDSCK
—
OCDS Clock pinꢅ foꢂ EV chip only.
PAWU
PAPU
PAS1
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled
pull-up and wake-up.
PA3
ST
ST
CMOS
I�TEG
I�TC0
IFS0
PA3/I�T0/A�3/C0�
I�T0
—
Exteꢂnal Inteꢂꢂupt 0
A�3
C0�
PAS1
PAS1
A�
A�
—
—
A/D Conveꢂteꢂ analog input
Coꢀpaꢂatoꢂ 0 inveꢂting input
PAPU
PAWU
PASꢃ
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled
pull-up and wake-up.
PA4
ST
ST
CMOS
—
I�TEG
I�TC0
IFS0
PA4/I�T1/TCK1/A�4
I�T1
Exteꢂnal Inteꢂꢂupt 1
TCK1
A�4
IFS1
ST
A�
—
—
TM1 input
PAS1
A/D Conveꢂteꢂ analog input
PAWU
PAPU
PASꢃ
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled
pull-up and wake-up.
PA5
ST
CMOS
PA5/SDO/A�5/C1X
SDO
A�5
C1X
PASꢃ
PASꢃ
PASꢃ
—
A�
—
CMOS SPI data output
—
A/D Conveꢂteꢂ analog input
CMOS Coꢀpaꢂatoꢂ 1 output
Rev. 1.00
ꢄ
�oveꢀꢁeꢂ ꢃꢄꢅ ꢃ01ꢃ
HT66FU60A/HT66FU70A
Enhanced A/D Flash Type 8-Bit MCU with EEPROM and UART Interface
Pad Name
Function OPT
I/T
O/T
Description
PAWU
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled
pull-up and wake-up.
PA6
SDI
PAPU
PAS3
PAS3
IFS4
ST
CMOS
ST
—
SPI data input
PA6/SDI/SDA/A�6
PAS3
IFS4
SDA
A�6
ST
A�
�MOS IꢃC data line
PAS3
—
A/D Conveꢂteꢂ analog input
PAWU
PAPU
PAS3
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled
pull-up and wake-up.
PA7
ST
ST
CMOS
PAS3
IFS4
SCK
CMOS SPI seꢂial clock
�MOS IꢃC clock line
PA7/SCK/SCL/A�7
PAS3
IFS4
SCL
A�7
PB0
RES
PB1
ST
A�
ST
ST
ST
PAS3
PBPU
CO
—
A/D Conveꢂteꢂ analog input
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled
pull-up
CMOS
—
PB0/RES
Reset pin
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled
pull-up
PBPU
CMOS
PB1/OSC1
HXT/ERC oscillatoꢂ pin & EC ꢀode
input pin
OSC1
CO
HXT
—
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled
pull-up
PBꢃ
OSCꢃ
PB3
XT1
PBPU
CO
ST
—
CMOS
PBꢃ/OSCꢃ
PB3/XT1
PB4/XTꢃ
HXT HXT oscillatoꢂ pin
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled
pull-up
PBPU
CO
ST
LXT
ST
—
CMOS
—
LXT oscillatoꢂ pin
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled
pull-up
PB4
XTꢃ
PBPU
CO
CMOS
LXT LXT oscillatoꢂ pin
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled
PBPU
PBSꢃ
PB5
ST
CMOS
pull-up
PB5/SCS
PBSꢃ
IFS4
SCS
PB7
SDI
ST
ST
ST
ST
ST
CMOS SPI slave select
PBPU
PBS3
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled
pull-up and wake-up.
CMOS
—
PBS3
IFS4
PB7/SDI/SDA
SPI data input
PBS3
IFS4
SDA
PC0
�MOS IꢃC data line
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled
PCPU
PCS0
CMOS
pull-up
TP1B
TP1BB
TP1IB
PCS0
PCS0
IFSꢃ
—
—
CMOS TM1 B output
PC0/TP1B/TP1BB/TP1IB/SCOM0
CMOS TM1 inveꢂted B output
ST
—
—
TM1 B input
SCOM0
PCS0
SCOM LCD coꢀꢀon output
Rev. 1.00
10
�oveꢀꢁeꢂ ꢃꢄꢅ ꢃ01ꢃ
HT66FU60A/HT66FU70A
Enhanced A/D Flash Type 8-Bit MCU with EEPROM and UART Interface
Pad Name
Function OPT
I/T
O/T
Description
PCPU
PC1
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled
pull-up
ST
CMOS
PCS0
TP1B
TP1BB
TP1IB
PCS0
PCS0
IFSꢃ
—
—
CMOS TM1 B output
PC1/TP1B/TP1BB/TP1IB/SCOM1
CMOS TM1 inveꢂted B output
ST
—
—
TM1 B input
SCOM LCD coꢀꢀon output
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled
SCOM1
PCS0
PCPU
PCS1
PCꢃ
ST
CMOS
pull-up
CMOS Peꢂipheꢂal clock output
TMꢃ input
CMOS Coꢀpaꢂatoꢂ 0 output
PCK
TCKꢃ
C0X
PCS1
IFS1
—
ST
—
PCꢃ/PCK/TCKꢃ/C0X
—
PCS1
PCPU
PCS1
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled
pull-up
PC3
ST
CMOS
−
PI�T
TPꢃ
IFS0
PCS1
PCS1
IFSꢃ
ST
—
Peꢂipheꢂal inteꢂꢂupt
CMOS TMꢃ output
PC3/PI�T/TPꢃ/TPꢃB/TPꢃI/C1X
TPꢃB
TPꢃI
C1X
—
CMOS TMꢃ inveꢂted output
ST
—
—
TMꢃ input
CMOS Coꢀpaꢂatoꢂ 1 output
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled
PCS1
PCPU
PCS3
PC6
ST
CMOS
pull-up
SCOMꢃ
TP0
PCS3
PCS3
PCS3
—
—
—
SCOM LCD coꢀꢀon output
CMOS TM0 output
PC6/SCOMꢃ/TP0/TP0B
PC7/SCOM3/TP1A/TP1IA
TP0B
CMOS TM0 inveꢂted output
PCPU
PCS3
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled
pull-up
PC7
ST
CMOS
SCOM3
TP1A
PCS3
PCS3
IFSꢃ
—
—
SCOM LCD coꢀꢀon output
CMOS TM1 A output
TP1IA
ST
—
TM1 A input
PDPU
PDSꢃ
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled
pull-up
PD4
ST
CMOS
TPꢃ
TPꢃB
TPꢃI
PDSꢃ
PDSꢃ
IFSꢃ
—
—
CMOS TMꢃ output
PD4/TPꢃ/TPꢃB/TPꢃI
PD5/TP0/TP0B
CMOS TMꢃ inveꢂted output
ST
—
TMꢃ input
PDPU
PDSꢃ
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled
pull-up
PD5
ST
CMOS
TP0
PDSꢃ
PDSꢃ
—
—
CMOS TM0 output
TP0B
CMOS TM0 inveꢂted output
PDPU
PDS3
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled
pull-up
PD6
SCK
SCL
ST
ST
ST
CMOS
PDS3
IFS4
PD6/SCK/SCL
CMOS SPI seꢂial clock
�MOS IꢃC clock line
PDS3
IFS4
Rev. 1.00
11
�oveꢀꢁeꢂ ꢃꢄꢅ ꢃ01ꢃ
HT66FU60A/HT66FU70A
Enhanced A/D Flash Type 8-Bit MCU with EEPROM and UART Interface
Pad Name
Function OPT
I/T
O/T
Description
PEPU
PE0
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled
pull-up
ST
CMOS
PES0
PES0
SCSA
ST
ST
CMOS SPIA slave select
IFS5
PE0/SCSA/I�T0
I�TEG
I�T0
I�TC0
IFS0
—
Exteꢂnal Inteꢂꢂupt 0
PEPU
PES0
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled
pull-up
PE1
ST
ST
CMOS
PES0
IFS5
SCKA
CMOS SPIA seꢂial clock
PE1/SCKA/I�T1
PEꢃ/SDIA/I�Tꢃ
I�TEG
I�TC0
IFS0
I�T1
ST
—
Exteꢂnal Inteꢂꢂupt 1
PEPU
PES1
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled
pull-up
PEꢃ
ST
ST
CMOS
SDIA
IFS5
CMOS SPI seꢂial clock
I�TEG
I�TC3
IFS0
I�Tꢃ
ST
—
Exteꢂnal Inteꢂꢂupt ꢃ
PEPU
PES1
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled
pull-up
PEꢃ
ST
CMOS
PE3/SDOA/TCK3
PE4/TP1B/TP1BB/TP1IB
PE5/TP3/TP3B
SDOA
TCK3
PES1
IFS1
ST
ST
CMOS SPIA seꢂial clock
—
TM3 input
PEPU
PESꢃ
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled
pull-up
PE4
ST
CMOS
TP1B
TP1BB
TP1IB
PESꢃ
PESꢃ
IFSꢃ
—
—
CMOS TM1 B output
CMOS TM1 inveꢂted B output
ST
—
TM1 B input
PEPU
PESꢃ
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled
pull-up
PE5
ST
CMOS
TP3
PESꢃ
PESꢃ
—
—
CMOS TM3 output
TP3B
CMOS TM3 inveꢂted output
PEPU
PES3
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled
pull-up
PE6
A�8
ST
A�
CMOS
—
PES3
A/D Conveꢂteꢂ analog input
PE6/A�8/I�T0
I�TEG
I�TC0
IFS0
I�T0
ST
—
Exteꢂnal Inteꢂꢂupt 0
PEPU
PES3
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled
pull-up
PE7
A�ꢄ
ST
A�
CMOS
—
PES3
A/D Conveꢂteꢂ analog input
PE7/A�ꢄ/I�T1
PF0/A�10/C1�
I�TEG
I�TC0
IFS0
I�T1
ST
—
Exteꢂnal Inteꢂꢂupt 1
PFPU
PFS0
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled
pull-up
PF0
ST
CMOS
A�10
C1�
PFS0
PFS0
A�
A�
—
—
A/D Conveꢂteꢂ analog input
Coꢀpaꢂatoꢂ 1 inveꢂting input
Rev. 1.00
1ꢃ
�oveꢀꢁeꢂ ꢃꢄꢅ ꢃ01ꢃ
HT66FU60A/HT66FU70A
Enhanced A/D Flash Type 8-Bit MCU with EEPROM and UART Interface
Pad Name
Function OPT
I/T
O/T
Description
PFPU
PF1
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled
pull-up
ST
CMOS
PFS0
PF1/A�11/C1P
A�11
C1P
PFS0
PFS0
A�
A�
—
—
A/D Conveꢂteꢂ analog input
Coꢀpaꢂatoꢂ 1 non-inveꢂting input
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled
pull-up
PFꢃ~PF6
PG0/C0X
PFn
PFPU
ST
CMOS
CMOS
PGPU
PGS0
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled
pull-up
PG0
C0X
PG1
C1X
PGꢃ
TCK4
PG3
ST
—
PGS0
CMOS Coꢀpaꢂatoꢂ 0 output
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled
pull-up
CMOS Coꢀpaꢂatoꢂ 1 output
PGPU
PGS0
ST
—
CMOS
PG1/C1X
PGS0
PGPU
—
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled
pull-up
ST
ST
ST
CMOS
—
PGꢃ/TCK4
TM4 input
PGPU
PGS1
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled
pull-up
CMOS
TP4
TP4B
TP4I
PGS1
PGS1
IFS3
—
—
CMOS TM4 output
PG3/TP4/TP4B/TP4I
CMOS TM4 inveꢂted output
ST
—
TM4 input
PGPU
PGSꢃ
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled
pull-up
PG4
ST
CMOS
TP4
TP4B
TP4I
PGSꢃ
PGSꢃ
IFS3
—
—
CMOS TM4 output
PG4/TP4/TP4B/TP4I
PG5/TCK5
CMOS TM4 inveꢂted output
ST
—
TM4 input
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled
pull-up
PG5
TCK5
PG6
PGPU
ST
ST
ST
CMOS
—
—
TM5 input
PGPU
PGS3
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled
pull-up
CMOS
TP5
TP5B
TP5I
PGS3
PGS3
IFS3
—
—
CMOS TM5 output
PG6/TP5/TP5B/TP5I
CMOS TM5 inveꢂted output
ST
—
TM5 input
PGPU
PGS3
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled
pull-up
PG7
ST
CMOS
TP5
TP5B
TP5I
PGS3
PGS3
IFS3
—
—
CMOS TM5 output
PG7/TP5/TP5B/TP5I
CMOS TM5 inveꢂted output
ST
—
TM5 input
PHPU
PHS0
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled
pull-up
PH0
ST
CMOS
TP0
TP0B
A�0
PHS0
PHS0
PHS0
PHS0
PHS0
—
—
CMOS TM0 output
CMOS TM0 inveꢂted output
PH0/TP0/TP0B/A�0/VREF/C0X
A�
A�
—
—
—
A/D Conveꢂteꢂ analog input
A/D Conveꢂteꢂ ꢂefeꢂence input
VREF
C0X
CMOS Coꢀpaꢂatoꢂ 0 output
Rev. 1.00
13
�oveꢀꢁeꢂ ꢃꢄꢅ ꢃ01ꢃ
HT66FU60A/HT66FU70A
Enhanced A/D Flash Type 8-Bit MCU with EEPROM and UART Interface
Pad Name
Function OPT
I/T
O/T
Description
PHPU
PH1
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled
pull-up
ST
CMOS
PHS0
TCK0
A�ꢃ
IFS1
PHS0
PHS0
ST
A�
A�
—
—
—
TM0 input
PH1/TCK0/A�ꢃ/C0P
A/D Conveꢂteꢂ analog input
Coꢀpaꢂatoꢂ 0 non-inveꢂting input
C0P
PHPU
PHS1
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled
pull-up
PHꢃ
SCSA
PH3
ST
ST
ST
ST
CMOS
PHꢃ/SCSA
PH3/SCKA
PHS1
IFS5
CMOS SPIA slave select
PHPU
PHS1
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled
CMOS
pull-up
CMOS SPIA seꢂial clock
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled
pull-up
CMOS SPIA seꢂial data input
Geneꢂal puꢂpose I/O. Registeꢂ enaꢁled
PHS1
IFS5
SCKA
PH4
SDIA
PH5
PHPU
ST
ST
ST
ST
ST
CMOS
PH4/SDIA
IFS5
PHPU
PHSꢃ
CMOS
pull-up
CMOS SPIA seꢂial data output
PH5/SDOA
SDOA
RX
PHSꢃ
UCR1*
UCRꢃ*
RX
TX
—
UART RX seꢂial data input pin.
UCR1*
UCRꢃ*
TX
—
CMOS UART TX seꢂial data output pin.
�C
�C
VDD
VSS
VSSꢃ
—
—
—
—
—
—
—
—
—
�ot connected.
VDD
VSS
VSSꢃ
PWR
PWR
PWR
Positive Poweꢂ supply.
�egative Poweꢂ supply. Gꢂound.
I/O Pad Poweꢂ supply. Gꢂound.
Legend:ꢀI/T:ꢀInputꢀtype;ꢀO/T:ꢀOutputꢀtype
OPT:ꢀOptionalꢀbyꢀconfigurationꢀoptionꢀ(CO)ꢀorꢀregisterꢀoption
PWR:ꢀPower;ꢀꢀCO:ꢀConfigurationꢀoption
ST:ꢀSchmittꢀTriggerꢀinput;ꢀSCOM:ꢀSoftwareꢀcontrolledꢀLCDꢀCOM;
CMOS:ꢀCMOSꢀoutput;ꢀꢀNMOS:ꢀNMOSꢀoutput
HXT:ꢀHighꢀfrequencyꢀcrystalꢀoscillator
LXT:ꢀLowꢀfrequencyꢀcrystalꢀoscillator
*ꢀTheꢀUCR1ꢀandꢀUCR2ꢀregistersꢀareꢀcontainedꢀinꢀtheꢀHT45B0Fꢀchipꢀandꢀusedꢀtoꢀconfigureꢀ
variousꢀoptionsꢀofꢀtheꢀTXꢀandꢀRXꢀfunctionsꢀinꢀtheꢀUARTꢀmodule.
Rev. 1.00
14
�oveꢀꢁeꢂ ꢃꢄꢅ ꢃ01ꢃ
HT66FU60A/HT66FU70A
Enhanced A/D Flash Type 8-Bit MCU with EEPROM and UART Interface
Internally Connected Pins
Amongꢀtheꢀpinsꢀmentionedꢀinꢀtheꢀtablesꢀaboveꢀseveralꢀpinsꢀareꢀnotꢀconnectedꢀtoꢀexternalꢀpackageꢀ
pins.ꢀTheseꢀpinsꢀareꢀinterconnectionꢀpinsꢀbetweenꢀtheꢀMCUꢀandꢀtheꢀSPIꢀtoꢀUARTꢀchipsꢀandꢀareꢀ
listedꢀinꢀtheꢀfollowingꢀtable.ꢀTheꢀdescriptionꢀisꢀprovidedꢀfromꢀtheꢀSPIꢀtoꢀUARTꢀchipꢀstandpoint.
SPI-to-UART Chip
Type
Description
Slave SPI Seꢂial Data In Input Signal
Pin Name
SDI
I
O
I
Inteꢂnally connected to the MCU Masteꢂ SPI SDO output signal
Slave SPI Seꢂial Data Out Output Signal
Inteꢂnally connected to the MCU Masteꢂ SPI SDI input signal
SDO
SCK
Slave SPI Seꢂial Clock Input Signal
Inteꢂnally connected to the MCU Masteꢂ SPI SCK output signal
Slave SPI Device Select Input Signal
I
I
Inteꢂnally connected to the MCU Masteꢂ SPI SCS output signal – connected to
pull high ꢂesistoꢂ
SCS
Clock Input Signal
Inteꢂnally connected to the MCU Masteꢂ PCK output signal
CLKI
UART Inteꢂꢂupt Output Signal
O
Inteꢂnally connected to the MCU Masteꢂ PI�T input signal
A UART ꢂelated inteꢂꢂupt will geneꢂate a low pulse signal on this line
I�T
Rev. 1.00
15
�oveꢀꢁeꢂ ꢃꢄꢅ ꢃ01ꢃ
HT66FU60A/HT66FU70A
Enhanced A/D Flash Type 8-Bit MCU with EEPROM and UART Interface
Functional Description
Asꢀtheseꢀdevicesꢀpackagesꢀcontainꢀmultipleꢀinternalꢀchips,ꢀforꢀaꢀdetailedꢀfunctionalꢀdescription,ꢀusersꢀ
mustꢀreferꢀtoꢀtheꢀrelevantꢀindividualꢀdatasheetsꢀforꢀbothꢀtheꢀMCUꢀandꢀtheꢀSPIꢀtoꢀUARTꢀchip.ꢀTheꢀ
followingꢀtableꢀshowsꢀwhichꢀindividualꢀdevicesꢀareꢀinsideꢀeachꢀpackage.
Individual chips
Device Part No.
MCU chip
HT66F60A
HT66F70A
SPI to UART chip
HT66FU60A
HT66FU70A
HT45B0F
Althoughꢀmostꢀofꢀtheꢀfunctionalꢀdescriptionꢀmaterialꢀwillꢀbeꢀlocatedꢀinꢀtheꢀindividualꢀdatasheets,ꢀ
thereꢀareꢀsomeꢀspecialꢀconsiderationsꢀwhichꢀneedꢀtoꢀbeꢀtakenꢀintoꢀaccountꢀwhenꢀusingꢀmulti-chipꢀ
devices.ꢀTheseꢀpointsꢀwillꢀbeꢀmentionedꢀinꢀtheꢀhardwareꢀandꢀsoftwareꢀconsiderationꢀsections.
Multi-chip Hardware Considerations
Asꢀtheseꢀsingle-packageꢀmulti-chipꢀdevicesꢀareꢀcomposedꢀofꢀanꢀindividualꢀMCUꢀandꢀSPIꢀtoꢀUARTꢀ
chips,ꢀusingꢀthemꢀtogetherꢀrequiresꢀtheꢀuserꢀtoꢀtakeꢀcareꢀofꢀsomeꢀspecialꢀpoints.
Absolute Maximum Ratings
Asꢀtheseꢀsingle-packageꢀmulti-chipꢀdevicesꢀareꢀcomposedꢀofꢀanꢀindividualꢀMCUꢀandꢀSPIꢀtoꢀUARTꢀ
chips,ꢀusingꢀthemꢀtogetherꢀrequiresꢀtheꢀuserꢀtoꢀtakeꢀcareꢀofꢀsomeꢀspecialꢀpoints.
Power Supply
Toꢀcalculateꢀtheꢀpowerꢀconsumptionꢀforꢀtheꢀdevices,ꢀtheꢀtotalꢀoperatingꢀcurrntꢀisꢀtheꢀsumꢀofꢀtheꢀ
operatingꢀcurrentꢀforꢀtheꢀMCUꢀspecifiedꢀinꢀtheꢀMCUꢀdatasheetꢀandꢀtheꢀoperatingꢀcurrentꢀforꢀtheꢀSPIꢀ
toꢀUARTꢀchipꢀlistedꢀinꢀtheꢀHT45B0Fꢀdatasheet.ꢀSimilarly,ꢀtheꢀstandbyꢀcurrentꢀisꢀtheꢀsumꢀofꢀtheꢀtwoꢀ
individualꢀchipꢀstandbyꢀcurrents.
Power Down and Wake up
TheꢀMCUꢀandꢀSPIꢀtoꢀUARTꢀchipꢀareꢀpoweredꢀdownꢀindependentlyꢀofꢀeachꢀother.ꢀTheꢀmethodꢀofꢀ
poweringꢀdownꢀtheꢀMCUꢀisꢀcoveredꢀinꢀtheꢀrelevantꢀMCUꢀdatasheetꢀsection.ꢀNoteꢀthatꢀtheꢀSPIꢀtoꢀ
UARTꢀchipꢀmustꢀbeꢀpoweredꢀdownꢀbeforeꢀtheꢀMCUꢀisꢀpoweedꢀdown.
Afterꢀtheꢀdeviceꢀisꢀpoweredꢀdown,ꢀitꢀcanꢀalsoꢀbeꢀwokenꢀupꢀbyꢀtheꢀSPIꢀtoꢀUARTꢀchipꢀinterruptꢀexceptꢀ
byꢀwake-upꢀsourcesꢀmentionedꢀinꢀtheꢀMCUꢀdatasheet.ꢀWhenꢀaꢀUARTꢀinterruptꢀoccursꢀonꢀtheꢀINTꢀ
lineꢀinternallyꢀconnectedꢀtoꢀtheꢀMCUꢀPINTꢀline,ꢀitꢀwillꢀwakeꢀupꢀtheꢀMCUꢀifꢀtheꢀMCUꢀhasꢀenteredꢀaꢀ
powerꢀdownꢀmode.ꢀAfterꢀtheꢀMCUꢀisꢀwokenꢀup,ꢀtheꢀapplicationꢀprogramꢀmustꢀsetꢀtheꢀcorrespondingꢀ
controlꢀbitsꢀtoꢀmakeꢀtheꢀdeviceꢀfunctionꢀnormally.
Interrupts
WhenꢀaꢀUARTꢀinterruptꢀoccurs,ꢀaꢀlowꢀpulseꢀwillꢀbeꢀgeneratedꢀonꢀtheꢀINTꢀlineꢀandꢀsentꢀtoꢀtheꢀMCUꢀ
peripheralꢀinterruptꢀlineꢀPINTꢀtoꢀgetꢀtheꢀattentionꢀofꢀtheꢀmicrocontroller.ꢀWhenꢀtheꢀUARTꢀinterruptꢀ
causedꢀbyꢀoneꢀofꢀtheꢀUARTꢀinterruptꢀgenerationꢀsourcesꢀoccurs,ꢀifꢀtheꢀcorrespondingꢀinterruptꢀ
controlꢀinꢀtheꢀhostꢀMCUꢀisꢀenabledꢀandꢀtheꢀMCUꢀstackꢀisꢀnotꢀfull,ꢀtheꢀprogramꢀwillꢀjumpꢀtoꢀtheꢀ
correspondingꢀinterruptꢀvectorꢀwhereꢀitꢀcanꢀbeꢀservicedꢀbeforeꢀreturningꢀtoꢀtheꢀmainꢀprogram.
ForꢀaꢀUARTꢀinterruptꢀtoꢀbeꢀserviced,ꢀinꢀadditionꢀtoꢀtheꢀbitsꢀforꢀtheꢀcorrespondingꢀinterruptꢀenableꢀ
controlꢀinꢀtheꢀSPIꢀtoꢀUARTꢀchipꢀbeingꢀset,ꢀtheꢀglobalꢀinterruptꢀenableꢀcontrolꢀandꢀtheꢀrelatedꢀ
interruptꢀenableꢀcontrolꢀbitsꢀinꢀtheꢀhostꢀMCUꢀmustꢀalsoꢀbeꢀset.ꢀIfꢀtheseꢀbitsꢀareꢀnotꢀset,ꢀthenꢀtheꢀ
interruptꢀsignalꢀwillꢀonlyꢀbeꢀaꢀwake-upꢀsourceꢀandꢀnoꢀinterruptꢀwillꢀbeꢀserviced.
Rev. 1.00
16
�oveꢀꢁeꢂ ꢃꢄꢅ ꢃ01ꢃ
HT66FU60A/HT66FU70A
Enhanced A/D Flash Type 8-Bit MCU with EEPROM and UART Interface
Unbonded MCU pins
ExaminationꢀofꢀtheꢀrelevantꢀMCUꢀdatasheetꢀwillꢀrevealꢀthatꢀnotꢀallꢀofꢀtheꢀMCUꢀI/Oꢀportꢀlinesꢀareꢀ
bondedꢀoutꢀtoꢀexternalꢀpins.ꢀAsꢀaꢀresultꢀspecialꢀattentionꢀregardingꢀinitialixationꢀproceduresꢀshouldꢀ
beꢀpaidꢀtoꢀtheseꢀportꢀlines.ꢀIfꢀtheꢀpinsꢀareꢀpin-sharedꢀwithꢀtheꢀanalogꢀinputꢀpins,ꢀtheyꢀwillꢀbeꢀsetupꢀ
asꢀanalogꢀinputsꢀandꢀtheꢀcorrespondingꢀanalogꢀcircuitsꢀwillꢀbeꢀdisabledꢀafterꢀaꢀreset.ꢀWhenꢀtheseꢀ
pinsꢀareꢀsetꢀasꢀanalogꢀinputꢀpinsꢀandꢀtheꢀrelevantꢀcircuitsꢀareꢀdisabled,ꢀtheyꢀwillꢀnotꢀconsumeꢀanyꢀ
powerꢀevenꢀifꢀtheꢀinputꢀpinꢀconditionsꢀareꢀnotꢀkeptꢀasꢀeitherꢀhighꢀorꢀlowꢀlogicꢀlevels.ꢀHowever,ꢀifꢀ
theꢀpinsꢀareꢀnotꢀpin-sharedꢀwithꢀanalogꢀinputꢀpins,ꢀtheyꢀwillꢀbeꢀsetupꢀasꢀinputꢀstatesꢀwithoutꢀpullꢀ
highꢀresistorsꢀafterꢀaꢀreset.ꢀUsersꢀshouldꢀthereforeꢀensureꢀthatꢀtheseꢀpinsꢀareꢀsetupꢀinꢀinputꢀstatesꢀ
withꢀpullꢀhighꢀresistorsꢀorꢀinꢀoutputꢀstatesꢀwithꢀeitherꢀaꢀhighꢀorꢀlowꢀlevelꢀtoꢀavoidꢀadditionalꢀpowerꢀ
consumptionꢀresultingꢀfromꢀfloatingꢀinputꢀpins.
Multi-chip Programming Considerations
ToꢀuseꢀtheꢀUARTꢀfunction,ꢀseveralꢀimportantꢀstepsꢀmustꢀbeꢀimplementedꢀtoꢀensureꢀthatꢀtheꢀSPIꢀtoꢀ
UARTꢀchipꢀoperatesꢀnormally.
•ꢀ TheꢀSPIꢀinterfaceꢀpin-sharedꢀfunctionꢀmustꢀbeꢀproperlyꢀconfiguredꢀwhenꢀtheꢀSPIꢀfunctionalꢀ
pinsꢀofꢀtheꢀmicrocontrollerꢀareꢀusedꢀtoꢀcontrolꢀtheꢀSPIꢀtoꢀUARTꢀchipꢀandꢀforꢀtransmissionꢀandꢀ
reception.
ToꢀensureꢀproperꢀsetupꢀbetweenꢀtheꢀMCUꢀMasterꢀSPIꢀtoꢀtheꢀSPIꢀtoꢀUARTꢀchipꢀSlaveꢀSPI,ꢀtheꢀ
SIMꢀpin-sharedꢀfunctionꢀsettingsꢀtogetherꢀwithꢀtheꢀPCKꢀandꢀPINTꢀpinsꢀinꢀtheꢀcorrespondingꢀMCUꢀ
pin-sharedꢀfunctionꢀselectionꢀregistersꢀshouldꢀbeꢀsetupꢀasꢀshownꢀinꢀtheꢀfollowingꢀtable.
ꢀ
♦
ꢀ
♦
ꢀ
♦
SCSꢀpin-sharedꢀfunctionꢀsetupꢀinꢀtheꢀPDS0ꢀRegister
Register
Bit No.
Bit Name
Setting Value
PDS0
3~0
PD0S [3:0]
0010
SCKꢀpin-sharedꢀfunctionꢀsetupꢀinꢀtheꢀPDS0ꢀRegister
Register
Bit No.
Bit Name
Setting Value
PDS0
7~4
PD1S [3:0]
0010
SDI/SDAꢀpin-sharedꢀfunctionꢀsetupꢀinꢀtheꢀPDS1ꢀandꢀIFS4ꢀRegisters
Register
PDS1
Bit No.
3~0
Bit Name
PDꢃS [3:0]
SDIS [1:0]
Setting Value
0010
IFS4
5~4
10ꢅ 11
ꢀ
♦
ꢀ
♦
ꢀ
♦
SDOꢀpin-sharedꢀfunctionꢀsetupꢀinꢀtheꢀPDS1ꢀRegister
Register
Bit No.
Bit Name
Setting Value
PDS1
7~4
PD3S [3:0]
0100
PCKꢀpin-sharedꢀfunctionꢀsetupꢀinꢀtheꢀPCS2ꢀRegister
Register
Bit No.
Bit Name
Setting Value
PCSꢃ
7~4
PC5S [3:0]
0001
PINTꢀpin-sharedꢀfunctionꢀsetupꢀinꢀtheꢀPCS2ꢀandꢀIFS0ꢀRegisters
Register
PCSꢃ
Bit No.
3~0
Bit Name
PC4S [3:0]
PI�TBS [1:0]
Setting Value
0000
IFS0
7~6
01ꢅ 10ꢅ 11
Rev. 1.00
17
�oveꢀꢁeꢂ ꢃꢄꢅ ꢃ01ꢃ
HT66FU60A/HT66FU70A
Enhanced A/D Flash Type 8-Bit MCU with EEPROM and UART Interface
•ꢀ TheꢀSIMꢀoperatingꢀmodeꢀcontrolꢀbitsꢀSIM2~SIM0ꢀinꢀtheꢀSIMC0ꢀregisterꢀhaveꢀtoꢀbeꢀconfiguredꢀtoꢀ
enableꢀtheꢀSIMꢀtoꢀoperateꢀinꢀtheꢀSPIꢀmasterꢀmodeꢀwithꢀaꢀdifferentꢀSPIꢀclockꢀfrequency.
ꢀ
♦
SIMꢀoperatingꢀmodeꢀcontrolꢀbitsꢀSIM2~SIM0ꢀinꢀtheꢀSIMC0ꢀRegister
Register
Bit
Name
Setting value
SIMC0
7~5
SIM [ꢃ:0]
000ꢅ 001ꢅ 010ꢅ 011ꢅ 100
SIM [2:0]:ꢀSIMꢀOperatingꢀModeꢀControl
ꢀꢀ000:ꢀSPIꢀmasterꢀmode;ꢀSPIꢀclockꢀisꢀfSYS/4
ꢀꢀ001:ꢀSPIꢀmasterꢀmode;ꢀSPIꢀclockꢀisꢀfSYS/16
ꢀꢀ010:ꢀSPIꢀmasterꢀmode;ꢀSPIꢀclockꢀisꢀfSYS/64
ꢀꢀ011:ꢀSPIꢀmasterꢀmode;ꢀSPIꢀclockꢀisꢀfSUB
ꢀꢀ100:ꢀSPIꢀmasterꢀmode;ꢀSPIꢀclockꢀisꢀTM0ꢀCCRPꢀmatchꢀfrequency/2
ꢀꢀ101~111:ꢀmustꢀnotꢀbeꢀused
•ꢀ TheꢀPCKꢀenableꢀcontrolꢀbit,ꢀTB2EN,ꢀmustꢀbeꢀsetꢀtoꢀ1ꢀtoꢀenableꢀtheꢀPCKꢀoutputꢀasꢀtheꢀclockꢀ
sourceꢀforꢀtheꢀSPIꢀtoꢀUARTꢀchipꢀexternalꢀclockꢀinputꢀwithꢀvariousꢀPCKꢀoutputꢀfrequenciesꢀ
determinedꢀbyꢀtheꢀTB22,ꢀTB21ꢀandꢀTB20ꢀbitsꢀinꢀtheꢀTBC2ꢀRegisterꢀtogetherꢀwithꢀtheꢀperipheralꢀ
clockꢀsourceꢀselectionꢀbits,ꢀCLKS11ꢀandꢀCLKS10,ꢀinꢀtheꢀPSC1ꢀregister.
ꢀ
♦
PCKꢀoutputꢀfrequencyꢀselectionꢀbitsꢀPCKP1~PCKP0ꢀinꢀtheꢀSIMC0ꢀRegister
Register
Bit No.
7
Bit Name
TBꢃE�
Setting Value
1
TBCꢃ
ꢃ~0
1~0
TBꢃ [ꢃ:0]
CLKS1 [1:0]
000~111
00~11
PSC1
CLKS1 [1:0]:ꢀPeripheralꢀClockꢀSourceꢀSelectionꢀ–ꢀfP
ꢀꢀ00:ꢀfPꢀisꢀderivedꢀfromꢀfSYS
ꢀꢀ01:ꢀfPꢀisꢀderivedꢀfromꢀfSYS/4
ꢀꢀ10:ꢀfPꢀisꢀderivedꢀfromꢀfSUB
ꢀꢀ11:ꢀfPꢀisꢀderivedꢀfromꢀfH
TB2 [2:0]:ꢀPeripheralꢀClockꢀOutputꢀDivisionꢀSelection
ꢀꢀ000:ꢀfP
ꢀꢀ000:ꢀfP/2
ꢀꢀ000:ꢀfP/4
ꢀꢀ000:ꢀfP/8
ꢀꢀ000:ꢀfP/16
ꢀꢀ000:ꢀfP/32
ꢀꢀ000:ꢀfP/64
ꢀꢀ000:ꢀfP/128
Theꢀspecialꢀattentionꢀmustꢀbeꢀpaidꢀtoꢀtheꢀperipheralꢀclockꢀoutputꢀdivisionꢀselectionꢀtogetherꢀ
withꢀtheꢀclockꢀsourceꢀselectionꢀtoꢀobtainꢀaꢀproperꢀclockꢀfrequencyꢀtoꢀdriveꢀtheꢀSPIꢀtoꢀUARTꢀ
chipꢀtoꢀgenerateꢀcertainꢀbaudꢀrates.
Afterꢀtheꢀaboveꢀsetupꢀconditionsꢀhaveꢀbeenꢀimplemented,ꢀtheꢀMCUꢀcanꢀenableꢀtheꢀSIMꢀinterfaceꢀ
byꢀsettingꢀtheꢀSIMENꢀbitꢀhigh.ꢀTheꢀMCUꢀcanꢀthenꢀbeginꢀcommunicationꢀwithꢀexternalꢀUARTꢀ
connectedꢀappliancesꢀusingꢀitsꢀSPIꢀinterface.ꢀTheꢀdetailedꢀfunctionalꢀdescriptionsꢀofꢀtheꢀMCUꢀ
MasterꢀSPIꢀareꢀprovidedꢀwithinꢀtheꢀSerialꢀInterfaceꢀModuleꢀsectionꢀofꢀtheꢀrelevantꢀMCUꢀdatasheet.
Rev. 1.00
18
�oveꢀꢁeꢂ ꢃꢄꢅ ꢃ01ꢃ
HT66FU60A/HT66FU70A
Enhanced A/D Flash Type 8-Bit MCU with EEPROM and UART Interface
Application Circuits
V
D
D
0
0
.
1
F
*
*
V
D
D
R
e
s
e
t
1
0
W
~
k
C
r
i
u
c
t
i
1
0
W
0
k
1
4
N
1
*
4
8
1
.
F
R
S
E
A
x
N
3
0
W
*
0
0
1
.
1
~
F
I
/
P
O
o
t
r
s
V
S
S
R
2
S
2
3
O
O
C
S
1
O
C
i u c t i
S
T
a
r
s
n
c
i
e
v
e
r
C
r
C
S
2
T
N
I
T
X
S
e
e
O
s
c
l
a
l
i
o
t
r
S
e
c
i
n
o
t
T
o
/
r
F
m
o
R
2
S
3
2
B
s
u
i
n
M
C
U
d
t
a
s
a
e
h
e
t
R
U
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T
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X
X
X
1
T
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2
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c
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n
o
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M
C
U
d
t
a
s
a
e
h
e
t
Note:ꢀ"*"ꢀItꢀisꢀrecommendedꢀthatꢀthisꢀcomponentꢀisꢀaddedꢀforꢀaddedꢀESDꢀprotection.
"**"ꢀItꢀisꢀrecommendedꢀthatꢀthisꢀcomponentꢀisꢀaddedꢀinꢀenvironmentsꢀwhereꢀpowerꢀlineꢀnoiseꢀisꢀ
significant.
Rev. 1.00
1ꢄ
�oveꢀꢁeꢂ ꢃꢄꢅ ꢃ01ꢃ
HT66FU60A/HT66FU70A
Enhanced A/D Flash Type 8-Bit MCU with EEPROM and UART Interface
Package Information
Noteꢀthatꢀtheꢀpackageꢀinformationꢀprovidedꢀhereꢀisꢀforꢀconsultationꢀpurposesꢀonly.ꢀAsꢀthisꢀ
informationꢀmayꢀbeꢀupdatedꢀatꢀregularꢀintervalsꢀusersꢀareꢀremindedꢀtoꢀconsultꢀtheꢀHoltekꢀwebsiteꢀforꢀ
theꢀlatestꢀversionꢀofꢀtheꢀpackageꢀinformation.
Additionalꢀsupplementaryꢀinformationꢀwithꢀregardꢀtoꢀpackagingꢀisꢀlistedꢀbelow.ꢀClickꢀonꢀtheꢀrelevantꢀ
sectionꢀtoꢀbeꢀtransferredꢀtoꢀtheꢀrelevantꢀwebsiteꢀpage.
•ꢀ FurtherꢀPackageꢀInformationꢀ(includeꢀOutlineꢀDimensions,ꢀProductꢀTapeꢀandꢀReelꢀSpecifications)
•ꢀ PackingꢀMeterialsꢀInformation
•ꢀ Cartonꢀinformation
•ꢀ PBꢀFREEꢀProducts
•ꢀ GreenꢀPackagesꢀProducts
Rev. 1.00
ꢃ0
�oveꢀꢁeꢂ ꢃꢄꢅ ꢃ01ꢃ
HT66FU60A/HT66FU70A
Enhanced A/D Flash Type 8-Bit MCU with EEPROM and UART Interface
48-pin LQFP (7mm×7mm) Outline Dimensions
C
H
D
G
3
6
2
5
I
3
7
2
4
F
A
B
E
4
8
1
3
=
K
J
1
1
2
Dimensions in inch
Symbol
Min.
0.350
0.ꢃ7ꢃ
0.350
0.ꢃ7ꢃ
―
Nom.
―
Max.
0.358
0.ꢃ80
0.358
0.ꢃ80
―
A
B
C
D
E
F
G
H
I
―
―
―
0.0ꢃ0
0.008
―
―
―
0.053
―
0.057
0.063
―
―
―
0.004
―
J
0.018
0.004
0°
0.030
0.008
7°
K
α
―
―
Dimensions in mm
Symbol
Min.
8.ꢄ0
6.ꢄ0
8.ꢄ0
6.ꢄ0
―
Nom.
―
Max.
ꢄ.10
7.10
ꢄ.10
7.10
―
A
B
C
D
E
F
G
H
I
―
―
―
0.50
0.ꢃ0
―
―
―
1.35
―
1.45
1.60
―
―
―
0.10
―
J
0.45
0.10
0°
0.75
0.ꢃ0
7°
K
α
―
―
Rev. 1.00
ꢃ1
�oveꢀꢁeꢂ ꢃꢄꢅ ꢃ01ꢃ
HT66FU60A/HT66FU70A
Enhanced A/D Flash Type 8-Bit MCU with EEPROM and UART Interface
64-pin LQFP (7mm×7mm) Outline Dimensions
C
D
H
G
4
8
3
3
I
3
2
4
9
F
A
B
E
6
4
1
7
=
K
J
1
1
6
Dimensions in inch
Symbol
Min.
0.350
0.ꢃ7ꢃ
0.350
0.ꢃ7ꢃ
―
Nom.
―
Max.
0.358
0.ꢃ80
0.358
0.ꢃ80
―
A
B
C
D
E
F
G
H
I
―
―
―
0.016
―
0.005
0.053
―
0.00ꢄ
0.057
0.063
0.006
0.030
0.008
7°
―
―
0.00ꢃ
0.018
0.004
0°
―
J
―
K
α
―
―
Dimensions in mm
Symbol
Min.
8.ꢄ0
6.ꢄ0
8.ꢄ0
6.ꢄ0
―
Nom.
―
Max.
ꢄ.10
7.10
ꢄ.10
7.10
―
A
B
C
D
E
F
G
H
I
―
―
―
0.40
―
0.13
1.35
―
0.ꢃ3
1.45
1.60
0.15
0.75
0.ꢃ0
7°
―
―
0.05
0.45
0.0ꢄ
0°
―
J
―
K
α
―
―
Rev. 1.00
ꢃꢃ
�oveꢀꢁeꢂ ꢃꢄꢅ ꢃ01ꢃ
HT66FU60A/HT66FU70A
Enhanced A/D Flash Type 8-Bit MCU with EEPROM and UART Interface
Holtek Semiconductor Inc. (Headquarters)
�o.3ꢅ Cꢂeation Rd. IIꢅ Science Paꢂkꢅ Hsinchuꢅ Taiwan
Tel: 886-3-563-1ꢄꢄꢄ
Fax: 886-3-563-118ꢄ
http://www.holtek.coꢀ.tw
Holtek Semiconductor Inc. (Taipei Sales Office)
4F-ꢃꢅ �o. 3-ꢃꢅ YuanQu St.ꢅ �ankang Softwaꢂe Paꢂkꢅ Taipei 115ꢅ Taiwan
Tel: 886-ꢃ-ꢃ655-7070
Fax: 886-ꢃ-ꢃ655-7373
Fax: 886-ꢃ-ꢃ655-7383 (Inteꢂnational sales hotline)
Holtek Semiconductor (China) Inc. (Dongguan Sales Office)
Building �o.10ꢅ Xinzhu Couꢂtꢅ (�o.1 Headquaꢂteꢂs)ꢅ 4 Cuizhu Roadꢅ Songshan Lakeꢅ Dongguanꢅ China 5ꢃ3808
Tel: 86-76ꢄ-ꢃ6ꢃ6-1300
Fax: 86-76ꢄ-ꢃ6ꢃ6-1311ꢅ 86-76ꢄ-ꢃ6ꢃ6-13ꢃꢃ
Holtek Semiconductor (USA), Inc. (North America Sales Office)
467ꢃꢄ Fꢂeꢀont Blvd.ꢅ Fꢂeꢀontꢅ CA ꢄ4538ꢅ USA
Tel: 1-510-ꢃ5ꢃ-ꢄ880
Fax: 1-510-ꢃ5ꢃ-ꢄ885
http://www.holtek.coꢀ
Copyꢂight© ꢃ01ꢃ ꢁy HOLTEK SEMICO�DUCTOR I�C.
The infoꢂꢀation appeaꢂing in this Data Sheet is ꢁelieved to ꢁe accuꢂate at the tiꢀe of puꢁlication.
Howeveꢂꢅ Holtek assuꢀes no ꢂesponsiꢁility aꢂising fꢂoꢀ the use of the specifications descꢂiꢁed.
The applications ꢀentioned heꢂein aꢂe used solely foꢂ the puꢂpose of illustꢂation and Holtek ꢀakes
no waꢂꢂanty oꢂ ꢂepꢂesentation that such applications will ꢁe suitaꢁle without fuꢂtheꢂ ꢀodificationꢅ
noꢂ ꢂecoꢀꢀends the use of its pꢂoducts foꢂ application that ꢀay pꢂesent a ꢂisk to huꢀan life due to
ꢀalfunction oꢂ otheꢂwise. Holtek's pꢂoducts aꢂe not authoꢂized foꢂ use as cꢂitical coꢀponents in life
support devices or systems. Holtek reserves the right to alter its products without prior notification. For
the ꢀost up-to-date infoꢂꢀationꢅ please visit ouꢂ weꢁ site at http://www.holtek.coꢀ.tw.
Rev. 1.00
ꢃ3
�oveꢀꢁeꢂ ꢃꢄꢅ ꢃ01ꢃ
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