HT683L [HOLTEK]

318 Series of Decoders; 318系列的解码器
HT683L
型号: HT683L
厂家: HOLTEK SEMICONDUCTOR INC    HOLTEK SEMICONDUCTOR INC
描述:

318 Series of Decoders
318系列的解码器

解码器
文件: 总14页 (文件大小:839K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
18  
3 Series of Decoders  
Features  
Operating voltage: 2.4V~12V  
Low power and high noise immunity CMOS  
technology  
Trinary address setting  
Two times of receiving check  
Built-in oscillator needs only a 5% resistor  
Valid transmission indictor  
Easily interface with an RF or an infrared  
transmission medium  
Low standby current  
Capable of decoding 18 bits of information  
Pairs with HOLTEKs 318 series of encoders  
8~18 address pins  
Minimal external components  
0~8 data pins  
Applications  
Burglar alarm system  
Smoke and fire alarm system  
Garage door controllers  
Car door controllers  
Car alarm system  
Security system  
Cordless telephones  
Other remote control systems  
General Description  
The 318 decoders are a series of CMOS LSIs for  
remote control system applications. They are  
paired with the 318 series of encoders. For  
proper operation a pair of encoder/decoder pair  
with the same number of address and data  
format should be selected (refer to the en-  
coder/decoder cross reference tables).  
The 318 series of decoders receives serial ad-  
dress and data from that series of encoders that  
are transmitted by a carrier using an RF or an  
IR transmission medium. It then compares the  
serial input data twice continuously with its  
local address. If no errors or unmatched codes  
are encountered, the input data codes are de-  
coded and then transferred to the output pins.  
The VT pin also goes high to indicate a valid  
transmission.  
The 318 decoders are capable of decoding 18 bits  
of information that consists of N bits of address  
and 18–N bits of data. To meet various applica-  
tions they are arranged to provide a number of  
data pins whose range is from 0 to 8 and an  
address pin whose range is from 8 to 18. In  
addition, the 318 decoders provide various com-  
binations of address/data number in different  
packages.  
Selection Table  
F u n ct ion  
Da ta  
Ad d r ess  
No.  
VT Oscilla tor  
Tr igger  
P a ck a ge  
Item  
HT602L  
No. Typ e  
12  
10  
9
2
4
5
0
L
L
RC oscillator DIN active Hi” 20 DIP/20 SOP  
RC oscillator DIN active Hi” 20 DIP/20 SOP  
RC oscillator DIN active Hi” 20 DIP/20 SOP  
RC oscillator DIN active Hi” 20 DIP/20 SOP  
HT604L  
HT605L  
HT611  
L
14  
1
2nd Oct 97  
18  
3
Series of Decoders  
F u n ct ion  
Da ta  
Ad d r ess  
No.  
VT Oscilla tor  
Tr igger  
P a ck a ge  
Item  
HT612  
No. Typ e  
12  
10  
9
2
4
5
4
6
8
0
4
6
8
2
3
4
0
2
3
4
M
M
M
L
RC oscillator DIN active Hi” 20 DIP/20 SOP  
RC oscillator DIN active Hi” 20 DIP/20 SOP  
RC oscillator DIN active Hi” 20 DIP/20 SOP  
RC oscillator DIN active Hi” 24 SOP/24 SDIP  
RC oscillator DIN active Hi” 24 SOP/24 SDIP  
RC oscillator DIN active Hi” 24 SOP/24 SDIP  
RC oscillator DIN active Hi” 24 SOP/24 SDIP  
RC oscillator DIN active Hi” 24 SOP/24 SDIP  
RC oscillator DIN active Hi” 24 SOP/24 SDIP  
RC oscillator DIN active Hi” 24 SOP/24 SDIP  
RC oscillator DIN active Hi” 18 DIP  
HT614  
HT615  
HT644L  
HT646L  
HT648L  
HT651  
HT654  
HT656  
HT658  
HT682L  
HT683L  
HT684L  
HT691  
HT692  
HT693  
HT694  
14  
12  
10  
18  
14  
12  
10  
10  
9
L
L
M
M
M
L
L
RC oscillator DIN active Hi” 18 DIP  
8
L
RC oscillator DIN active Hi” 18 DIP  
12  
10  
9
M
M
M
RC oscillator DIN active Hi” 18 DIP  
RC oscillator DIN active Hi” 18 DIP  
RC oscillator DIN active Hi” 18 DIP  
8
RC oscillator DIN active Hi” 18 DIP  
Note: Data type: M represents momentary type of data output.  
L represents latch type of data output.  
VT can be used as a momentary data output.  
2
2nd Oct 97  
18  
3
Series of Decoders  
Block Diagram  
Note: The address/data pins are available in various combinations  
(refer to the address/data table).  
Pin Description  
In ter n a l  
Con n ection  
P in Na m e I/O  
Descr ip t ion  
TRANSMISSION Input pins for address A0~A17 setting  
A0~A17  
I
GATE  
CMOS OUT  
CMOS IN  
CMOS OUT  
OSCILLATOR  
OSCILLATOR  
They can be externally set to VDD, VSS, or left open.  
D10~D17  
DIN  
O
I
Output data pins  
Serial data input pin  
VT  
O
I
Valid transmission, active high  
Oscillator input pin  
OSC1  
OSC2  
VSS  
O
I
Oscillator output pin  
Negative power supply (GND)  
Positive power supply  
VDD  
I
3
2nd Oct 97  
18  
3
Series of Decoders  
Approximate internal connection circuits  
Absolute Maximum Ratings*  
Supply Voltage ............................... –0.3V to 13V  
Input Voltage..................VSS–0.3V to VDD+0.3V  
Storage Temperature................. –50°C to 125°C  
Operating Temperature............... –20°C to 75°C  
*Note: Stresses above those listed under Absolute Maximum Ratings” may cause permanent  
damage to the device. These are stress ratings only. Functional operation of this device at  
these or any other conditions above those indicated in the operational sections of this  
specification is not implied and exposure to absolute maximum rating conditions for extened  
periods may affect device reliability.  
Electrical Characteristics  
(Ta=25°C)  
Test Con d ition s  
Sym bol  
VDD  
P a r a m eter  
Operating Voltage  
Standby Current  
Min . Typ . Ma x. Un it  
VDD  
Con d ition s  
5V  
3
0.1  
2
12  
1
V
µA  
µA  
ISTB  
Oscillator stops  
12V  
4
No load  
IDD  
Operating Current  
5V  
5V  
–0.5  
0.5  
0.2  
–1  
1
1
mA  
mA  
mA  
F
OSC=100kHz  
Data Output Source Current  
(D10~D17)  
V
V
OH=4.5V  
OL=0.5V  
IO  
Data Output Sink Current  
(D10~D17)  
VT Output Source Current  
VT Output Sink Current  
H” Input Voltage  
VOH=4.5V  
–2  
1
–4  
2
5
mA  
mA  
V
IVT  
5V  
V
OL=0.5V  
VIH  
5V  
5V  
3.5  
0
100  
VIL  
L” Input Voltage  
1
V
FOSC  
Oscillator Frequency  
10V ROSC=330kΩ  
kHz  
4
2nd Oct 97  
18  
3
Series of Decoders  
Functional Description  
Operation  
Flowchart  
The 318 series of decoders provides various com-  
binations of address and data pins in different  
packages. It is paired with the 318 series of  
encoders. The decoders receive data transmit-  
ted by the encoders and interpret the first N  
bits of the code period as address and the last  
18–N bits as data (where N is the address code  
number). A signal on the DIN pin then activates  
the oscillator which in turns decodes the incom-  
ing address and data. The decoders will check  
the received address twice continuously. If all  
the received address codes match the contents  
of the decoder s local address, the 18N bits of  
data are decoded to activate the output pins,  
and the VT pin is set high to indicate a valid  
transmission. That will last until the address  
code is incorrect or no signal has been received.  
The output of the VT pin is high only when the  
transmission is valid. Otherwise it is low al-  
ways.  
Output type  
There are 2 types of output to select from:  
Momentary type  
The data outputs follow the encoder during a  
valid transmission and then reset.  
Latch type  
The data outputs follow the encoder during a  
valid transmission, and are then latched in  
this state until the next valid transmission  
occurs.  
Note: Th e oscilla t or is dis a bled in t h e  
standby state and activated as long as  
a logic high” signal is applied to the  
DIN pin. i.e., the DIN should be kept  
low” if there is no signal input.  
5
2nd Oct 97  
18  
3
Series of Decoders  
Decoder timing  
Encoder/Decoder selection tables  
Latch type of data output  
P a ck a ge  
Da t a Ad d r ess  
P a r t No.  
VT P a ir En cod er  
En cod er  
SOP SDIP DIP  
Decod er  
SOP SDIP  
P in s  
P in s  
DIP  
18  
18  
18  
18  
20  
20  
20  
20  
24  
24  
24  
24  
HT682L  
HT683L  
2
3
10  
9
HT680  
HT680  
HT6187  
HT680  
HT600  
HT600  
HT6207  
HT600  
HT640  
HT640  
HT6247  
HT640  
20  
20  
20  
24  
24  
24  
18  
18  
HT684L  
HT602L  
4
2
8
18  
20  
20  
12  
HT604L  
4
10  
20  
20  
HT605L  
HT644L  
5
4
9
24  
20  
20  
24  
24  
14  
HT646L  
HT648L  
6
8
12  
10  
24  
24  
24  
24  
24  
24  
6
2nd Oct 97  
18  
3
Series of Decoders  
Momentary type of data output  
P a ck a ge  
Da t a Ad d r ess  
P a r t No.  
VT P a ir En cod er  
En cod er  
Decod er  
P in s  
P in s  
DIP  
18  
18  
18  
18  
18  
20  
20  
20  
20  
20  
24  
24  
24  
24  
24  
SOP SDIP DIP SOP SDIP  
HT691  
HT692  
0
2
12  
10  
HT680  
HT680  
HT680  
HT6187  
HT680  
HT600  
HT600  
HT600  
HT6207  
HT600  
HT640  
HT640  
HT640  
HT6247  
HT640  
20  
20  
20  
20  
24  
24  
24  
24  
18  
18  
HT693  
3
9
18  
HT694  
HT611  
HT612  
4
0
2
8
18  
20  
20  
20  
20  
14  
12  
HT614  
4
10  
20  
20  
HT615  
HT651  
HT654  
5
0
4
9
24  
24  
20  
20  
24  
24  
24  
24  
18  
14  
HT656  
HT658  
6
8
12  
10  
24  
24  
24  
24  
24  
24  
7
2nd Oct 97  
18  
3
Series of Decoders  
Address/Data sequence  
The following provides a table of address/data sequence for various models of the 318 series decoders.  
A correct device should be selected according to the requirements of individual address and data.  
Ad d r ess/Da ta Bit s  
P a r t No.  
0~3  
4
5
6~9  
10  
11  
12  
13  
14  
15  
16  
17  
HT602L  
HT604L  
HT605L  
HT611  
A0~A3  
A0~A3  
A0~A3  
A0~A3  
A0~A3  
A0~A3  
A0~A3  
A0~A3  
A0~A3  
A0~A3  
A0~A3  
A0~A3  
A0~A3  
A0~A3  
A0~A3  
A0~A3  
A0~A3  
A0~A3  
A0~A3  
A0~A3  
A0~A3  
A4  
A4  
A4  
A4  
A4  
A4  
A4  
A4  
A4  
A4  
A4  
A4  
A4  
A4  
A6~A9  
A6~A9  
A6~A9  
A6~A9  
A6~A9  
A6~A9  
A6~A9  
A11 A12 A13 D14 D15  
A11 D12 D13 D14 D15  
D11 D12 D13 D14 D15  
A11 A12 A13 A14 A15  
A11 A12 A13 D14 D15  
A11 D12 D13 D14 D15  
D11 D12 D13 D14 D15  
HT612  
HT614  
HT615  
HT644L  
HT646L  
HT648L  
HT651  
HT654  
HT656  
HT658  
HT682L  
HT683L  
HT684L  
HT691  
HT692  
HT693  
HT694  
A5 A6~A9 A10 A11 A12 A13 D14 D15 D16 D17  
A5 A6~A9 A10 A11 D12 D13 D14 D15 D16 D17  
A5 A6~A9 D10 D11 D12 D13 D14 D15 D16 D17  
A5 A6~A9 A10 A11 A12 A13 A14 A15 A16 A17  
A5 A6~A9 A10 A11 A12 A13 D14 D15 D16 D17  
A5 A6~A9 A10 A11 D12 D13 D14 D15 D16 D17  
A5 A6~A9 D10 D11 D12 D13 D14 D15 D16 D17  
A6~A9  
A6~A9  
A6~A9  
A6~A9  
A6~A9  
A6~A9  
A6~A9  
A11 A12  
A11 D12  
D11 D12  
A11 A12  
A11 A12  
A11 D12  
D11 D12  
D14 D15  
D14 D15  
D14 D15  
A14 A15  
D14 D15  
D14 D15  
D14 D15  
Note: ” is a dummy code which is left open” and not bonded out.  
8
2nd Oct 97  
18  
3
Series of Decoders  
Oscillator frequency vs supply voltage  
The recommended oscillator frequency is FOSCD (decoder) FOSCE (encoder).  
9
2nd Oct 97  
18  
3
Series of Decoders  
Package Information  
Latch series  
10  
2nd Oct 97  
18  
3
Series of Decoders  
Momentary series  
11  
2nd Oct 97  
18  
3
Series of Decoders  
Momentary series  
12  
2nd Oct 97  
18  
3
Series of Decoders  
Application Circuits  
13  
2nd Oct 97  
18  
3
Series of Decoders  
Note: Typical infrared receiver: PIC-12043T/PIC-12043C (KODENSHI CORP.)  
or LTM9052 (LITEON CORP.)  
Typical RF receiver: J R-200 (J UWA CORP.)  
RE-99 (MING MICROSYSTEM, U.S.A.)  
14  
2nd Oct 97  

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