HI-8585CDM [HOLTIC]

ARINC 429 LIN DRIVER; ARINC 429 LIN驱动器


型号：	HI-8585CDM
厂家：	HOLT INTEGRATED CIRCUITS
描述：	ARINC 429 LIN DRIVER ARINC 429 LIN驱动器线路驱动器或接收器驱动程序和接口接口集成电路 CD
文件：	总7页 (文件大小：136K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

HI-8585, HI-8586

ARINC 429 LINE DRIVER

January 2001

DESCRIPTION

PIN CONFIGURATION

The HI-8585 and HI-8586 are CMOS integrated circuits

designed to directly drive the ARINC 429 bus in an 8 pin

package. Two logic inputs control a differential voltage

between the output pins producing a +10 volt One, a

-10 volt Zero, and a 0 volt Null.

SLP1.5

8 V+

TX0IN 2

TX1IN 3

GND 4

7 TXBOUT

6 TXAOUT

5 V-

The CMOS/TTL control inputs are translated to ARINC

specified amplitudes using on board zeners. A logic input

is provided to control the slope of the differential output

signal. Timing is set by on-chip resistor and capacitor and

tested to be within ARINC requirements.

SUPPLY VOLTAGES

The HI-8585 has 37.5 ohms in series with each line driver

output. The HI-8586 pr ovides the option to bypass most

of the output resistance so that series protection circuits

can add their resistances.

V+ = 12V to 15V

V- = -12V to -15V

The HI-8585 or the HI-8586 along with the HI-8588 line

receiver offer the smallest options available to get on and

off the ARINC bus.

FUNCTION TABLE

TXAOUT TXBOUT

SLOPE

TX1IN TX0IN SLP1.5

-5V

N /A

10µs

1.5µs

10µs

1.5µs

N /A

FEATURES

! Direct ARINC 429 line driver

interface in a small package

-5V

! On-chip zener to set output levels

! On-chip line driver slope control and

selection by logic input

PIN DESCRIPTION TABLE

! Low current 12 to 15 volt supplies

! CMOS / TTL logic pins

SYMBOL

FUNCTION

DESCRIPTION

P IN

SLP1.5

TX0IN

TX1IN

GND

LOGIC INPUT

POWER

CMOS OR TTL, V+ IS OK

CMOS OR TTL

! Plastic and ceramic package options -

surface mount and DIP

CMOS OR TTL

GROUND

! Themally enhanced SOIC packages

! Mil processing available

V-

POWER

-12 TO -15 VOLTS

LINE DRIVER TERMINAL A

LINE DRIVER TERMINAL B

+12 TO +15 VOLTS

TXAOUT

TXBOUT

V+

LOGIC OUTPUT

POWER

HOLT INTEGRATED CIRCUITS

(DS8585 Rev. D)

01/01

HI-8585, HI-8586

FUNCTIONAL DESCRIPTION

Figure 1 is a block diagram of the line driver. The +5V and

-5V levels are generated internally using on-chip zeners.

Currents for slope control are set by zener voltages across

on-chipresistors.

A unity gain buffer receives the internally generated slopes

and differentially drives the ARINC line. Current is limited

by the series output resistors at each pin. There are no

fusesattheoutputs of the HI-8585 asexistson the HI-8382.

The TX0IN and TX1IN inputs receive logic signals from a

control transmitter chip such as the HI-6010 or HI-8282.

TXAOUT and TXBOUT hold each side of the ARINC bus at

Ground until one of the inputs becomes a One. If for exam-

ple TX1IN goes high, a charging path is enabled to 5V on an

“A” side internal capacitor while the “B” side is enabled to

-5V. The charging current is selected by the SLP1.5 pin. If

the SLP1 .5 pin is high, the capacitor is nominally charged

from 10% to 90% in 1.5µs. If SLP1.5 is low, the rise and fall

times are 10µs.

The HI-8585 has 37.5 ohms in series with each output. The

HI-8586 has 10 ohms in series. The HI-8586 is for applica-

tions where more series resistance is added externally,

typicallyfor lightning protection devices.

“A” SIDE

ONE

TXAOUT

CURRENT

CONTROL

HI-8585 = 37.5 OHMS

HI-8556 = 10.0 OHMS

NULL

ZERO

-5V

CONTROL

LOGIC

ESD

PROTECTION

AND

SLP1.5

VOLTAGE

TRANSLATION

“B” SIDE

ONE

NULL

ZERO

TXBOUT

CURRENT

CONTROL

HI-8585 = 37.5 OHMS

HI-8586 = 10.0 OHMS

-5V

CONTROL

LOGIC

FIGURE 1 - LINE DRIVER BLOCK DIAGRAM

APPLICATION INFORMATION

Figure 2 shows a possible application

of the HI-8585/86 interfacing an ARINC

transmitchannel from the HI-6010.

FIGURE 2 - APPLICATION DIAGRAM

HOLT INTEGRATED CIRCUITS

HI-8585, HI-8586

RECOMMENDED OPERATING CONDITIONS

ABSOLUTE MAXIMUM RATINGS

Supply Voltages

Voltages referenced to Ground

V+....................+12V ± 5% or +15V ±10%

V-..................... -12V ± 5% or -15V ±10%

Supply voltages

V+....................................................20V

V-....................................................-20V

Temperature Range

Industrial Screening.........-40°C to +85°C

Hi-Temp Screening........-55°C to +125°C

Military Screening..........-55°C to +125°C

DC current per input pin................ +10mA

Power dissipation at 25°C

plastic DIL............1.0W, derate 10mW/°C

ceramic DIL..........0.5W, derate 7mW/°C

NOTE: Stresses above absolute maximum

ratings or outside recommended operating

conditions may cause permanent damage to

the device. These are stress ratings only.

Operation at the limits is not recommended.

Solder Temperature ........275°C for 10 sec

Storage Temperature........-65°C to +150°C

DC ELECTRICAL CHARACTERISTICS

V+ = +12V to +15V, V- = -12V to -15V, T = Operating Temperature Range (unless otherwise stated)

PARAMETERS

SYMBOL

TEST CONDITIONS

MIN

TYP

MAX UNITS

Input voltage (TX1IN, TX0IN, SLP1.5)

high

low

VIH

VIL

2.1

V+

0.5

volts

Input current (TX1IN, TX0IN, SLP1.5)

source

sink

IIH

IIL

VIN = 0V

VIN = 5V

0.1

ARINC output voltage (Differential)

one

zero

null

VDIFF1

VDIFF0

VDIFFN

no load; TXAOUT - TXBOUT 9.00 10.00 11.00

no load; TXAOUT - TXBOUT -11.00 -10.00 -9.00

volts

no load; TXAOUT - TXBOUT -0.50

0.50

ARINC output voltage (Ref. to GND)

one or zero

null

VDOUT

VNOUT

no load & magnitude at pin

no load

4.50

-0.25

5.00

5.50

0.25

volts

Operating supply current

SLP1.5 = V+

V+

V-

IDD

IEE

TX1IN & TX0IN = 0V: no load

TX0 IN & TX1IN = 0V: no load -14.0

6.0

-6.0

14.0

ARINC output impedence

HI-8585

ZOUT

Note1

37.5

ohms

HI-8586

NOTE :

1. The output resistance is checked by measuring the momentary short circuit current at each ARINC output pin.

HOLT INTEGRATED CIRCUITS

HI-8585, HI-8586

defined in Figure 3, no load

pin 1 = logic 1

Notes:

1. Guaranteed but not tested

PACKAGE THERMAL CHARACTERISTICS

MAXIMUM ARINC LOAD

ARINC 429

DATA RATE

SUPPLY CURRENT (mA) ²

Ta = 25 ^oC Ta = 85 ^oC Ta=125 ^oC

JUNCTION TEMP, Tj (°C)

Ta = 25 ^oC Ta = 85 ^oC Ta=125 ^oC

PACKAGE STYLE

Low Speed

16.8

27.3

17.4

27.6

17.1

27.3

17.2

26.7

17.5

27.1

17.2

27.1

16.9

25.9

16.9

25.9

16.7

26.2

116

132

126

147

110

112

157

169

166

186

151

157

8 Lead Plastic DIP

8 Lead Plastic SOIC

High Speed

Low Speed

High Speed

Low Speed

High Speed

8 Lead Plastic SOIC ⁶

TXAOUT and TXBOUT Shorted to Ground ^{7, 8, 9}

SUPPLY CURRENT (mA) ²

Ta = 25 ^oC Ta = 85 ^oC Ta=125 ^oC

ARINC 429

DATA RATE

JUNCTION TEMP, Tj (°C)

Ta = 25 ^oC Ta = 85 ^oC Ta=125 ^oC

PACKAGE STYLE

53.6

46.9

46.4

42.1

48.5

46.8

50.7

38.7

47.6

43.8

45.6

41.1

52.2

42.5

68.1

67.1

46.1

40.5

131

135

167

177

112

116

181

191

212

161

168

217

219

221

223

186

197

Low Speed

8 Lead Plastic DIP

High Speed

Low Speed

High Speed

Low Speed

High Speed

8 Lead Plastic SOIC

8 Lead Plastic SOIC ⁶

Notes:

1. All data taken in still air on devices soldered to single layer copper PCB (3" X 4.5" X .062").

2. At 100% duty cycle, 15V power supplies. For 12V power supplies multiply all tabulated values by 0.8.

3. Low Speed: Data Rate = 12.5 Kbps, Load: R = 400 Ohms, C = 30 nF.

4. High Speed: Data Rate = 100 Kbps, Load: R = 400 Ohms, C = 10 nF. Data not presented for C = 30 nF

as this is considered unrealistic for high speed operation.

5. 8 Lead Plastic SOIC (Thermally enhanced with built in heat sink). Heat sink not soldered to the PCB.

6. 8 Lead Plastic SOIC (Thermally enhanced with built in heat sink). Heat sink soldered to the PCB.

7. Similar results would be obtained with TXAOUT shorted to TXBOUT.

8. For applications requiring survival with continuous short circuit, operation above Tj = 175°C is not recommended .

9. Data will vary depending on air flow and the method of heat sinking employed.

HOLT INTEGRATED CIRCUITS

HI-8585, HI-8586

pin 3

pin 2

phlx

plhx

phlx

10V

90%

10%

DIFF

90%

10%

-10V

FIGURE 3 - LINE DRIVER TIMING

PART

NUMBER

PACKAGE

DESCRIPTION

8 PIN PLASTIC DIP

TEMPERATURE

RANGE

BURN

LEAD

FINISH

FLOW

HI-8585PDI

-40°C TO +85°C

-55°C TO +125°C

-40°C TO +85°C

-55°C TO +125°C

-40°C TO +85°C

-55°C TO +125°C

-40°C TO +85°C

-55°C TO +125°C

NO SOLDER

HI-8585PDT 8 PIN PLASTIC DIP

HI-8585PSI

8 PIN PLASTIC ESOIC - NB

HI-8585PST 8 PIN PLASTIC ESOIC - NB

HI-8585CDI

8 PIN CERAMIC SIDE BRAZED DIP

GOLD

HI-8585CDT 8 PIN CERAMIC SIDE BRAZED DIP

HI-8585CDM 8 PIN CERAMIC SIDE BRAZED DIP

YES SOLDER

NO SOLDER

YES SOLDER

HI-8585CRI

8 PIN CERDIP

HI-8585CRT 8 PIN CERDIP

HI-8585CRM 8 PIN CERDIP

HI-8586PDI

8 PIN PLASTIC DIP

-40°C TO +85°C

-55°C TO +125°C

-40°C TO +85°C

-55°C TO +125°C

-40°C TO +85°C

-55°C TO +125°C

-40°C TO +85°C

-55°C TO +125°C

NO SOLDER

HI-8586PDT 8 PIN PLASTIC DIP

HI-8586PSI

8 PIN PLASTIC ESOIC - NB

HI-8586PST 8 PIN PLASTIC ESOIC - NB

HI-8586CDI

8 PIN CERAMIC SIDE BRAZED DIP

GOLD

HI-8586CDT 8 PIN CERAMIC SIDE BRAZED DIP

HI-8586CDM 8 PIN CERAMIC SIDE BRAZED DIP

YES SOLDER

NO SOLDER

YES SOLDER

HI-8586CRI

8 PIN CERDIP

HI-8586CRT 8 PIN CERDIP

HI-8586CRM 8 PIN CERDIP

Legend: ESOIC - Thermally Enhanced Small Outline Package (SOIC w/built-in heat sink)

NB - Narrow Body

HOLT INTEGRATED CIRCUITS

HI-8585 / HI-8586 PACKAGE DIMENSIONS

inches (millimeters)

8-PIN PLASTIC SMALL OUTLINE (ESOIC) - NB

(Narrow Body, Thermally Enhanced)

Package Type: 8HNE

Top View

Bottom View

.1935 ± .0035

(4.915 ± .085)

.0085 ± .0015

(.2159 ± .0381)

.140 ± .010

(3.556 ± .254)

.236 ± .008

(5.994 ± .203)

.1535 ± .0035

(3.90 ± .09)

.100 ± .010

(2.540 ± .254)

PIN 1

Heat sink stud

on bottom of

package

DETAIL A

.0165 ± .0035

(.4191 ± .0889)

.055 ± .005

(1.397 ± .127)

0° to 8°

.0025 ± .0015

(.0635 ± .0381)

.050 ± .010

(1.27 ± .254)

.033 ± .017

(.8382 ± .4318)

DETAIL A

8-PIN PLASTIC DIP

Package Type: 8P

.385 ± .015

(4.699 ± .381)

.250 ± .010

(6.350 ± .254)

.100 ± .010

(3.540 ± .254)

.300 ± .010

(7.620 ± .254)

7° TYP.

.025 ± .010

.135 ± .015

(3.429 ± .381)

(.635 ± .254)

.0115 ± .0035

(.292 ± .089)

.1375 ± .0125

(3.493 ± .318)

.055 ± .010

(1.397 ± .254)

.335 ± .035

(8.509 ± .889)

.019 ± .002

(.483 ± .102)

HOLT INTEGRATED CIRCUITS

HI-8585 / HI-8586 PACKAGE DIMENSIONS

inches (millimeters)

8-PIN CERAMIC SIDE-BRAZED DIP

Package Type: 8C

.405 ± MAX

(10.287 ± MAX)

.050 ± .007

(1.270 ± .178)

.250 ± .008

(7.366 ± .203)

.050 ± .005

PIN 1

(1.270 ± .127)

.200 MAX

.035 ± .010

(5.080 MAX)

(.889 ± .254)

BASE

PLANE

.0105 ± .0015

(.267 ± .038)

.163 ± .037

(4.140 ± .940)

SEATING

PLANE

.018 ± .002

(.457 ± .051)

.300 ± .010

(7.620 ± .254)

.100 ± .003

(2.540 ± .076)

8-PIN CERDIP

Package Type:

.380 ± .004

(9.652 ± .102)

.005 MIN.

(.127 MIN.)

.248 ± .003

(6.299 ± .076)

.039 ± .006

(.991 ± .154)

.100 ± .008

(2.540 ± .203)

.015 MIN.

.314 ± .003

(7.976 ± .076)

(.381 MIN.)

.200 MAX.

(5.080 MAX.)

Base Plane

.010 ± .006

(.254 ± .152`)

Seating Plane

.163 ± .037

(4.140 ± .940)

.018 ± .006

(.457 ± .152)

.350 ± .030

(8.890 ± .762)

.056 ± .006

(1.422 ± .152)

HOLT INTEGRATED CIRCUITS

HI-8585CDM [HOLTIC]

相关型号：

SI9130DB

SI9135LG-T1

SI9135LG-T1-E3

SI9135_11

SI9136_11

SI9130CG-T1-E3

SI9130LG-T1-E3

SI9130_11

SI9137

SI9137DB

SI9137LG

SI9122E