HI-8588PDI [HOLTIC]

ARINC 429 LINE RECEIVER; ARINC 429线路接收器
HI-8588PDI
型号: HI-8588PDI
厂家: HOLT INTEGRATED CIRCUITS    HOLT INTEGRATED CIRCUITS
描述:

ARINC 429 LINE RECEIVER
ARINC 429线路接收器

文件: 总6页 (文件大小:171K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
HI-8588  
January 2001  
DESCRIPTION  
PIN CONFIGURATION  
The HI-8588 is an ARINC 429 bus interface receiver and is  
available in a SO 8 pin package. The technology is  
analog/digital CMOS. The circuitry requires only a 5 volt  
supply.  
VCC 1  
TESTA 2  
RINB 3  
8 TESTB  
7 ROUTB  
6 ROUTA  
The ARINC bus can be connected directly to the chip. The  
typical 10 volt differential signal is translated and input to a  
window comparator and latch. The comparator levels are  
just below the standard 6.5 volt minimum ARINC data  
threshold and just above the standard 2.5 volt maximum  
ARINC nullthreshold.  
RINA 4  
5
GND  
SUPPLY VOLTAGES  
The TESTA and TESTB inputs bypass the analog for  
testing purposes. Also if TESTA and TESTB are both  
taken high, the analog powers down and the digital outputs  
tri-state allowing wire-or possibilities.  
vcc = 5.0V ± 5%  
Please refer to the HI-8588-10 for applications where an  
external resistance in series with the ARINC inputs is  
required for lightning protection or when the digital outputs  
need to be a logic zero rather than open circuit when  
TESTA and TESTBare both high.  
FUNCTION TABLE  
FEATURES  
! Direct ARINC 429 line receiver interface  
in a small outline package  
! Receiver input hystersis at least 2 volts  
! Test inputs that bypass analog input and  
PIN DESCRIPTION TABLE  
can power down and tri-state outputs  
PIN  
SYMBOL  
VCC  
FUNCTION  
SUPPLY  
DESCRIPTION  
5 VOLT SUPPLY  
! Plastic and ceramic package options -  
surface mount and DIP  
TESTA  
RINB  
LOGIC INPUT  
ARINC INPUT  
ARINC INPUT  
POWER  
CMOS  
RECEIVER B INPUT  
RECEIVER A INPUT  
GROUND  
RINA  
! Mil processing available  
GND  
ROUTA  
ROUTB  
TESTB  
LOGIC OUTPUT  
LOGIC OUTPUT  
LOGIC INPUT  
RECEIVER CMOS OUTPUT A  
RECEIVER CMOS OUTPUT B  
CMOS  
HOLT INTEGRATED CIRCUITS  
1
(DS8588 Rev. A)  
01/01  
HI-8588  
FUNCTIONAL DESCRIPTION  
RECEIVER  
The status of the ARINC receiver input is latched. A Null  
input resets the latches and a One or Zero input sets the  
latches.  
Figure 1 shows the general architecture of the ARINC 429  
receiver. The receiver operates off the VCC supply only.  
The inputsRINA and RINBeach have seriesresistors, typi-  
cally 35K ohms. They connect to level translators whose  
resistance to Ground is typically 10K ohms. Therefore, any  
series resistance added to the inputs will affect the voltage  
translation.  
The logic at the output is controlled by the test signal  
which is generated by the logical OR of theTestA and  
TestB pins. If TestAand TestBare both One, then the re-  
ceiver is powered down and the output pins float. The  
powerdown does not disconnect the internal resistors at  
the ARINC input.  
After level translation, the inputs are buffered and become  
inputs to a differential amplifier. The amplitude of the dif-  
ferential signal is compared to levels derived from a di-  
vider betweenVCC and Ground. The nominal settingscor-  
respond to a One/Zero amplitude of 6.0V and a Null ampli-  
tude of 3.3V.  
TEST  
ONE  
S
Q
ROUTA  
LATCH  
R
TEST  
'
TESTA TESTB  
TESTA  
RINA  
ESD  
NULL  
PROTECTION  
AND  
TEST  
TRANSLATION  
RINB  
ZERO  
S
Q
ROUTB  
LATCH  
R
TEST  
'
TESTA TESTB  
TESTB  
NULL  
FIGURE 1 - RECEIVER BLOCK DIAGRAM  
APPLICATION INFORMATION  
1
2
8
6
7
Figure 2 shows a possible application of the  
HI-8588 interfacing an ARINC receive channel  
to the HI-6010 which in turn interfaces to an  
8-bit bus.  
4
3
5
1
8
6
7
2
3
5
4
FIGURE 2 - APPLICATION DIAGRAM  
HOLT INTEGRATED CIRCUITS  
2
HI-8588  
RECOMMENDED OPERATING CONDITIONS  
ABSOLUTE MAXIMUM RATINGS  
Voltages referenced to Ground  
Supply Voltages  
Supply voltages  
VCC........................................5V... ± 5%  
VCC...................................................7V  
Temperature Range  
ARINC input - pins 3 & 4  
Industrial Screening........-40°C to +85°C  
Hi-Temp Screening.......-55°C to +125°C  
Military Screening.........-55°C to +125°C  
Voltage at either pin......+29V to -29V  
DC current per input pin................ ±10mA  
Power dissipation at 25°C  
plastic DIL............0.7W  
ceramic DIL..........0.5W  
NOTE: Stresses above absolute maximum  
ratings or outside recommended operating con-  
ditions may cause permanent damage to the  
device. These are stress ratings only. Opera-  
tion at the limits is not recommended.  
Solder Temperature ........275°C for 10 sec  
Storage Temperature........-65°C to +150°C  
OPERATING TEMPERATURE RANGE,  
supplies floating  
Kohm  
Kohm  
"
"
mA  
mA  
V
V
= 0 V  
= 5 V  
IN  
IN  
V
= 4.6V  
= 0.4V  
mA  
mA  
OH  
V
OL  
pins 2, 8 = 0V; pins 3, 4 open  
pins 2, 8 = 5V; pins 3, 4 open  
mA  
mA  
HOLT INTEGRATED CIRCUITS  
3
HI-8588  
OPERATING TEMPERATURE RANGE,  
defined in Figure 3, C = 50pF  
L
1 0V  
0V  
DIFF  
-10V  
t
plhr  
t
rr  
t
phlr  
5V  
0V  
90%  
pin 6  
pin 7  
10%  
t
t
fr  
plhr  
t
phlr  
5V  
0V  
FIGURE 3 - RECEIVER TIMING  
PART  
NUMBER  
PACKAGE  
DESCRIPTION  
TEMPERATURE  
RANGE  
BURN  
IN  
LEAD  
FINISH  
FLOW  
HI-8588PDI  
8 PIN PLASTIC DIP  
-40°C TO +85°C  
-55°C TO +125°C  
-40°C TO +85°C  
-55°C TO +125°C  
-40°C TO +85°C  
-55°C TO +125°C  
-55°C TO +125°C  
-40°C TO +85°C  
-55°C TO +125°C  
-55°C TO +125°C  
I
T
I
NO SOLDER  
NO SOLDER  
NO SOLDER  
NO SOLDER  
HI-8588PDT 8 PIN PLASTIC DIP  
HI-8588PSI 8 PIN PLASTIC NARROW BODY SOIC  
HI-8588PST 8 PIN PLASTIC NARROW BODY SOIC  
HI-8588CDI 8 PIN CERAMIC SIDE BRAZED DIP  
T
I
NO  
NO  
GOLD  
GOLD  
HI-8588CDT 8 PIN CERAMIC SIDE BRAZED DIP  
HI-8588CDM 8 PIN CERAMIC SIDE BRAZED DIP  
T
M
I
YES SOLDER  
NO SOLDER  
NO SOLDER  
YES SOLDER  
HI-8588CRI  
8 PIN CERDIP  
HI-8588CRT 8 PIN CERDIP  
HI-8588CRM 8 PIN CERDIP  
T
M
HOLT INTEGRATED CIRCUITS  
4
HI-8588 PACKAGE DIMENSIONS  
inches (millimeters)  
8-PIN PLASTIC DIP  
Package Type: 8P  
.385 ± .015  
(4.699 ± .381)  
.250 ± .010  
(6.350 ± .254)  
.100 ± .010  
(3.540 ± .254)  
.300 ± .010  
(7.620 ± .254)  
7° TYP.  
.025 ± .010  
.135 ± .015  
(3.429 ± .381)  
(.635 ± .254)  
.0115 ± .0035  
(.292 ± .089)  
.1375 ± .0125  
(3.493 ± .318)  
.055 ± .010  
(1.397 ± .254)  
.335 ± .035  
(8.509 ± .889)  
.019 ± .002  
(.483 ± .102)  
8-PIN PLASTIC SMALL OUTLINE (SOIC) - NB  
(Narrow Body)  
Package Type:  
8HN  
.1935 ± .0035  
(4.915 ± .085)  
.0086 ± .0012  
(.2184 ± .0305)  
.236 ± .008  
(5.994 ± .203)  
.1535 ± .0035  
(3.90 ± .09)  
PIN 1  
.0165 ± .0035  
(.4191 ± .0889)  
Detail A  
.055 ± .005  
(1.397 ± .127)  
0° to 8°  
.0069 ± .0029  
(.1753 ± .0737)  
.050 ± .010  
(1.27 ± .254)  
.033 ± .017  
(.8382 ± .4318)  
Detail A  
HOLT INTEGRATED CIRCUITS  
5
HI-8588 PACKAGE DIMENSIONS  
inches (millimeters)  
8-PIN CERAMIC SIDE-BRAZED DIP  
Package Type: 8C  
.405 ± MAX  
(10.287 ± MAX)  
.050 ± .007  
(1.270 ± .178)  
.250 ± .008  
(7.366 ± .203)  
.050 ± .005  
PIN 1  
(1.270 ± .127)  
.200 MAX  
.035 ± .010  
(5.080 MAX)  
(.889 ± .254)  
BASE  
PLANE  
.0105 ± .0015  
(.267 ± .038)  
.163 ± .037  
(4.140 ± .940)  
SEATING  
PLANE  
.018 ± .002  
.300 ± .010  
.100 ± .003  
(.457 ± .051)  
(2.540 ± .076)  
(7.620 ± .254)  
8-PIN CERDIP  
8D  
Package Type:  
.380 ± .004  
(9.652 ± .102)  
.005 MIN.  
(.127 MIN.)  
.248 ± .003  
(6.299 ± .076)  
.039 ± .006  
(.991 ± .154)  
.100 ± .008  
(2.540 ± .203)  
.015 MIN.  
.314 ± .003  
(7.976 ± .076)  
(.381 MIN.)  
.200 MAX.  
(5.080 MAX.)  
Base Plane  
.010 ± .006  
(.254 ± .152`)  
Seating Plane  
.163 ± .037  
(4.140 ± .940)  
.018 ± .006  
(.457 ± .152)  
.350 ± .030  
(8.890 ± .762)  
.056 ± .006  
(1.422 ± .152)  
HOLT INTEGRATED CIRCUITS  
6

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