HI-8784 [HOLTIC]
ARINC INTERFACE DEVICE 8-BIT PARALLEL DATA CONVERTED 429&561 SERIAL DATA OUT; ARINC接口设备的8位并行数据转换来429 ＆ 561串行数据输出
| 型号： | HI-8784 |
| 厂家： | 
HOLT INTEGRATED CIRCUITS |
| 描述： | ARINC INTERFACE DEVICE 8-BIT PARALLEL DATA CONVERTED 429&561 SERIAL DATA OUT |
| 文件： | 总9页 (文件大小：197K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HI-8783, HI-8784, HI-8785
January 2001
PIN CONFIGURATIONS
DESCRIPTION
The HI-8783, HI-8784, and HI-8785 are system compo-
nents for interfacing 8 bit parallel data to an ARINC 429
bus. The HI-8783 is a logic device only and requires a sep-
arate line driver circuit, such as the HI-8382 or HI-8585.
The HI-8784 and HI-8785 combine logic and line driver on
one chip. The HI-8784 has an output resistance of 37.5
ohms, and the HI-8785 has an output resistance of 10
ohms to facilitate external lightning protection cicuitry. The
technology is analog/digital CMOS.
20
19
18
17
16
15
14
13
12
1
2
VCC
561 DATA
DATA ZERO
DATA ONE
PARITY ENB
XMT READY
XMIT CLK
RESET
561 SYNC
3
D0
D1
D2
D3
D4
D5
D6
D7
HI-8783PSI
&
HI-8783PST
4
5
6
The HI-8783 is available in a 22 pin DIP format as a second
source replacement for the Micrel / California Devices
DLS-111BV.
7
8
WRITE
The products offer high speed data bus data transactions
to a buffer register. After loading 4 bytes, data is automati-
cally transferred and transmitted. The data rate is equal to
the clock rate. Parity can be enabled in the 32nd bit. Reset
is used to initialize the logic upon startup. Word gaps are
transmitted automatically.
9
A0
11 GND
10
20-Pin Plastic SOIC - WB package
The HI-8784 and HI-8785 require +/- 10 volt supplies in ad-
dition to the 5 volt supply.
24
V+
FEATURES
1
2
VCC
23 561 DATA
22 TXBOUT
21 TXAOUT
561 SYNC
D0
l
Automatically converts 8 bit parallel data
3
to ARINC 429 or 561 data
HI-8784PSI
HI-8784PST
HI-8785PSI
&
4
D1
l
High speed data bus interface
V-
20
19
18
17
16
15
5
D2
PARITY ENB
XMT READY
XMIT CLK
RESET
WRITE
6
D3
l
l
l
On-chip line driver option
SOIC packages available
Military processing options
HI-8785PST
7
D4
8
D5
9
D6
10
NC
SLP1.5
A0
14
13
11
12
D7
GND
24-Pin Plastic SOIC - WB package
(See page 7 for additional pin configurations)
HOLT INTEGRATED CIRCUITS
(DS8783 Rev. B)
1
01/01
HI-8783, HI-8784, HI-8785
PIN DESCRIPTIONS
PIN
PIN
PIN
SYMBOL FUNCTION
DESCRIPTION
HI-8783 HI-8783 HI-8784
(20-pin) (22-pin) HI-8785
1
2
22
1
1
2
VCC
power supply +5 volt rail,
561 SYNC digital output ARINC 561 Sync signal
3-10
11
12
-
2-8,10
11
12
-
3-9,11
12
13
14
15
16
17
18
19
20
-
Dn
digital inputs Parallel 8 bit Data Input
power supply Ground
GND
A0
digital input
digital input
digital input
digital input
Byte address, A0=1 for 1st byte, A0=0 for 2nd, 3rd & 4th bytes
SLP1.5
WRITE
RESET
Selects the slope of the line driver. High = 1.5us
Write strobe, loads data on rising edge
Registers and sequencing logic initialized when low
Clock input for the transmitter
13
14
15
16
17
-
14
15
16
17
18
-
XMIT CLK digital input
XMT RDY digital output Goes high if the buffer register is empty
PARITY ENB digital i nput When high the 32nd bit output is odd parity
V- power supply -10 volt rail
18
19
-
19
20
-
DATA ONE digital output Goes high for each ARINC bit output that is a “one”
DATA ZERO digital output Goes high for each ARINC bit output that is a “zero”
-
21
22
23
24
TXAOUT
TXBOUT
analog output Line driver ouptut - A side
analog output Line driver output - B side
-
-
20
-
21
-
561 DATA digital output Serial output for ARINC 561 data
V+ power supply +10 volt rail
FUNCTIONAL DESCRIPTION
The HI-8783 is a parallel to serial converter, which when Input data can be loaded when the XMT RDY signal is
loaded with four eight bit parallel bytes, outputs the data as high, which indicates the input buffer register is empty. The
a 32 bit serial word. Timing circuitry inserts a 4 bit gap at the first 8 bit byte is the label byte and is loaded with the A0 in-
end of each 32 bit word. An input buffer register allows load put high, which initializes the internal byte counter. The re-
operations to take place while the previously loaded word maining three bytes are loaded with A0 in the low state.
is being transmitted.
Each 8 bit byte is loaded into the input buffer register by a
low pulse on the WRITE input. (See figure 1). After the
If the PARITY ENB pin is high, the 32nd bit will be a parity fourth byte is loaded, the XMT RDY output goes low. The
bit, inserted so as to make the 32 bit word have odd parity. If contents of the input buffer register are transferred to the
the PARITY ENB pin is low, the 32nd bit will be the D7 bit of output register during the fourth bit period of the gap. If the
the 4th byte.
fourth gap bit period of the previous word has already been
transmitted, the contents of the input buffer register will be
Outputs are provided for both ARINC 429/575 (DATA ONE transferred to the output shift register during the first bit pe-
and DATA ZERO pins), and ARINC 561 (5 61 DATA and riod after the loading of the fourth byte, and the XMT RDY
561 SYNC pins) type data.
output goes high.
A low signal applied to the RESET pin resets the HI-8783’s After the output shift register is loaded, the data is shifted
internal logic so that spurious transmission does not take out to the output logic in the order shown in figure 2.
place during power-up. The registers are cleared so that a
continuous gap will be transmitted until the first word is The 561 SYNC output pulses low when the XMT CLK is low
loaded into the transmitter.
during the 8th bit of the ARINC transmission.
The XMIT CLK is the same as the data rate.
HOLT INTEGRATED CIRCUITS
2
HI-8783, HI-8784, HI-8785
XMIT CLK
XMT RDY
WRITE
A0
status &
control
logic
byte
counter
SLP1.5
TXAOUT
TXBOUT
line
driver
word gap
counter
HI-8784, HI8785
8 to 32 bit
mux
32 bit
buffer
register
32 bit
shift
register
DATA ONE
DATA
BUS
8
32
32
DATA ZERO
bit
counter
output
logic
HI-8783
561 SYNC
561 DATA
PARITY ENB
Figure 1. Block Diagram
FUNCTIONAL DESCRIPTION (Cont.)
The HI-8784 and HI-8785 have the same digital logic func-
tion as the HI-8783, but include an on-chip line driver de-
signed to directly drive the ARINC 429 bus. The two ARINC
outputs (TXAOUT and TXBOUT) provide a differential volt-
age to produce a +10 volt One, a -10 volt Zero, and a 0 volt
Null. The slope of the ARINC outputs is controlled by the
SLP1.5 pin. If SLP1.5 is high, the output rise and fall time is
nominally 1.5us. If SLP1.5 is set low, the rise and fall times
are 10us. DATA ONE and DATA ZERO outputs are not pro-
vided for the HI-8784 and HI-8785.
A0
Byte Data Bus
ARINC Bits
1
0
0
0
Byte 1
Byte 2
Byte 3
Byte 4
D0 - D7
ARINC 1 - ARINC 8
ARINC 9 - ARINC 16
ARINC 17 - ARINC 24
ARINC 25 - ARINC 32
D0 - D7
D0 - D7
D0 - D7
Figure 2. Order of transmitted bytes
The HI-8784 has 37.5 ohms in series with each lin e driver
output. The HI-8785 has 10.0 ohms in series. The HI-8785
is for applications where external series resistance is
needed, typically for lightning protection devices.
HOLT INTEGRATED CIRCUITS
3
HI-8783, HI-8784, HI-8785
35
36
1
2
3
4
5
31
32
33
34
35
36
XMIT CLK
DATA ONE
DATA ZERO
561 DATA
561 SYNC
LOW DURING CLK 8
XMT CLK
t
phlx
t
t
plhx
plhx
5V
DATA ONE
0V
t
phlx
5V
0V
DATA ZERO
t
rx
t
rx
10V
0V
90%
10%
10%
90%
10%
-10V
t
fx
t
fx
HOLT INTEGRATED CIRCUITS
4
HI-8783, HI-8784, HI-8785
RECOMMENDED OPERATING CONDITIONS
ABSOLUTE MAXIMUM RATINGS
Supply Voltages
Voltages referenced to Ground
V+.......................................+10V... ±5%
V-........................................ -10V... ±5%
VCC....................................... 5V... ±5%
Supply voltages
V+.................................................12.5V
V-.................................................-12.5V
VCC.................................................. 7V
Temperature Range
Industrial Screening.........-40°C to +85°C
Hi-Temp Screening........-55°C to +125°C
Military Screening..........-55°C to +125°C
DC current per input pin................ +10ma
Power dissipation at 25°
plastic DIL............1.0W, derate 10mW/°C
ceramic DIL..........0.5W, derate 7mW/°C
NOTE:
Stresses above absolute maximum
ratings or outside recommended operating
conditions may cause permanent damage to the
device. These are stress ratings only. Operation at
the limits is not recommended.
Solder Temperature ........275°C for 10 sec
Storage Temperature........-65°C to +150°C
VCC = 5.0V, VSS = 0V, TA = Operating Temperature Range (unless otherwise specified).
PARAMETER
SYMBOL
CONDITION
MIN
4.75
2.0
TYP
5
MAX
UNITS
Operating Voltage
Min. Input Voltage
Max. Input Voltage
Min. Input Current
Max. Input Current
Min. Output Voltage
VCC
VIH
VIL
IIH
5.25
V
V
(HI)
(LO)
(HI)
1.4
1.4
0.8
1
V
VIH = 4.9V
VIL = 0.1V
µA
µA
V
(LO)
(HI)
IIL
-1
VOH
VIH
ICC
CIN
IOUT = -1.6mA
IOUT = 1.6mA
f = 100khz
2.7
Max. Output Voltage (LO)
Operating Current Drain
Input Capacitance
0.4
2.8
20
V
0.8
mA
pF
Not tested
VCC = 5.0V, VSS = 0V, V+ = 10V, V- = -10V, TA = Operating Temperature Range (unless otherwise specified).
PARAMETER
SYMBOL
CONDITION
MIN
9.5
TYP
10
MAX
10.5
10.5
20
UNITS
V
Operating Voltage
Operating Voltage
V+
V-
-9.5
-10
6
V
Operating Current Drain (V+)
IDD
IEE
no load, f = 100khz
no load, f = 100khz
mA
mA
Operating Current Drain (V-)
-20
-6
Line Driver Output Levels (Ref. To GND)
ONE
no load, VCC = 5.0V
4.5
5.0
0
5.5
0.25
-4.5
V
V
V
NULL
“
“
-0.25
-5.55
ZERO
-5.0
Line Driver Output Levels (Differential)
ONE
no load, VCC = 5.0V
9.0
-0.5
-11.0
80
10.0
0
11.0
0.5
V
V
NULL
“
ZERO
“
-10.0
-9.0
V
Minimum Short Circuit Sink or Source Current
IOUT
momentary magnitude
mA
HOLT INTEGRATED CIRCUITS
5
HI-8783, HI-8784, HI-8785
(HI-8783, HI-8784 and HI-8785)
VCC = 5.0V, VSS = 0V, TA =Operating Temperature Range (unless otherwise specified).
PARAMETER SYMBOL
MIN
TYP
MAX
UNITS
DATA BUS TIMING
Setup Data Bus to WRITE
Hold WRITE to Data Bus
Hold A0 to WRITE
tSET
tHLD
tAH
20
0
ns
ns
ns
ns
ns
ns
0
Pulse width WRITE
tWPW
tAPW
tXD
40
40
40
Pulse width A0
Delay last WRITE to XMT RDY
HOLT INTEGRATED CIRCUITS
6
HI-8783, HI-8784, HI-8785
ADDITIONAL HI-8783 PIN CONFIGURATION
1
2
22
21
20
19
18
17
16
15
14
13
12
561 SYNC
D0
VCC
561 DATA
DATA ZERO
DATA ONE
PARITY ENB
XMT READY
XMIT CLK
RESET
3
D1
HI-8783PDI
&
HI-8783PDT
4
D2
5
D3
6
D4
7
D5
8
D6
9
NC
WRITE
10
11
D7
NC
GND
A0
22 Pin Plastic DIP package
(See page 1 for additional pin configurations)
ORDERING INFORMATION
PART
NUMBER
INCLUDES
OUTPUT
LINE DRIVER RESISTOR
PACKAGE
DESCRIPTION
TEMPERATURE
RANGE
PROCESS
FLOW
LEAD
FINISH
HI-8783PDI
HI-8783PDT
HI-8783PSI
HI-8783PST
HI-8784PSI
HI-8784PST
HI-8785PSI
HI-8785PST
NO
22 Pin Plastic DIP
22 Pin Plastic DIP
-40°C TO +85°C
-55°C TO +125°C
I
T
I
SOLDER
SOLDER
SOLDER
SOLDER
SOLDER
SOLDER
SOLDER
SOLDER
NO
NO
NO
20 Pin Plastic SOIC - WB -40°C TO +85°C
20 Pin Plastic SOIC - WB -55°C TO +125°C
24 Pin Plastic SOIC - WB -40°C TO +85°C
24 Pin Plastic SOIC - WB -55°C TO +125°C
24 Pin Plastic SOIC - WB -40°C TO +85°C
24 Pin Plastic SOIC - WB -55°C TO +125°C
T
I
YES
YES
YES
YES
37.5 ohm
37.5 ohm
10.0 ohm
10.0 ohm
T
I
T
Legend: WB - Wide Body
HOLT INTEGRATED CIRCUITS
7
HI-8783, HI-8784, HI-8785 PACKAGE DIMENSIONS
inches (millimeters)
20-PIN PLASTIC SMALL OUTLINE (SOIC) - WB
(Wide Body)
20HW
Package Type:
.5035 ± .0075
(12.789 ± .191)
.0105 ± .0015
(.2667 ± .0381)
.4065 ± .0125
(10.325 ± .318)
.296 ± .003
(7.518 ± .076)
SEE DETAIL A
.018
(.457)
TYP
.090 ± .010
(2.286 ± .254)
0° to 8°
.0075 ± .0035
(.191 ± .089)
.050
(1.27)
DETAIL A
.033 ± .017
(.838 ± .432)
TYP
22-PIN PLASTIC DIP
Package Type: 22P
1.105 ± .015
(28.067 ± .381)
.350 ± .010
(8.89 ± .254)
.400 ± .010
(10.160 ± .254)
.135 ± .015
(3.429 ± .381)
.025 ± .010
(.635 ± .254)
0 - 15 o
.1375 ± .0125
(3.4925 ± .3175)
.019 ± .004
(.483 ± .102)
0.100
TYP.
.435 ± .035
(11.049 ± .889)
.053 ± .013
(1.346 ± .330)
HOLT INTEGRATED CIRCUITS
8
HI-8783, HI-8784, HI-8785 PACKAGE DIMENSIONS
inches (millimeters)
24-PIN PLASTIC SMALL OUTLINE (SOIC) - WB
(Wide Body)
Package Type:
24HW
.606 ± .004
(15.392 ± .102)
.0105 ± .0015
(.2667 ± .0381)
.2955 ± .0035
(7.506 ± .089)
.4065 ± .0125
(10.325 ± .318)
SEE DETAIL A
.018
(.457)
TYP
.095 ± .005
(2.413 ± .127)
0° to 8°
.0075 ± .0035
(.191 ± .089)
.050
(1.27)
.033 ± .017
(.838 ± .432)
TYP
DETAIL A
HOLT INTEGRATED CIRCUITS
9
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