RFM67W-915S2 [HOPERF]
ISM TRANSMITTER MODULE;
| 型号： | RFM67W-915S2 |
| 厂家： | 
HOPERF |
| 描述： | ISM TRANSMITTER MODULE ISM频段 |
| 文件： | 总37页 (文件大小：634K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Page 1
RFM67W
RFM67W ISM TRANSMITTER MODULE V1.2
Features
APPLICATIONS
GENERAL DESCRIPTION
The RFM67W is a transmitter
module which can operate in the
315, 433, 868 and 915 MHz
licence free ISM bands.
z
Remote Keyless Entry (RKE)
z
Remote Control / Security
Systems
z
z
Voice and Data RF
Communication Links
Process and building / home
control
The transmitter modulehas two
modes of operation, a
RFM67W
conventional MCU controlled
mode and a ‘stand-alone’
mode which enables the
RFM67W to download
z
z
Active RFID
AMR / AMI Platforms
KEY PRODUCT FEATURES
NOTE:
configuration and messages from
In order to better use RFM67W
modules, this specification also
involves a large number of the
parameters and functions of its
core chip RF67's,including those
IC pins which are not leaded
out. All of these can help
customers gain a better
z
2
+17 dBm to -18 dBm
an E PROM in response to a user
Programmable output power.
input.
z
z
Bit rates up to 600 kbits / sec.
FSK, GFSK, MSK, GMSK and
OOK modulation.
Stand-alone mode makes the
RFM67W ideal for miniaturized or
low cost remote keyless entry
(RKE) applications. It also offers
the unique advantage of narrow-
band and wide-band
z
z
z
Stand-alone mode: No need
for a host MCU.
Consistent RF performance
over a 1.8 to 3.7 V range.
Low phase noise (-95 dBc/Hz
understanding of the
performance of RFM67W
modules, and enhance the
application skills.
communication in a range of
modulation formats.
PLL
at 50 kHz) with automated
calibration and fully integrated
VCO and loop filter.
The RFM67W offers high RF
output power and channelized
operation suited for the European
(ETSI EN 300-220-1), North
American (FCC part 15.231,
15.247 and 15.249) and
z
On chip RC timer for timer
/wake-up applications.
Low battery detection.
Module size:19.7X16mm
Low cost
z
z
z
Japanese (ARIB T-67) regulatory
standards.
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RFM67W
DATASHEET
ADVANCED COMMUNICATIONS & SENSING
Table of contents
Section
Page
1.
2.
General Description.................................................................................................................................................
4
4
5
1.1. Simplified Block Diagram.................................................................................................................................
1.2. Pin Diagram .....................................................................................................................................................
1.3.
Pin Description..............................................................................................................................................6
Electrical Characteristics .........................................................................................................................................
7
7
7
7
2.1. ESD Notice ......................................................................................................................................................
2.2. Absolute Maximum Ratings .............................................................................................................................
2.3. Operating Range..............................................................................................................................................
2.4.
Electrical Specifications.................................................................................................................................8
3.
4.
Timing Characteristics .............................................................................................................................................
9
Working Modes of the RFM67W..............................................................................................................................10
4.1. Operating Modes ........................................................................................................................................... 10
4.2. Application Modes.......................................................................................................................................... 10
4.2.1. Stand Alone Mode .................................................................................................................................. 10
4.2.2. MCU Mode.............................................................................................................................................. 11
Operation of the RFM67W .......................................................................................................................................12
5.1. Main Parameters............................................................................................................................................ 12
5.1.1. Center Frequency ................................................................................................................................... 12
5.1.2. Frequency Deviation............................................................................................................................... 12
5.1.3. Bit Rate ................................................................................................................................................... 12
5.2. Synthesizer .................................................................................................................................................... 13
5.3. The Power Amplifier....................................................................................................................................... 14
Digital Control and Interface .................................................................................................................................. 15
6.1. Stand Alone Mode ......................................................................................................................................... 15
6.1.1. State Machine Description...................................................................................................................... 15
6.1.2. Memory Organization of the E2PROM ................................................................................................... 15
6.1.3. Periodic mode......................................................................................................................................... 17
6.1.4. Low Battery Indicator: Stand Alone Mode............................................................................................... 18
6.1.5. Low Battery Indicator: MCU Mode.......................................................................................................... 18
6.2. MCU Mode..................................................................................................................................................... 18
6.2.1. SPI Operation ......................................................................................................................................... 18
6.2.2. Data and Data Clock Usage..................................................................................................................20
5.
6.
6.3.
RFM67W Register Description....................................................................................................................21
7.
RFM67W Application Circuits ...................................................................................................................................26
7.1. Typical Application Schematic...........................................................................................................................26
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RFM67W
Table of contents
Section
Page
7.2. Wake-up Times.............................................................................................................................................. 27
7.3. Reset Pin Timing............................................................................................................................................ 27
Reference Design Performance ............................................................................................................................ 29
8.1. Power Output versus Consumption ............................................................................................................... 29
8.
8.2.
8.3. Phase Noise................................................................................................................................................... 31
8.4. RFM67W Baseband Filtering.......................................................................................................................33
Power Output Flatness versus Temperature and Supply Voltage................................................................30
8.5. Adjacent Channel Power ............................................................................................................................... 33
9.
Packaging Information........................................................................................................................................... 36
10. Ordering Information.............................................................................................................................................. 37
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RFM 67W
ADVANCED COMMUNICATIONS & SENSING
DATASHEET
This product datasheet contains a detailed description of the RFM67W performance and functionality.
1. General Description
The RFM67W is a transmitte module capable of (G)FSK, (G)MSK, and OOK modulation of an input data stream. It can
transmit this modulated signal in the 315, 433, 868 and 915 MHz licence free ISM bands.
1.1. Simplified Block Diagram
VBAT
VR_DIG
VR_ANA
RESET
TEST
Power Distribution
VR_PA
RFOUT
GND
E2_MODE
PA1
RC Oscillator
Modulator
Div 2/4/6
DATA
DCLK
Interpolation
and Filtering
Ramp and
Control
Fractional-N
PLL
PLL_LOCK
NSS
Calibration
PA2
MISO
MOSI
SCK
Registers
and SPI
Interface
÷R
XTAL
Switch I/P
XTA
XTB
PB(3:0)
CLKOUT
Figure 1. RFM67W Simplified Block Diagram
The general architecture of the RFM67W is shown in Figure 1. The frequency synthesizer generating the LO frequency is
a third-order fractional-N sigma-delta PLL. The PLL is capable of fast auto-calibration and offers fast switching and
settling times. For frequency modulation ((G)FSK and (G)MSK), the modulation is performed within the PLL bandwidth.
Optional pre-filtering of the bit stream may also be enabled to reduce the power delivered to adjacent channels.
Amplitude modulation (OOK), is performed via a DAC driving the reference of the regulator of the PA. Note that pre-filtering
of the bit stream is also available in this mode. The VCO works at 2, 4 or 6 times the RF output frequency to improve the
quadrature precision and reduce pulling effects during transmission.
The PA of the RFM67W is comprised of two amplifiers - one high power, one low power. This enables the RFM67W to
deliver a wide range, over 30 dB, of output powers - up to +13 dBm in single PA configuration. However, with an appropriate
output impedance transformation, in dual PA mode, this can be increased to +17 dBm.
ADVANCED COMMUNICATIONS & SENSING
DATASHEET
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RFM 67W
The RFM67W also includes two timing references; an RC oscillator, for sleep mode operation of the SPI interface (in
MCU mode), and a 32 MHz crystal oscillator, which serves as the low-noise frequency reference of the PLL. The
references and supply voltages are provided by the power distribution system which includes several regulators allowing
true battery powered operation.
1.2. Pin Diagram
(TOP)
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RFM 67W
1.3. Pin Description
Table 1 Description of the RFM67W Pinouts
Number
Name
MOSI
Type
Description
1
I/O
I/O
O
O
O
I
SPI Data input/output
SPI Chip select input/output
Reference clock output
PLL lock detection, active high/low
Output data clock
2
NSS
3
CLKOUT
PLL_LOCK
DCLK
DATA
SCK
4
5
6
Modulation input data
SPI Clock input
7
I
8
MISO
GND
I/O
-
SPI Data output/input
9
RF Ground
RF signal output/input.
I/O
10
11
12
13
14
15
ANA
GND
-
-
RF Ground
RF Ground
GND
3.3V
Main supply voltage from battery
RF Ground
GND
-
RESET
I/O
Reset, active high
Low battery indicator output Push-button input 0, active high
Push-button input 0, active high
16
PB(0)
I
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RFM 67W
2. Electrical Characteristics
2.1. ESD Notice
The RFM67W is an electrostatic discharge sensitive device. It satisfies:
z
Class 2 of the JEDEC standard JESD22-A114-B (human body model) on all other pins.
2.2. Absolute Maximum Ratings
Stresses above the values listed below may cause permanent device failure. Exposure to absolute maximum ratings for
extended periods may affect device reliability.
Table 2 Absolute Maximum Ratings
Symbol
Description
Min
Max
Unit
VDDmr
Tmr
Supply Voltage
Temperature
-0.5
-55
3.9
V
115
° C
2.3. Operating Range
Operating ranges define the limits for functional operation and the parametric characteristics of the device as described in
this section. Functionality outside these limits is not implied.
Table 3 Operating Range
Symbol
Description
Min
Max
Unit
VDDop
Top
Supply voltage
1.8
-40
-
3.7
85
25
V
Operational temperature range
Load capacitance on digital ports
° C
pF
Clop
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RFM 67W
2.4. Electrical Specifications
The table below gives the electrical specifications of the transmitter under the following conditions: Supply voltage = 3.3 V,
temperature = 25 °C, fRF = 915 MHz, 2-level FSK modulation without prefiltering, = 5 kHz, bit rate = 4.8 kbit/s and output
D
f
power = 13 dBm terminated in a matched 50 ohm impedance, unless otherwise specified.
Table 4 Transmitter Specifications
Symbol Description
Current Consumption
Conditions
Min
Typ
Max
Unit
IDDSL
IDDST
IDDFS
Supply current in sleep mode
-
-
-
0.5
0.9
8
1
1.2
-
µA
Supply current in standby mode
Crystal oscillator enabled
mA
mA
Supply current in synthesiser
mode
IDDT
Supply current in transmit mode RF Power o/p = 17 dBm
with appropriate external match- RF Power o/p = 13 dBm
-
-
-
-
95
45
33
20
-
-
40
25
mA
mA
mA
mA
ing (see Section 7).
RF Power o/p = 10 dBm
RF Power o/p = 0 dBm
RF and Baseband Specifications
BRF
Bit rate, FSK
Programmable.
1.2
1.2
0.6
-
-
-
600
32
kbps
kbps
kHz
BRO
FDA
Bit rate, OOK
Programmable.
Frequency deviation, FSK
RF output power in 50 ohms
Programmable
300
RFOP
Programmable with 1 dB steps.
Max
Min
10
-21
13
-18
-
-
dBm
dBm
PHN
Transmitter phase noise
50 kHz Offset from carrier
-
-95
-
dBc/
Hz
RFOPH
Max RF output power with an
external impedance transforma-
tion
With external match to 50 ohms.
14
17
-
dBm
ACP
FR
Transmitter adjacent channel
power (measured at 25 kHz off-
set)
Pre-filter enabled. Measurement
conditions as defined by EN 300
220-1 V2.1.1.
-
-
-37
dBm
315MHz Module
433MHz Module
868MHz Module
290
431
862
890
340
510
890
1020
MHz
MHz
MHz
MHz
Synthesizer Frequency Range
915MHz Module
19
FSTEP
FRC
Frequency synthesizer step
RC Oscillator frequency range
-
61
65
-
Hz
FXOSC/2
45
85
kHz
Timing Specifications
TS_FS Frequency synthesizer wake up
Crystal oscillator Enabled.
-
100
150
µs
time
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RFM 67W
Symbol Description
Conditions
Min
Typ
Max
Unit
µs
Transmitter wake-up time
Frequency synthesizer enabled.
Note, depends upon bit rate and
ramp time, please refer to Section
7.4.
-
120
-
TS_TR
TS_OS
FXOSC
TS_TT
Crystal oscillator wake-up time
Crystal oscillator frequency
Total Wake up time
-
-
300
32
500
-
µs
For All Module
MHz
µs
Sleep to transmit, automated. Note,
depends upon bit rate and ramp
time, please refer to Section 7.4.
450
T_DATA Data set-up time
-
-
0.25
µs
3. Timing Characteristics
The following table gives the operating specifications for the SPI interface of the RFM67W.
Table 5 SPI Timing Specifications
Symbol Description
Conditions
Min
-
Typ
Max
Unit
MHz
ns
SCK Frequency
SCK High time
SCK Low time
SCK rise time
SCK Fall time
-
-
10
-
f
t
t
t
t
t
SCK
ch
50
50
-
-
-
ns
cl
5
5
-
-
ns
rise
fall
-
-
ns
From MOSI transition to SCK rising
edge
30
-
ns
setup
MOSI Setup time
MOSI hold time
t
t
t
From SCK rising edge to MOSI tran-
sition
20
30
30
-
-
-
-
ns
ns
ns
hold
nl
NSS setup time
NSS Hold time
From NSS falling edge to SCK rising
edge
From SCK falling edge to NSS rising
edge.
-
nh,n
For explanatory diagrams of the timing characteristic parameters, please see Figure 7 and Figure 8.
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4. Working Modes of the RFM67W
4.1. Operating Modes
The four operating modes of the RFM67W are shown in Table 6. Each of these may be selected via the SPI bus by
writing the corresponding bits to Mode(2:0). A key feature of the RFM67W is that the transition from one operating mode to
the next is automatically optimized. For example, if the transmit operating mode is selected whilst in sleep operating mode
then, in a pre-defined time-optimized sequence, each of the intermediate modes is engaged sequentially without the need
to issue any further SPI commands. For more information on timing and optimization please see Section 7.4.
Table 6 RFM67W
Modes
Operating
Enabled Blocks
Xtal Osc
MODE(2:0)
Selected Mode
RC Osc
SPI
Freq. Synth.
PA
000
001
010
011
Sleep mode
Stand-by mode
FS mode
Optional
Optional
Optional
Optional
x
x
x
x
x
x
x
x
x
Transmit mode
x
4.2. Application Modes
The RFM67W has two application modes, selected by applying an external logical level to the E2_MODE input. The first,
MCU mode (E2_Mode= ‘0’), configures the RFM67W as an SPI slave. This permits the configuration of the circuit by an
external microprocessor via the SPI interface of the RFM67W and the data to be applied via the DATA input (pin 13).
The second application mode, stand-alone mode (E2_Mode = 0), sees the RFM67W configured as SPI master. In the
stand- alone application mode the RFM67W can download its configuration from an external SPI E2PROM. Moreover, in
response to an input on the GPIO pins, a specific configuration can be programmed and a payload transmitted.
Note that this mode selection process is performed at start up (or POR) of the circuit. Thus the hardware mode cannot be
dynamically changed without resetting the chip. This may be achieved either by power down or by issuing an active high
POR signal to the Reset input. For reset signal timing please see the diagram of Figure 13 and accompanying
description.
4.2.1. Stand Alone Mode
In stand alone mode (E2_Mode = ‘1’) the RFM67W will operate as a stand-alone SPI master which can download both
register settings and data payload from an SPI E2PROM. Four debounced GPIO inputs are available in stand alone mode,
in this application mode the RFM67W remains in sleep operating mode until either a single or combination of button
presses are detected. RFM67W can then be dynamically reconfigured and / or transmit a data sequence stored within the
E2PROM.
The RFM67W can accommodate SPI E2PROM sizes up to 8 kbit and uses industry standard SPI commands. For a full
description of E2PROM use with RFM67W and the associated application circuits, please see Section 6.1. The
application circuit for stand-alone operation is shown in Figure 3, note that both matching and LM are band specific
whilst CTX is application specific.
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RFM 67W
ADVANCED COMMUNICATIONS & SENSING
DATASHEET
100 nF
3 V
CTX
100 nF
100k
PB(3:0)
VBAT E2_MODE
NSS
Hold
VCC
CS
SPI
EEPROM
MISO
MOSI
SCK
SO
SI
RF67
SCK
Match
RFOUT
VR_PA
VSS
WP
VR_ANA
VR_DIG
LM
100 nF 100 nF
XTA
XTB
GND
10 nF
15 pF
32 MHz
15 pF
Figure 3. RFM67W Stand-Alone Application Circuit
4.2.2. MCU Mode
The RFM67W is also capable of operating in a conventional MCU controlled mode. Figure 4 shows the RFM67W
operating in MCU mode and connected to an external microcontroller. Note that CLKOUT provides the oscillator signal
for the MCU, thus negating the need for two crystal oscillators. The DCLK connection is also optional - only being
required if the data rate is to be determined by RFM67W or transmit filtering is to be used.
100 nF
EOL
PB0
3 V
VCC
MCU
VSS
CTX
100 nF
PB(3:1)
VBAT
CLKOUT
OSC1
DATA
DCLK
IO
IO
MISO
MOSI
SCK
SI
RF67
SO
SCK
CS
Match
RFOUT
NSS
VR_ANA
LM
VR_DIG
VR_PA
15 pF
XTA
XTB
GND MODE
10 nF
100 nF
100 nF
32 MHz
15 pF
Figure 4. RFM67W MCU Mode Application Circuit
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RFM 67W
ADVANCED COMMUNICATIONS & SENSING
5. Operation of the RFM67W
DATASHEET
The RFM67W is an integrated ISM band transmitter module and features a fully integrated frequency synthesizer,
modulator and power amplifier. This section describes the operation of the RFM67W and the functionality of these blocks.
5.1. Main Parameters
5.1.1. Center Frequency
The carrier output center frequency, fRF, of the RFM67W is programmable via the SPI interface. It is determined by
the following equation:
where freq_rf(23:0) is the decimal value of the 24 bit number stored in configuration registers FrfMsb, FrfMid and FrfLsb
and fXOSC is the frequency of the crystal oscillator. If the optimal value of 32 MHz is selected for the crystal oscillator, then
this results in a programmable frequency resolution of 61.035 Hz.
Note that RF output frequencies are only valid in the bands 290-340 MHz, 431-510 MHz and 862-1020 MHz. Note also,
that for ease of use, the band selection process is performed automatically.
5.1.2. Frequency Deviation
The frequency deviation of the RFM67W in FSK mode is given by the following
equation:
where df_coeff is the decimal value of the 14 bit contents of the FdevLsb and FdevMsb configuration registers.
5.1.3. Bit Rate
The bit rate (or, depending upon coding, the chip rate) of the RFM67W is given by the following equation:
where fXOSC is the crystal oscillator frequency, br_ratio is the decimal value of the 16 bit contents of registers BrMsb and
BrLsb. Note that for OOK modulation the maximum bit rate is 32.7 kbps which corresponds to a br_ratio(15:0) of 979.
The table below gives examples of some of the standard data rates accessible with RFM67W.
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Table 7 Example Standard Bitrates and their Corresponding Register Settings.
Type
BrMSB
BrLSB
(G)FSK, (G)MSK
OOK
Rb Actual (to 7s.f.)
Classical modem baud rates
(multiples of 1.2 kbps)
0x68
0x34
0x1A
0x0D
0x06
0x03
0x01
0x00
0x02
0x01
0x0A
0x05
0x80
0x01
0x00
0x00
0x00
0x00
0x03
0x2B
0x15
0x0B
0x05
0x83
0x41
0xA1
0xD0
0x2C
0x16
0x00
0x00
0x00
0x40
0xD5
0xA0
0x80
0x6B
0xD1
1.2 kbps
2.4 kbps
1.2 kbps
2.4 kbps
4.8 kbps
9.6 kbps
19.2 kbps
1200.015
2400.060
4799.760
9600.960
19196.16
38415.36
76738.60
153846.1
57553.95
115107.9
12500.00
25000.00
50000.00
100000.0
150234.7
200000.0
250000.0
299065.4
32753.32
4.8 kbps
9.6 kbps
19.2 kbps
38.4 kbps
76.8 kbps
153.6 kbps
57.6 kbps
115.2 kbps
12.5 kbps
25 kbps
Classical modem baud rates
(multiples of 0.9 kbps)
Round bit rates
(multiples of 12.5, 25 and
50 kbps)
12.5 kbps
25 kbps
50 kbps
100 kbps
150 kbps
200 kbps
250 kbps
300 kbps
32.768 kbps
Watch Xtal frequency
32.768 kbps
5.2. Synthesizer
The frequency synthesizer of the RFM67W is a fully integrated fractional-N third-order sigma-delta phase-locked loop
and VCO. Also incorporated are fully integrated third-order and low pass filters which determine the loop bandwidth. All of
these features are fully automated and derived from the user bitrate and frequency deviation settings, as described in
Sections
5.1.1 to 5.1.3.
To ensure the frequency accuracy of the PLL output it is necessary to perform calibration. The calibration process is
performed automatically upon power up of the RFM67W. However, the calibration feature is also accessible to the user
via the SPI configuration register, PllStat (address 0x0A). The calibration is performed by setting bit 2 (pll_cal) high. This
ensures that the frequency output accuracy is limited only by the frequency error of the crystal oscillator, the calibration
procedure lasts 500 µs, during which time pll_cal_done (bit 4 of address 0x0A) is set low. Once complete pll_cal_done is
set high and confirmation of a successful calibration can be obtained by reading pll_cal_ok.
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5.3. The Power Amplifier
A simplified schematic of the dual power amplifiers of the RFM67W is shown in Figure 5. PA 1 comprises a pair of amplifiers:
One dedicated for low power use, LPA, for programmed powers from -18 to -3 dBm: The second for high power use, HPA,
for programmed powers from -2 to 13 dBm. PA 2 is a single high power amplifier and may be used in conjunction with PA 1
to deliver the full 17 dBm of output power.
VR_PA
Ramp and
Control
pa_ramp_rising_time(6:5)
OOK
LPA
RFOUT
HPA1
PA 1
Match
I/P
HPA2
PA 2
Figure 5. Simplified Schematic of the RFM67W Power Amplifier
The mode of operation of the PA’s is determined by the register setting pa_select(1:0) which is configured as shown in
Table 8, below. The output power of the PA is determined by the value of the register pow_val(4:0), with a single PA
enabled the output power is set by:
Pout = –18 dBm + pow_val(4:0)
The default setting for this register is 13 dBm. The expressions for the output power with other combinations of power
amplifier enabled are shown in Table 8. Note also that the power amplifier current limiter, over current protection (OCP),
feature of RFM67W can also limit the output power. To ensure correct operation at 17 dBm ensure that trim_ocp(3:0) is
set to 105 mA (‘1100’).
Table 8 Power Amplifier Mode Selection Truth Table
pa_select(1:0)
Mode
invalid
Power Range
Pout Formula
00
01
10
11
-
PA1 enabled
PA2 enabled
Dual PA
-18 to 13 dBm
-
-18 dBm + pow_val(4:0)
-
-13 to 17 dBm
-13 dBm + pow_val(4:0)
The ramp and power control features of the PA, determine the regulator output voltage which is used to power the
amplifiers, this must be done through an external RF choke.
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RFM 67W
6. Digital Control and Interface
The RFM67W has several operating modes, configuration parameters and internal status indicators which are stored in
internal registers. In MCU mode, all of these registers can be accessed by an external microcontroller via the SPI interface.
In stand alone mode, both the configuration information and the data to be transmitted, are stored in an external E2PROM.
The way that both the configuration and payload information is stored in the E2PROM must match the way the
configuration is defined in the internal registers. For a full description see Section 6.1.2.
6.1. Stand Alone Mode
6.1.1. State Machine Description
The stand alone mode is activated when the pin E2_Mode is tied to VDD. The RFM67W SPI interface is then configured
in master mode. The internal state machine of the RFM67W then carries out the following operations:
1) Immediately after power-up, the SPI interface reads the main configuration section in the E2PROM and then goes into
the ‘sleep’ operating mode (i.e. all blocks off).
2) Whilst in ‘sleep’ operating mode, when an edge is detected on any of the push-buttons PB[3:0], the chip wakes-up and
starts the RC oscillator (typical startup time ~100 µs).
3) The RC oscillator is used to clock a debounce timer which gives the logical push button input value after the
programmed delay. The frame section corresponding to the button value (1 to 15) is read from the E2PROM. At this point
additional, button specific, configuration information may be loaded. Otherwise, the configuration settings of 1) are used.
Using the appropriate configuration, the payload corresponding to the detected button press is then transmitted. The
payload transmission may be repeated up to 254 times.
4) When the frame has been transmitted, the pad PLL_LOCK goes low and the chip goes into SLEEP mode.
6.1.2. Memory Organization of the E2PROM
The memory map for stand alone mode is shown in Figure 6. The configuration information occupies the first 77 bytes, the
format of the configuration is {ADDR; VALUE} - therefore allowing up to 38 registers to be defined. Each push button
configuration is mapped directly to a location in the E2PROM - determined by the mappings given in Table 9 and the
variable section_size(5:0). The purpose of this variable, push button specific, section size is to allow the optimum use of
different sizes of external memory. Note that the maximum frame length is 64 bytes - this equates to a maximum E2PROM
size of 8 kbit. The influence of the section_size variable is illustrated in Figure 6.
The mapping of Table 9 permits up to 15 frames to be defined. Each section may contain both write_registers commands
and the payload to be transmitted. Thus allowing the dynamic configuration of settings such as output power and frequency
in response to a button push. Each section within the E2PROM must conform to the following format: {FIFO_ADDR;
REPEAT; LENGTH; VALUE_1; VALUE_2;...;VALUE_N}. Where VALUE_1... N is the user defined payload, REPEAT is the
number of times the frame is to be transmitted, LENGTH defines the number of bytes in the message and FIFO_ADDR =
0x95.
The push-buttons may need to be debounced before being read. The debouncer time constant is programmed by the
debounce_time(2:0) register which allows a range of debounce timer values to be accessed from 470
m
s
to 480 ms. An
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RFM 67W
option for no debouncing is also available. Note that time constants are process and temperature dependent and may vary
by +/- 15%.
Pb ‘1111’
0x4D + PB_MAPPING(PB(3:0)) * section size(5:0)
Pb ‘0010’
Pb ‘0001’
section size(5:0)
0x4D + PB_MAPPING(PB(3:0)) * section size(5:0)
0x4D
0x4C
Config
Registers
0x00
Figure 6. Memory Mapping in Stand Alone Mode
The table below gives the push button mappings for the determination of E2PROM memory locations. Note that the
combinations PB[3:0] = ‘0001’, ‘0010’, ‘0100’ and ‘1000’ are mapped to the four lowest locations in memory. This mapping
allows the use of a simple four button interface with the minimum memory size.
Table 9 Push Button Combination to E2PROM Memory Location Mapping
PB[3:0]
PB_MAPPING(3:0)
PB[3:0]
PB_MAPPING(3:0)
0000
0001
0010
0011
0100
0101
0110
0111
None (no active push-button)
1000
1001
1010
1011
1100
1101
1110
1111
3
0
1
7
8
4
11
2
9
5
12
13
6
10
14 / Low Battery
The commands in the E2PROM are written as instructions thus bit 7 is set high - equivalent to adding 0x80 to the register
address to be programmed. As was shown in Figure 6, the first 77 bytes are used for configuration. Note that registers only
require programming if they hold a value other than the default value (see table 11 for default register settings).
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RFM 67W
The following table gives an example snippet of E2PROM contents, here for each location in E2PROM memory the first 13
bytes of the available 77 (0x4C) bytes are occupied with configuration. The remaining bytes are left in their default 0xFF
setting. The first push-button memory location is at 0x4D. Here we see that the periodic mode timer (see following section
for a full description) is configured and a 10 byte payload follows. Subsequent push buttons are configured at the locations
determined by the section size, see Figure 6.
Table 10
Example External SPI E2PROM Contents for RFM67W
Configuration
Address
Content
Comment
Address
Content
Comment
0x00
0x01
0x81
0x05
0x82
0x00
0x83
0x03
0x84
0x33
0x85
0xE3
0x90
0x0F
0x93
0x1C
0xFF
0xFF
0xFF
Start-up config. (address)
Start-up config. (data)
Start-up config. (address)
Start-up config. (data)
Start-up config. (address)
Start-up config. (data)
Start-up config. (address)
Start-up config. (data)
Start-up config. (address)
Start-up config. (data)
Start-up config. (address)
Start-up config. (data)
Start-up config. (address)
Start-up config. (data)
Empty
Empty
0x4C
0x4D
0x4E
0x4F
0x50
0x51
0x52
0x53
0x54
0x55
0x56
0x57
0x58
0x59
0x5A
0x5B
0x5C
0xFF
0x97
0x00
0x95
0x0A
0x0A
0x55
0x55
0x55
0x55
0xAA
0x0A
0x0B
0x0C
0x20
0x00
0x97
PB[0] config (address)
PB[0] config (data)
FIFO address
0x02
0x03
0x04
Repeat
0x05
Length
0x06
Start of PB[0] Payload
PB[0] Payload: Byte 1
PB[0] Payload: Byte 2
PB[0] Payload: Byte 3
PB[0] Payload: Byte 4
PB[0] Payload: Byte 5
PB[0] Payload: Byte 6
PB[0] Payload: Byte 7
PB[0] Payload: Byte 8
PB[0] Payload: Byte 9
PB[1] config (address)
0x07
0x08
0x09
0x0A
0x0B
0x0C
0x0D
0x0E
0x0F
Empty
0x10-0x4B
0x10 to 0x4B Empty
Subsequent button push button configuration and payload could follow at address 0x5C, respecting the E2PROM section
size constraint. Note that if register 0x00 is configured, care should be taken to enable transmit mode - mode(2:0) to
ensure reliable transition to transmit mode.
6.1.3. Periodic mode
Periodic mode is a sub-mode of stand alone mode wherein the RFM67W will periodically sense the push button inputs
for activity. If a push button input is high then the payload according to that input is transmitted. The wake-up interval,
Twakeup, is defined by periodic_n(3:0) and periodic_d(3:0) values.
Twakeu = 2
·
TRC
·
(periodic_n(3:0) + 1)
·
2periodic_d(3:0) + 9
p
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RFM 67W
where TRC is the RC oscillator period, periodic_n is programmable between 0 and 15 and periodic_d may take values
between 0 and 10. The maximum period is hence approximately 125 s when the frequency of the RC oscillator is 67 kHz.
Push button mode is enabled when the value of D is non-zero and, when activated, all stand alone mode functionality is
available. It is important to note that if there is no push button pressed, then no message will be transmitted.
6.1.4. Low Battery Indicator: Stand Alone Mode
The low battery indicator may be used in stand alone mode to detect the battery voltage and send a low battery message
to the receiver. It is enabled by setting the eol_frame_mode bit ‘high’ (register 0x12). The low battery state is determined by
comparing the supply voltage with a 1.695 V to 2.185 V programmable threshold (threshold trim_eol(2:0), address 0x12).
Following detection, the following actions are performed depending upon the exact mode of operation:
Normal Operation (Non-Periodic): The battery end-of-life condition is checked during the normal frame. If it is true, then
a single extra frame #14 (see Table 9) is automatically sent after the normal frame.
Stand-Alone Periodic Mode Operation: The battery end-of-life condition is checked during the normal frame. If it is true,
then the next frame, sent at the next timer tick is frame #14 (see Table 9), the frame is sent only once.
6.1.5. Low Battery Indicator: MCU Mode
In MCU mode the low battery status indicator may be accessed and configured via the SPI register EolCtrl. Alternatively,
the active high low battery indication is mapped to the PB0 pin allowing the independent generation of hardware interrupts.
6.2. MCU Mode
6.2.1. SPI Operation
The first byte in any data transfer over the SPI is the address read/write byte. It comprises:
1. W/RB bit, which is 1 for write access and 0 for read access
2. 7 bits of address, MSB first.
A transfer always starts by the NSS (not slave select) signal going low whilst SCK is high. MOSI (master out - slave in) is
generated by the master on the next falling edge of SCK and is sampled by the slave on the next rising edge of SCK. MISO
is generated by the slave on the falling edge of SCK and is high impedance when NSS is high. By convention, all bytes are
sent MSB first.
MCU mode is activated when pad E2_Mode is tied to GND (ground). In this mode the RFM67W is configured as SPI
slave and its internal configuration registers can be written following the format shown in Figure 7.
An ‘address write-byte‘ followed by a data byte is sent for a write access. Where multiple sequential registers are to be
written, the NSS input may be kept low after this first address-byte plus data-byte have been sent. In this state sequential
data-bytes may be written, the address is automatically incremented after the reception of each additional data-byte. This
allows the sequential data-bytes to be written without the need for an address byte. NSS must then be set ‘high’ after the
last byte transfer.
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NSS
tnl
tnh
tch
SCK
thold
up
tse
t
tcl
New Address (A1)
A4 A3
Last Address Accessed (A1')
A5' A4' A3' A2'
New Data at Address A1
D4 D3 D2
Current Data at Address A1'
D4' D3' D2'
MOSI
W/RB
A6
A5
A2
A1
A0
D7
D6
D5
D1
D0
MISO
W/RB
A6'
A1'
A0'
D7'
D6'
D5'
D1'
D0'
Figure 7. Register Write Access
NSS
tnl
tnh
tch
SCK
thold
tsetup
tcl
New Address (A1)
A4 A3
Last Address Accessed (A1')
A5' A4' A3' A2'
MOSI
W/RB
W/RB
A6
A5
A2
A1
A0
X
Current Data at Address A1'
D5' D4' D3' D2'
MISO
A6'
A1'
A0'
D7'
D6'
D1'
D0'
Figure 8. Register Read Access
Similarly, the configuration registers of the RFM67W can be read by issuing an ‘address read-byte’ (see Figure 8)
the corresponding register contents are then transferred over the MISO line. As above, the contents of each subsequent
register can be transferred by holding the NSS input low.
A summary of all of the registers of the RFM67W are given in Table 11, this is followed by detailed descriptions of each of
the registers in Table 12.
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6.2.2. Data and Data Clock Usage
In MCU mode the data to be transmitted is applied exclusively via the DATA input. The DATA input is sampled at the crystal
frequency, fxosc. Where the MCU mediates the data rate and no gaussian or bit filtering is required, then the use of the data
clock signal is optional. However, where filtering is to be used or the specified data rate accuracy is to be achieved, then
the rising edge of the data clock, DCLK, signal must be used to clock the data into the RFM67W DATA input.
T_DATA
T_DATA
DATA (NRZ)
DCLK
Figure 9. RFM67W Data Clock Timing Diagram (Used Only for Filtering and Ensuring Bit Rate Accuracies)
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6.3. RFM67W Register Description
Table 11 RFM67W Register Summary
Address
Register Name
Description
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x0A
0x0B
0x0C
0x0D
0x0E
0x0F
0x10
Mode
BrMsb
Operating and modulation mode settings.
Bit rate setting.
BrLsb
FdevMsb
FdevLsb
FrfMsb
Frequency Deviation (FSK).
RF centre frequency setting.
FrfMid
FrfLsb
PaCtrl
PA selection and power control.
PA rise and fall timing (FSK).
PLL status register.
PaFskRamp
PllStat
VcoCtrl1
VcoCtrl2
VcoCtrl3
VcoCtrl4
ClockCtrl
Eeprom
VCO calibration values.
Clock output pin settings.
Stand alone mode E2PROM configuration.
0x11
0x12
0x13
0x14
0x15
0x16
0x17
0x18
ClockSel
EolCtrl
Selection between RC or crystal oscillator.
Low battery indicator settings.
PaOcpCtrl
unused
PA Over current protection - limits PA current.
-
unused
-
-
unused
PerDivider
BtnDeb
Periodic mode wake-up timer control.
Push button debouncer setting.
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Table 12 RFM67W SPI Register Description
Addr. Register Name
Default Bits Variable Name
Mode
Description
0x00
Mode
0x10
7
-
rw
rw
unused
6:4
mode(2:0)
Operating mode:
000 sleep mode (SLEEP)
001 stand-by mode (STDBY)
010 frequency synthesizer mode (FS)
011 transmit mode (TX)
others reserved
Read value is always chip actual mode
3:2
1:0
modul_type(1:0)
rw
rw
Modulation type:
00 FSK
01 OOK
Others reserved
data_shaping(1:0)
Data shaping:
In FSK:
00 no shaping
01 Gaussian filter with BT = 1.0
10 Gaussian filter with BT = 0.5
11 Gaussian filter with BT = 0.3
In OOK:
00 no shaping
01 filtering with fcutoff = bit rate
10 filtering with fcutoff = 2 * bit rate
(BR <= 32 kb/s)
11 reserved
0x01
0x02
BrMsb
BrLsb
0x1A
0x0B
7:0
7:0
br_ratio(15:8)
br_ratio(7:0)
rw
rw
Bit rate MSB (chip rate if Manchester encoding)
Bit rate LSB (chip rate if Manchester encoding)
Default value is 0x1A0B = 4.8 kbps
unused
0x03
0x04
FdevMsb
FdevLsb
0x00
0x52
7:6
5:0
7:0
-
-
fdev_coeff(13:8)
fdev_coeff(7:0)
rw
rw
Deviation frequency MSB
Deviation Frequency LSB
Default = 0x0052 = 82, gives 5 kHz
RF carrier frequency MSB
0x05
0x06
FrfMsb
FrfMid
0xE4
0xC0
7:0
7:0
freq_rf(23:16)
freq_rf(15:8)
rw
rw
RF carrier centre bits
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Addr. Register Name
Default Bits Variable Name
Mode
Description
RF carrier frequency LSB
0x00
7:0
freq_rf(7:0)
rw
0x07
FrfLsb
For fXOSC = 32 MHz, resolution = 61.035 Hz
Default = 0xE4C000, gives 915 MHz
0x08
PaCtrl
0x3F
7
-
r
unused
6:5
pa_select
rw
Selects between PA1 and PA2
00 = unused
01 = PA1 selected (d)
10 = reserved
11 = PA1 and PA2 selected.
4:0
pow_val(4:0)
rw
Output power
Pout = -18 dBm + pow_val
Default is 13 dBm.
0x09
PaFskRamp
0x08
7:4
3:0
-
r
unused
pa_ramp_rising_time(3:0)
rw
Rise/fall time ramping (FSK only)
0000 = 2 ms
0001 = 1 ms
0010 = 500 us
0011 = 250 us
0100 = 125 us
0101 = 100 us
0110 = 62 us
0111 = 50 us
1000 = 40 us (d)
1001 = 31 us
1011 = 25 us
1010 = 20 us
1100 = 15 us
1101 = 12 us
1110 = 10 us
1111 = 8 us
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Addr. Register Name
Default Bits Variable Name
Mode
Description
0x10
7:6
5
-
r
r
unused
0x0A
PllStat
pll_lock_detect
PLL lock status:
0 = PLL not locked
1 = PLL locked
4
3
pll_cal_done
pll_cal_ok
r
r
PLL calibration status
0 = Calibration on-going
1 = Calibration performed
Note: Reset to 0 in sleep mode irrespective of
calibration state.
PLL Calibration Result
0 = Calibration procedure failed
1= Calibration procedure successful
Note: Reset to 0 in sleep mode irrespective of
calibration state
2
pll_cal_start
pll_divr(1:0)
w
Triggers PLL calibration, always read as 0.
1:0
rw
PLL division ratio
00 = Automatic
Others, PLL divider = PLL_divr
0x0B
0x0C
0x0D
0x0E
0x0F
VcoCtrl1
VcoCtrl2
VcoCtrl3
VcoCtrl4
ClockCtrl
NA
NA
7:5
4:0
7:5
4:0
7:5
4:0
7:5
4:0
7:4
3
-
r
rw
r
unused
SB1(4:0)
VCO band first calibration value
unused
-
SB2(4:0)
rw
r
VCO band second calibration value
unused
NA
-
SB3(4:0)
rw
r
VCO band third calibration value
unused
NA
-
SB4(4:0)
-
rw
r
VCO band fourth calibration value
unused
0x05
rc_enable
rw
Enables RC oscillator. RC oscillator is also
automatically switched on in E2PROM mode.
0 = RC oscillator off
1 = RC oscillator on
2:0
clkout_select
rw
Selects CLKOUT source:
000 = fXOSC (32 MHz)
001 = fXOSC / 2 (16 MHz)
010 = fXOSC / 4 (8 MHz)
011 = fXOSC / 8 (4 MHz)
100 = fXOSC / 16 (2 MHz)
101 = fXOSC / 32 (1 MHz) (d)
110 = RC clock (65 kHz)
111 = Clock output off.
Note: Switching from RC to fXOSC or vice versa
can generate glitches
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Addr. Register Name
Default Bits Variable Name
Mode
Description
0x10
7:6
5:0
-
-
0x10
Eeprom
unused
Section size, used in E2PROM mode only.
unused
section_size(5:0)
rw
0x11
ClockSel
0x11
7:5
4
-
r
xosc_ck_ext_sel
rw
Selects external clock instead of xosc
0 = use xosc
1 = use external clock
3:0
7:5
4
-
r/w
unused
unused
0x12
EolCtrl
0x12
-
r
r
q_eol
Battery end of life flag
0 = VBAT < VTHR (Battery is flat)
1 = VBAT > VTHR
3
on_eol
rw
rw
Enables EOL
0 = EOL disabled
1 = EOL enabled
2:0
vthr_eol(2:0)
Battery end of life threshold
000 = 1.695 V
001 = 1.764 V
010 = 1.835 V (default setting)
011 = 1.905 V
100 = 1.976 V
101 = 2.045 V
110 = 2.116 V
111 = 2.185 V
0x13
PaOcpCtrl
0x11
7:5
4
-
r
unused
on_ocp
rw
Enables power amplifier current limiter:
0 = OCP disabled
1 = OCP enabled
3:0
trim_ocp(3:0)
rw
PA OCP DC load current threshold:
0000 = 45 mA
0001 = 50 mA
0010 = 55 mA
0011 = 60 mA
0100 = 65 mA
0101 = 70 mA
0110 = 75 mA
0111 = 80 mA
1000 = 85 mA
1001 = 90 mA
1010 = 95 mA
1011 = 100 mA (default setting)
1100 = 105 mA (recommended +17 dBm setting)
1101 = 110 mA
1110 = 115 mA
1111 = 120 mA
0x14
Unused
-
-
-
-
unused
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Addr. Register Name
Default Bits Variable Name
Mode
Description
-
-
-
-
-
-
0x15
0x16
0x17
Unused
Unused
-
-
-
unused
PerDivider
0x00
7:4
3:0
periodic_d(3:0)
periodic_n(3:0)
rw
rw
Periodic mode D divider (values from 1 to 10)
Periodic mode N divider (values from 0 to 15)
Twake = 2TRC(periodic_n(3:0) + 1)
·
2periodic_d(3:0) + 9
Note: Only available in E2PROM Mode and
when N>0 (N = 0 = disabled)
0x18
BtnDeb
0x03
7:3
2:0
-
r
unused
debounce_time(2:0)
rw
Push button debounce tim constant:
000 = 470 us
001 = 7.5 ms
010 = 15 ms
011 = 30 ms (d)
100 = 60 ms
101 = 120 ms
110 = 240 ms
111 = 480 ms
7. RFM67W Application Circuits
7.1. Typical Application Schematic
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7.2. Wake-up Times
When switching between modes, an optimized sequence of events is automatically performed by RFM67W. For example,
in response to the command to enter transmit mode whilst in sleep mode, each intermediate mode is engaged - ensuring
crystal oscillator start-up and PLL lock before transition to transmit mode. External indication of PLL lock is given by the
PLL lock pin (MCU mode only). The PLL lock pin output is only valid whist no data is applied to the DATA pin. The transition
from frequency synthesizer mode to transmit is well defined and a function of bit rate and transmit ramp time, given in FSK
mode by:
1
-------------
TS
(
μ
s) = 5 + 1.25
·
pa_ramp_rising_time(3:0) +
2
·
RB
where pa_ramp_rising_time(3:0) is the user defined contents of PaFskRamp and RB is the bit rate. For OOK mode the time
is given by:
1
-------------
TS_TS
(μs) = 5 +
RB
2
·
A flow chart showing the automatic, optimised start-up procedure, initiated with a single SPI command is shown in
Figure 14. Note that after the PLL lock indicator is set then the transmitter requires TS_TR to set-up before transmission
may begin.
7.3 Reset Pin Timing
Manual reset of the RFM67W is possible by asserting a logical high to the reset pin. The timing for this operation is shown
in the following figure. During the reset operation the RFM67W current consumption may rise to 1 mA. Following the
reset operation the user must wait 5 ms before performing any other operation.
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Figure 13. RFM67W Reset
Sleep Mode
Tx Mode Enable
mode(‘011’)
Wait TS_OS
Stand-by
Mode
enabled
Synthesiser
Mode
Enabled
PLL
and calibration
OK?
TS_FS
N
Y
PLL Lock indicator
Set
Wait TS_TR
Transmit Mode
Ready
Figure 14. Automatic Optimised RFM67W Start-up Sequence with a Single SPI Command
or 315/434 MHz Operation at or below 13 dBm Output Power
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RFM 67W
8. Reference Design Performance
This section details the measured typical performance of the reference design described in the preceding section.
8.1. Power Output versus Consumption
20
90
80
70
60
50
40
30
20
10
17 dBm Match Pmeas
14 dBm Match Pmeas
17 dBm Match Imeas
14 dBm Match Imeas
15
10
5
0
-5
-10
-15
-20
PA1 Only PA1 and 2 Enabled
10 15 20
-20
-15
-10
-5
0
5
Programmed Power (dBm)
Figure 24. Typical Power Consumption of the Reference Design versus Measured and Programmed Power
Output at 915 MHz
The measured current consumption of the RFM67W versus programmed and measured output power is shown in the
preceding figure. The green curves correspond to measurements (made at 915 MHz) using the low power matching of
Section 7.7. The measured consumption displays two distinct regimes: Above a programmed power of -3 dBm both high
and low power amplifiers of PA1 are active. Below, however, only the low power amplifier within PA1 is enabled allowing
enhanced efficiency for operation below this programmed power output.
The blue portion of the curve (13 to 17 dBm operation) uses the matching illustrated in Section 7.6. Note that not only must
both power amplifiers be enabled to access these output powers, but also the OCP (current limiter) for the PA must be
disabled or the limit adjusted to 100 mA accordingly.
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RFM 67W
8.2. Power Output Flatness versus Temperature and Supply Voltage
The RFM67W reference design power output flatness as a function of voltage and temperature is shown below.
16.90
16.80
16.70
3.6 V, 25
3.3 V, 25
1.8 V, 25
3.6 V, 90
3.3 V, 90
1.8 V, 90
3.6 V, -45
3.3 V, -45
1.8 V, -45
C
C
C
C
C
C
16.60
16.50
16.40
16.30
C
C
C
862
863
864
865
866
867
868
869
870
871
Frequency (MHz)
Figure 25. Typical 17 dBm Output Power Flatness versus Supply Voltage and Temperature, Measured in the
868 MHz ISM Band
17.40
17.30
17.20
3.6 V, 25
3.3 V, 25
1.8 V, 25
3.6 V, 90
3.3 V, 90
1.8 V, 90
3.6 V, -45
3.3 V, -45
1.8 V, -45
C
C
C
C
C
C
17.10
17.00
16.90
16.80
16.70
16.60
C
C
C
900
905
910
915
Frequenc
92
0
92
5
930
y
(MHz)
Figure 26. Typical 17 dBm Output Power Flatness versus Supply Voltage and Temperature, Measured in the
915 MHz ISM band
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RFM 67W
8.3. Phase Noise
The phase noise of the RFM67W is measured in the centre frequencies of the principal ISM bands below 1 GHz. The
phase noise is a function of frequency and varies from -104 dBc/Hz at 50 kHz offset at 315 MHz band to -96dBc/Hz at
50 kHz
.
offset at 915 MHz
Figure 27. Typical RFM67W Phase Noise Measurement at 315 MHz (-104dBc/Hz at 50
Figure 28. Typical RFM67W Phase Noise Measurement at 434 MHz (-102 dBc/Hz at 50 kHz).
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RFM 67W
Figure 29. Typical RFM67W Phase Noise Measured at 868 MHz (-97 dBc/Hz at 50 kHz).
Figure 30. Typical RFM67W Phase Noise Measured at 915 MHz (-96 dBc/Hz at 50 kHz).
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RFM 67W
8.4. RFM67W Baseband Filtering
The following figure illustrates the effect of applying the baseband gaussian filtering to the modulating bitstream of the
RFM67W. This measurement was performed in the 868 MHz ISM band with the following settings: PPGM = 17 dBm, fRF
=
868 MHz, Df = 50 kHz and Rb = 50 kbps (implies b=2). Here we see the occupied bandwidth reduced from 500 kHz for the
unfiltered bit stream to 330 kHz with a filtering coefficient (BT) of 1. By increasing the filtering strength further to BT=0.3,
the channel bandwidth for operation in the 868 MHz ISM band is reduced to below 200 kHz.
10
0
No Filtering
'BT =
1
'BT = 0.3
ETSI Limit
-10
-20
-30
-40
-50
-60
-70
-500
-400
-300
-200
-100
0
100
200
300
400
500
Offset from Centre Frequency (kHz)
Figure 31. The Influence of Gaussian Filtering on the Modulation Bandwidth (Wideband)
8.5. Adjacent Channel Power
Modulation spectrum of the RFM67W measured in 100 Hz bandwidth is shown in the following three figures together
with the integrated adjacent channel power for the modulation settings shown in the figure caption. Please note that all
measurements were performed at 868 MHz, with an output power of 13 dBm. Please also note that the clock output was
disabled.
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RFM 67W
10
0
-10
-20
-30
-40
-50
-60
-70
Integrated Power = -23.28 dBm
Integrated Power = -21.42 dBm
-10
-8
-6
-4
-2
0
2
4
6
8
10
Offset from Centre Frequency (kHz)
Figure 32. GMSK 6.25 kHz Channel Example.
D
f
= 1.25 kHz, Rb = 4.8 kbps (implies b = 0.5) and BT = 0.3.
10
0
-10
Integrated Power = -22.97 dBm
Integrated Power = -22.55 dBm
-20
-30
-40
-50
-60
-70
-20 -18 -16 -14 -12 -10
-8
-6
-4
-2
0
2
4
6
8
10
12
14
16
18
20
Offset from Centre Frequency (kHz)
Figure 33. GMSK 12.5 kHz Channel Example. Df = 2.5 kHz, Rb = 9.6 kbps (implies b = 0.5) and BT = 0.3.
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RFM 67W
10
0
-10
-20
-30
-40
-50
-60
-70
Integrated Power = -40.14 dBm
ntegrated
Power = -37 01 dBm
-30
-25
-20
-15
-10
-5
0
5
10
15
20
25
30
Offset from Centre Frequency (kHz)
Figure 34. GFSK 20 kHz Channel Example. Df = 4.8 kHz, Rb = 4.8 kbps (implies b = 2) and BT = 0.3.
Page
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RF67
9. Packaging Information
Figure 35: S2 Packaging Outline Drawing
Page
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RF67
10. Ordering Information
RFM67W —433 S2
Package
Operation Band
Mode Type
P/N: RFM67W-315S2
RFM67W module at 315MHz band, SMD Package
P/N: RFM67W-433S2
RFM67W module at 433MHz band, SMD Package
P/N: RFM67W-868S2
RFM67W module at 868MHz band, SMD Package
P/N: RFM67W-915S2
RFM67W module at 915MHz band, SMD Package
This document may contain preliminary information and is subject to
change by Hope Microelectronics without notice. Hope Microelectronics
assumes no responsibility or liability for any use of the information
contained herein. Nothing in this document shall operate as an express or
implied license or indemnity under the intellectual property rights of Hope
Microelectronics or third parties. The products described in this document
are not intended for use in implantation or other direct life support
applications where malfunction may result in the direct physical harm or
injury to persons. NO WARRANTIES OF ANY KIND, INCLUDING, BUT
NOT LIMITED TO, THE IMPLIED WARRANTIES OF MECHANTABILITY
OR FITNESS FOR A ARTICULAR PURPOSE, ARE OFFERED IN THIS
DOCUMENT.
HOPE MICROELECTRONICS CO.,LTD
Add: 2/F, Building 3, Pingshan Private
Enterprise Science and Technology
Park, Lishan Road, XiLi Town, Nanshan
District, Shenzhen, Guangdong, China
Tel: 86-755-82973805
Fax: 86-755-82973550
Email: sales@hoperf.com
Website: http://www.hoperf.com
http://www.hoperf.cn
©2006, HOPE MICROELECTRONICS CO.,LTD. All rights reserved.
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