GM76U8128CLLG-10 [HYNIX]

Standard SRAM, 128KX8, 100ns, CMOS, PDSO32;


型号：	GM76U8128CLLG-10
厂家：	HYNIX SEMICONDUCTOR
描述：	Standard SRAM, 128KX8, 100ns, CMOS, PDSO32 静态存储器光电二极管内存集成电路
文件：	总11页 (文件大小：101K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

GM76U8128CL/CLL

LG Semicon Co.,Ltd.

131,072 WORDS x 8 BIT

CMOS STATIC RAM

Description

Pin Configuration

The GM76U8128CL/CLL is a 1,048,576 bits static

random access memory organized as 131,072 words

by 8 bits. Using a 0.6um advanced CMOS technology

and it provides high speed operation with minimum

cycle time of 85/100ns. The device is placed in a low

power standby mode with /CS1 high or CS2 low and

the output enable (/OE) allows fast memory access.

Thus it is suitable for high speed and low power

applications, especially where battery back-up is

required.

A16

A14

32 VCC

A15

30 CS2

29 /WE

A12

A13

27 A8

26 A9

25 A11

Features

/OE

* Fast Speed : 85/100ns

A10

* Low Power Standby and Low Power Operation

Standby : 66uW Max. at TA = - 40 ~ 85C(LLE/LLI)

99uW Max. at TA = - 40 ~ 85C(LE/LI)

49.5uW Max. at TA = 0 ~ 70C(LL)

165uW Max. at TA = 0 ~ 70C(L)

Operation : 132mW (Max)

/CS1

I/O7

I/O0 13

I/O1 14

20 I/O6

19 I/O5

I/O2

I/O4

* Completely Static RAM : No Clock or Timing

Strobe Required

VSS

I/O3

* Equal Access and Cycle Time

* TTL compatible inputs and outputs

* Capability of Battery Back-up Operation

* Single + 3.0V+/-0.3V Operation

* Standard 32DIP, SOP and TSOP-I,STSOP-I

* Temperature Range

(Top View)

Block Diagram

Commercial(0¡ •70C) : GM76U8128C

Extended (-25 ~ 85C) : GM76U8128C-E

Industrial (-40 ~ 85C) : GM76U8128C-I

MEMORY CELL ARRAY

1024 x 128 x 8

1024

Decoder

(128K x 8)

Address

Buffer

Pin Description

A0-A16

/WE

Function

Address Inputs

A14

A15

A16

128 x 8

128

Column Select

Decorder

Write Enable Input

Chip Select Input

Output Enable Input

Data Inputs/Outputs

Power Supply (2.7V ~3.3V)

Ground

/CS1, CS2

/OE

/CS1, CS2

/CS1

CS2

Chip

Control

I/O0-I/O7

VCC

/OE, /WE

/OE

I/O Buffer

Chip

Control

/WE

VSS

No Connection

109

GM76U8128CL/CLL

Absolute Maximum Ratings*

Symbol

Parameter

Rating

0 ~ 70

Unit

GM76U8128C

GM76U8128C-E

GM76U8128C-I

Ambient Temperature under Bias

-25 ~ 85

-40 ~ 85

TSTG

TSOL

VCC

VIN

VI/O

Storage Temperature

Soldering Temperature and Time

Supply Voltage

-55 ~ 150

260, 10 (at lead)

-0.5 ~ 4.6

C, S

Input Voltage

-0.5 ~ VCC + 0.5

0.7

Input and Output Voltage

Power Dissipation

*: Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device.

This is a stress rating only and functional operation of the device at these or any other conditions above those indi-

cated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions

for extended periods may affect reliability.

Recommended DC Operating Conditions ( TA = - 40 ~ 85C)

Symbol

VCC

Parameter

Supply Voltage

Min

2.7

Typ

Max

3.3

Unit

3.0

VIH

Input High Voltage

Input Low Voltage

2.2

CC + 0.3

VIL

-0.3*

0.4

*Note :VIL(min) = -3.0V for <= 50ns pulse

Truth Table

/CS1

CS2

/OE

/WE

A0 to A16

DATA I/O

Output Data

Input Data

Hi-Z

MODE

Stable

Read

Write

OutputDisable

Hi-Z

Standby

Hi-Z

*Note: X means don't care

110

GM76U8128CL/CLL

DC Operating Characteristics (VCC = 3.0V+/-0.3V, TA = - 40 ~ 85C)

Symbol

Parameter

Conditions

Min *Typ Max Unit

II(L)

Input Leakage Current

-1

VIN = 0 to VCC

IO(L)

Output Leakage Current

/CS1 = VIH or CS2 = VIL

/OE = VIH, VSS <=VOUT<=VCC

-1

High Level Output Voltage

Low Level Output Voltage

2.2

OH = -1.0mA

VOL

0.4

IOL = 2.1mA

Operating Supply Current

ICC

/CS1 = VIL and CS2 = VIH

OUT = 0mA

IN = VIH/VIL, I

CC1

CC2

/CS1 = VIL and CS2 = VIH

VIN = VIH/VIL

IOUT = 0mA

tcycle = Min, cycle

Average Operating Current

/CS1 = 0.2V, CS2 = VCC-0.2V

VIN = VCC - 0.2V/0.2V

OUT = 0mA

tcycle = 1us

Standby Current(TTL)

Standby

CCS1

CCS2

0.5

/CS1 = VIH, CS2 = VIL

L - Version

LL - Version

GM76U8128C

/CS1 = VCC-0.2V,

CS2 = 0.2V

Current(CMOS)

GM76U8128C-E

GM76U8128C-I

L - Version

LL - Version

*Typ. Values are measured at 25C

Capacitance (f = 1MHZ, TA = 25C)

Symbol

Parameter

Input Capacitance

Output Capacitance

Test Conditions

= 0V

Min

Max

Unit

CIN

CI/O

*Note: This parameter is sampled and not 100% tested.

AC Operating Characteristics

Test Conditions (VCC = 3.0V+/-0.3V, TA = - 40 ~ 85C, unless otherwise noted.)

Parameter

Value

Input Pulse Level

0.4 to 2.2V

Input Rise and Fall Time

Input and Output Timing Reference Levels

Output Load

5ns

1.5V

CL = 100 pF + 1TTL Load

111

GM76U8128CL/CLL

AC Operating Characteristics (VCC = 3.0V+/-0.3V, TA = - 40 ~ 85C)

Read Cycle

GM76U8128C-85

GM76U8128C-10

Symbol

Parameter

Read Cycle Time

Unit

Min

Max

Min

Max

100

Address Access Time

100

ACS1

ACS2

Chip Select 1 Access Time

Chip Select 2 Access Time

Output Enable Access Time

Chip Select 1 Output Setup Time

Chip Select 1 Output Floating

Chip Select 2 Output Setup Time

Chip Select 2 Output Floating

Output Enable Output Setup Time

Output Enable Output Floating

Output Hold Time

CLZ1

CHZ1

CLZ2

CHZ2

OLZ

OHZ

Write Cycle

GM76U8128C-85

GM76U8128C-10

Symbol

Parameter

Unit

Min

Max

Min

100

Max

CW1

CW2

Write Cycle Time

Chip Select Time 1

Chip Select Time 2

Address Enable Time

Address Setup Time

Write Pulse Width

Write Recovery Time

Input Data Setup Time

Input Data Hold Time

Write to Output in High-Z

Output Active from End of Write

WHZ

112

GM76U8128CL/CLL

Timing Waveforms

Read Cycle (Note 1)

ADD

ACS1

/CS1

CLZ1

CLZ2

ACS2

CHZ1

CS2

CHZ2

OLZ

/OE

OHZ

High-Z

VALID DATA

DOUT

113

GM76U8128CL/CLL

Write Cycle (1) (/WE Controlled) (Notes 2, 3, 4)

ADD

/WE

CW1

/CS1

CS2

CW2

WHZ

DOUT

DIN

VALID DATA

114

GM76U8128CL/CLL

Write Cycle (2) (/CS1 Controlled) (Notes 4)

ADD

/WE

/CS1

CS2

CW1

CW2

WHZ

CLZ

DOUT

DIN

VALID DATA

115

GM76U8128CL/CLL

Write Cycle (3) (CS2 Controlled) (Notes 4)

ADD

/WE

CW2

CS2

CW1

/CS1

WHZ

CLZ

DOUT

DIN

VALID DATA

Notes:

1. /WE is High for Read Cycle.

2. Assuming that /CS1 Low transition or CS2 High transition occurs coincident with or after /WE Low

transition. Outputs remain in a high impedance state.

3. Assuming that /CS1 High transition or CS2 Low transition occurs coincident with or prior to /WE High

transition. Outputs remain in a high impedance state.

4. Assuming that /OE is high for write cycle. Outputs are in a high impedance state during this period.

116

GM76U8128CL/CLL

Data Retention Characteristics

Symbol

Parameter

Min Typ Max Unit

2.0

3.3

VCCR

Data Retention Supply Voltage

L - Version

LL - Version

0.5

15*

GM76U8128C

Data Retention

ICCR

Current

VCC=3.0V

L - Version

LL - Version

GM76U8128C-E

0.5

20*

GM76U8128C-I

Chip Select to Data Retention Time

Operation Recovery Time

tCDR

tRC**

* 3uA max at T

= 0 ~ 40C

** tRC = Read Cycle

* Low VCC Data Retention Mode: (1) /CS1 Controlled

Data Retention Mode

CDR

VCC

2.7V

2.2V

VCCR1

/CS1>=VCCR - 0.2V

/CS1

* Low VCC Data Retention Mode: (2) CS2 Controlled

Data Retention Mode

CDR

VCC

2.7V

CS2

VCCR2

0.4V

CS2 <= 0.2V

Notes: In Data Retention Mode, CS2 controls the Address, /WE, /CS1, /OE and DIN buffer. If CS2 controls

data retention mode, VIN for these inputs can be in the high impedance state. If /CS1 controls the

data retention mode, CS2 must satisfy either CS2 VCCR - 0.2V or CS2<=0.2V. The other input levels

(Address, /WE, /OE, I/O) can be in the high impedance state.

117

GM76U8128CL/CLL

Package Dimensions

Unit: Inches (mm)

32 DIP

0 ~ 15 ^o

1.645(41.78) MIN

1.665(42.29) MAX

0.045(1.14) MIN

0.055(1.40) MAX

0.008(0.200) MIN

0.015(0.380) MAX

0.15(3.81)

TYP

0.165(4.191) MIN

0.190(4.83) MAX

0.015(0.38)

0.125(3.18) MIN

0.135(3.43) MAX

0.016(0.41) MIN

0.020(0.51) MAX

0.100(2.54)

TYP

MIN

32 SOP

0.02(0.53) MIN

0.04(1.04) MAX

0 ~ 8

0.004(0.10) MIN

0.010(0.254) MAX

0.799(20.30) MIN

0.815(20.70) MAX

0.086(2.18) MIN

0.090(2.29) MAX

0.014(0.35) MIN

0.020(0.50) MAX

0.050(1.27)

TYP

0.004(0.102) MIN

0.010(0.254) MAX

118

GM76U8128CL/CLL

32 TSOP I (8x20mm)

/OE

A10

/CS1

I/O7

A11

A13

/WE

CS2

A15

VCC

N.C

I/O6

I/O5

I/O4

I/O3

VSS

I/O2

I/O1

I/O0

A16

A14

A12

0.720(18.30) MIN

0.728(18.50) MAX

0.006(0.15) MIN

0.000(0.00) MAX

0.780(19.80) MIN

0.795(20.20) MAX

0.039(1.0) MIN

0.047(1.2) MAX

0.016(0.40) MIN

0.024(0.60) MAX

32Small TSOP-I(8x13.4mm)

/OE

A10

/CS1

I/O7

I/O6

I/O5

I/O4

I/O3

VSS

I/O2

I/O1

I/O0

A11

A13

/WE

CS2

A15

VCC

N.C

A16

A14

A12

0.461(11.70) MIN

0.467(11.86) MAX

0.002(0.05) MIN

0.006(0.15) MAX

0.527(13.30) MIN

0.528(13.50) MAX

0.035(1.2) MIN

0.044(1.0) MAX

0.020(0.6) MIN

0.019(0.4) MAX

119

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