ICS512MT [ICSI]
LOCO⑩ PLL Clock Multiplier; LOCO ™ PLL时钟乘法器
| 型号： | ICS512MT |
| 厂家： | 
INTEGRATED CIRCUIT SOLUTION INC |
| 描述： | LOCO⑩ PLL Clock Multiplier |
| 文件： | 总4页 (文件大小：50K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ICS512
LOCO™ PLL Clock Multiplier
Description
Features
• Packaged as 8 pin SOIC or die
The ICS512 LOCO™ is the most cost effective
way to generate a high quality, high frequency
clock output and a reference clock from a lower
frequency crystal or clock input. The name LOCO
stands for LOw Cost Oscillator, as it is designed
to replace crystal oscillators in most electronic
systems. Using Phase-Locked-Loop (PLL)
techniques, the device uses a standard fundamental
mode, inexpensive crystal to produce output
clocks up to 200 MHz. With a reference output,
this chip plus an inexpensive crystal can replace two
oscillators.
• Upgrade of popular ICS502 with:
- changed multiplier table
- higher operating frequencies
• Zero ppm multiplication error
• Easy to cascade with other 5xx series
• Input crystal frequency of 5 - 27 MHz
• Input clock frequency of 2 - 50 MHz
• Output clock frequencies up to 200 MHz
• Compatible with all popular CPUs
• Duty cycle of 45/55 up to 200 MHz
• Mask option for 9 selectable frequencies
• Operating voltages of 3.0 to 5.5V
• Industrial temperature version available
• Advanced, low power CMOS process
Stored in the chip’s ROM is the ability to generate
nine different popular multiplication factors,
allowing one chip to output many common
frequencies (see page 2).
Block Diagram
VDD GND
2
Output
Buffer
S1, S0
PLL
Clock
CLK
Synthesis
and Control
Circuitry
Crystal or
clock input
X1/ICLK
X2
Crystal
Oscillator
Output
Buffer
REF
Optional crystal capacitors
MDS 512 C
1
Revision 061900
Printed 11/13/00
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126•(408) 295-9800tel • www.icst.com
ICS512
LOCO™ PLL Clock Multiplier
Pin Assignment
Clock Output Table
S1
0
S0
0
CLK
4X input
1
2
3
4
8
7
6
5
X1/ICLK
VDD
X2
S1
0
M
1
5.333X input
5X input
0
GND
S0
M
M
M
1
0
2.5X input
2X input
M
1
REF
CLK
3.333X input
6X input
0
1
M
1
3X input
1
8X input
0 = connect directly to ground.
1 = connect directly to VDD.
M = leave unconnected (floating).
Common Output Frequencies Examples (MHz)
Output
Input
20
24
12
30
10
32
16
33.33
16.66
M, M
37.5
15
40
10
48
12
50
20
60
10
64
16
10
Selection (S1, S0) M, M
M, M
1, M
M, M
M, 0
0, 0
0, 0
M, 0
1, 0
0, 0
Output
66.66
20
72
12
75
25
80
10
83.33
25
90
15
100
20
120
15
125
25
133.33
25
150
25
Input
Selection (S1, S0)
M, 1
1, 0
1, M
1, 1
M, 1
1, 0
0, 1
1, 1
0, 1
0, M
1, 0
Note that all of the above outputs are achieved by using a common, inexpensive 10MHz to 25MHz crystal.
Consult ICS on how to achieve other output frequencies.
Pin Descriptions
Number
Name
X1/ICLK
VDD
GND
REF
CLK
S0
Type Description
1
2
3
4
5
6
7
8
XI
P
Crystal connection or clock input.
Connect to +3.3V or +5V.
P
Connect to ground.
O
Buffered crystal oscillator output clock.
O
Clock output per Table above.
T I
T I
XO
Multiplier select pin 0. Connect to GND or VDD or float (no connection).
Multiplier select pin 1. Connect to GND or VDD or float (no connection).
Crystal connection. Leave unconnected for clock input.
S1
X2
Key: XI/XO = crystal connections, TI = tri-level input, O = output, P = power supply connection
MDS 512 C
2
Revision 061900
Printed 11/13/00
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126•(408) 295-9800tel • www.icst.com
ICS512
LOCO™ PLL Clock Multiplier
Electrical Specifications
Parameter
Conditions
Minimum
Typical
Maximum
Units
ABSOLUTE MAXIMUM RATINGS (stresses be ond these can permanentl damage the device)
Supply Voltage, VDD
Inputs
Referenced to GND
Referenced to GND
Referenced to GND
7
VDD+0.5
VDD+0.5
70
V
V
-0.5
-0.5
0
Clock Output
V
Ambient Operating Temperature
°C
°C
°C
°C
ICS512MI only
-40
85
Soldering Temperature
Storage temperature
Max of 10 seconds
260
-65
150
DC CHARACTERISTICS (VDD = 3.3V unless otherwise noted)
Operating Voltage, VDD
3
5.5
(VDD/2)-1
0.5
V
V
Input High Voltage, VIH, ICLK only
Input Low Voltage, VIL, ICLK only
Input High Voltage, VIH
ICLK (Pin 1)
ICLK (Pin 1)
S0, S1
(VDD/2)+1
VDD/2
VDD/2
V
VDD-0.5
V
Input Low Voltage, VIL
S0, S1
V
Output High Voltage, VOH, CMOS high
Output High Voltage, VOH
IOH=-8mA
IOH=-12mA
IOL=12mA
VDD-0.4
2.4
V
V
Output Low Voltage, VOL
0.4
V
IDD Operating Supply Current, 20 MHz crystal No Load, 100MHz
9
±70
4
mA
mA
pF
Short Circuit Current
CLK output
Pins 6, 7
Input Capacitance, S1, S0
AC CHARACTERISTICS (VDD = 3.3V unless otherwise noted)
Input Frequency, crystal input
5
27
50
MH z
MH z
MH z
MH z
MH z
MH z
ns
Input Frequency, clock input
2
Output Frequency, VDD = 4.5 to 5.5V
Note 1
0 to +70 °C
14
14
14
14
200
160
160
145
-40 to +85 °C
0 to +70 °C
Output Frequency, VDD = 3.0 to 3.6V
Note 1
-40 to +85 °C
0.8 to 2.0V
Output Clock Rise Time
Output Clock Fall Time
Output Clock Duty Cycle
Absolute Clock Period Jitter
One Sigma Clock Period Jitter
1
1
2.0 to 0.8V
ns
at VDD/2
45
49 to 51
±200
80
55
%
Deviation from mean
ps
ps
Note 1: The phase relationship between input and output clocks can change at power up. For a fixed phase relationship, see the ICS570
or the ICS527.
MDS 512 C
3
Revision 061900
Printed 11/13/00
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126•(408) 295-9800tel • www.icst.com
ICS512
LOCO™ PLL Clock Multiplier
External Components / Crystal Selection
The ICS512 requires a 0.01µF decoupling capacitor to be connected between VDD and GND. It must be
connected close to the ICS512 to minimize lead inductance. No external power supply filtering is required
for this device. A 33 Ω terminating resistor can be used next to the CLK and REF pins. The total on-chip
capacitance is approximately 15 pF, so a parallel resonant, fundamental mode crystal should be used. For
crystals with a specified load capacitance greater than 15 pF, crystal capacitors should be connected from
each of the pins X1 and X2 to Ground as shown in the Block Diagram on page 1. The value (in pF) of
these crystal caps should be = (CL-15)*2, where CL is the crystal load capacitance in pF. These external
capacitors are only required for applications where the exact frequency is critical. For a clock input,
connect to X1 and leave X2 unconnected (no capacitors on either).
Package Outline and Package Dimensions (For current dimensional specifications, see JEDEC 95.)
8 pin SOIC
Inches
Min
Millimeters
Symbol
A
Max
Min
1.35
Max
0.0532
0.0040
0.0130
0.0075
0.1890
0.1497
.050 BSC
0.2284
0.0099
0.0160
0.0688
0.0098
0.0200
0.0098
0.1968
0.1574
1.75
0.24
0.51
0.24
5.00
4.00
A1
0.10
B
C
0.33
E
H
0.19
INDEX
AREA
D
E
e
4.80
3.80
1.27 BSC
5.80
1
2
H
h
0.2440
0.0195
0.0500
6.20
0.50
1.27
0.25
h x 45°
L
0.41
D
A
A1
C
B
e
L
Ordering Information
Part/Order Number
ICS512M
Marking
ICS512M
ICS512M
ICS512I
ICS512I
Package
8 pin SOIC
8 pin SOIC on tape and reel
8 pin SOIC
8 pin SOIC on tape and reel -40 to +85 °C
Temperature
0 to 70 °C
0 to 70 °C
ICS512MT
ICS512MI
ICS512MIT
-40 to +85 °C
While the information presented herein has been checked for both accuracy and reliability, ICS assumes no responsibility for either its use or for the infringement of any patents or
other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications.
Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without
additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life
support devices or critical medical instruments.
LOCO is a trademark of ICS
MDS 512 C
4
Revision 061900
Printed 11/13/00
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126•(408) 295-9800tel • www.icst.com
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