ICS83058AGILFT [ICSI]
8:1, SINGLE-ENDED MULTIPLEXER; 8 ： 1的单端多路复用器
| 型号： | ICS83058AGILFT |
| 厂家： | 
INTEGRATED CIRCUIT SOLUTION INC |
| 描述： | 8:1, SINGLE-ENDED MULTIPLEXER |
| 文件： | 总12页 (文件大小：153K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ICS83058I
Integrated
Circuit
Systems, Inc.
8:1, SINGLE-ENDED MULTIPLEXER
GENERAL DESCRIPTION
FEATURES
The ICS83058I is a low skew, 8:1, Single-ended • 8:1 single-ended multiplexer
Multiplexer and a member of the HiPerClockS™
ICS
• Q nominal output impedance: 7Ω (VDDO =3 .3V)
HiPerClockS™
family of High Performance Clock Solutions from
ICS. The ICS83058I has eight selectable single-
ended clock inputs and one single-ended clock
• Maximum output frequency: 250MHz
• Propagation delay: 3ns (maximum), VDD = VDDO = 3.3V
• Input skew: 225ps (maximum), VDD = VDDO = 3.3V
• Part-to-part skew: 475ps (maximum), VDD = VDDO = 3.3V
output. The output has a VDDO pin which may be set at 3.3V,
2.5V, or 1.8V, making the device ideal for use in voltage transla-
tion applications. An output enable pin places the output in
a high impedance state which may be useful for testing or
debug. The device operates up to 250MHz and is packaged
in a 16 TSSOP.
•
Operating supply modes:
VDD/VDDO
3.3V/3.3V
3.3V/2.5V
3.3V/1.8V
2.5V/2.5V
2.5V/1.8V
•
-40°C to 85°C ambient operating temperature
• Available in both standard and lead-free RoHS-compliant
packages
BLOCK DIAGRAM
PIN ASSIGNMENT
1
2
3
4
5
6
7
8
CLK0
CLK1
CLK2
Q
CLK7
OE
CLK6
GND
CLK5
SEL2
CLK4
16
15
14
13
12
11
10
9
VDDO
CLK0
SEL0
CLK1
VDD
CLK2
SEL1
CLK3
CLK3
CLK4
CLK5
Q
ICS83058I
16-LeadTSSOP
4.4mm x 5.0mm x 0.92mm package body
G Package
Top View
CLK6
CLK7
SEL2
SEL1
SEL0
OE
83058AGI
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ICS83058I
Integrated
Circuit
Systems, Inc.
8:1, SINGLE-ENDED MULTIPLEXER
TABLE 1. PIN DESCRIPTIONS
Number
Name
Type
Output
Description
Single-ended clock output. LVCMOS/LVTTL interface levels.
1
Q
2, 4,
6, 8,
9, 11,
13, 15
CLK7, CLK6,
CLK5, CLK4,
CLK3, CLK2,
CLK1, CLK0
Input Pulldown Single-ended clock inputs. LVCMOS/LVTTL interface levels.
Output enable. When LOW, outputs are in HIGH impedance state.
3
OE
Input
Pullup
When HIGH, outputs are active. LVCMOS / LVTTL interface levels.
5
GND
Power
Power supply ground.
7, 10,
14
SEL2, SEL1,
SEL0
Clock select input. See Control Input Function Table.
LVCMOS / LVTTL interface levels.
Input Pulldown
12
16
VDD
Power
Power
Core and input supply pin.
Output supply pin.
VDDO
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Units
pF
kΩ
kΩ
pF
pF
pF
Ω
Symbol Parameter
Test Conditions
Minimum Typical Maximum
CIN
Input Capacitance
Input Pullup Resistor
4
RPULLUP
51
51
18
20
30
7
RPULLDOWN Input Pulldown Resistor
VDDO = 3.465V
Power Dissipation Capacitance
(per output)
CPD
V
DDO = 2.625V
DDO = 1.89V
V
VDDO = 3.465V
VDDO = 2.625V
VDDO = 1.89V
ROUT
Output Impedance
7
Ω
10
Ω
TABLE 3. CONTROL INPUT FUNCTION TABLE
Control Inputs
Input Selected to Q
SEL2
SEL1
SEL0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
CLK0
CLK1
CLK2
CLK3
CLK4
CLK5
CLK6
CLK7
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ICS83058I
Integrated
Circuit
Systems, Inc.
8:1, SINGLE-ENDED MULTIPLEXER
ABSOLUTE MAXIMUM RATINGS
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device.These ratings are stress specifications only.Functional
operation of product at these conditions or any conditions be-
yond those listed in the DC Characteristics or AC Character-
istics is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect product reliability.
Supply Voltage, V
4.6V
DD
Inputs, V
-0.5V to VDD + 0.5 V
-0.5V to VDDO + 0.5V
I
Outputs, VO
Package Thermal Impedance, θJA 89°C/W (0 lfpm)
Storage Temperature, T -65°C to 150°C
STG
TABLE 4A. POWER SUPPLY DC CHARACTERISTICS, VDD = VDDO = 3.3V 5ꢀ, TA = -40°C TO 85°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
VDD
VDDO
IDD
Core Supply Voltage
3.135
3.135
3.3
3.3
3.465
3.465
40
V
Output Supply Voltage
Power Supply Current
Output Supply Current
V
mA
mA
IDDO
5
TABLE 4B. POWER SUPPLY DC CHARACTERISTICS, VDD = 3.3V 5ꢀ, VDDO = 2.5V 5ꢀ, TA = -40°C TO 85°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
VDD
VDDO
IDD
Core Supply Voltage
3.135
2.375
3.3
2.5
3.465
2.625
40
V
Output Supply Voltage
Power Supply Current
Output Supply Current
V
mA
mA
IDDO
5
TABLE 4C. POWER SUPPLY DC CHARACTERISTICS, VDD = 3.3V 5ꢀ, VDDO = 1.8V 5ꢀ, TA = -40°C TO 85°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
VDD
VDDO
IDD
Core Supply Voltage
3.135
1.71
3.3
1.8
3.465
1.89
40
V
Output Supply Voltage
Power Supply Current
Output Supply Current
V
mA
mA
IDDO
5
TABLE 4D. POWER SUPPLY DC CHARACTERISTICS, VDD = VDDO = 2.5V 5ꢀ, TA = -40°C TO 85°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
VDD
VDDO
IDD
Core Supply Voltage
2.375
2.375
2.5
2.5
2.625
2.625
35
V
Output Supply Voltage
Power Supply Current
Output Supply Current
V
mA
mA
IDDO
5
TABLE 4E. POWER SUPPLY DC CHARACTERISTICS, VDD = 2.5V 5ꢀ, VDDO = 1.8V 5ꢀ, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum Units
VDD
VDDO
IDD
Core Supply Voltage
2.375
1.71
2.5
1.8
2.625
1.89
35
V
Output Supply Voltage
Power Supply Current
Output Supply Current
V
mA
mA
IDDO
5
83058AGI
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ICS83058I
Integrated
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8:1, SINGLE-ENDED MULTIPLEXER
TABLE 4F. LVCMOS/LVTTL DC CHARACTERISTICS, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum Units
V
V
V
V
DD = 3.3V 5ꢀ
DD = 2.5V 5ꢀ
DD = 3.3V 5ꢀ
DD = 2.5V 5ꢀ
2
VDD + 0.3
VDD + 0.3
0.8
V
V
V
V
VIH
VIL
Input High Voltage
1.7
-0.3
-0.3
Input Low Voltage
Input High Current
0.7
CLK0:CLK7,
SEL0:SEL2
V
DD = 3.3V or 2.5V 5ꢀ
VDD = 3.3V or 2.5V 5ꢀ
DD = 3.3V or 2.5V 5ꢀ
150
5
µA
µA
µA
IIH
OE
CLK0:CLK7,
SEL0:SEL2
V
-5
IIL
Input Low Current
Output HighVoltage
OE
VDD = 3.3V or 2.5V 5ꢀ
VDDO = 3.3V 5ꢀ; NOTE 1
-150
2.6
µA
V
VOH
V
DDO = 2.5V 5ꢀ; NOTE 1
DDO = 1.8V 5ꢀ; NOTE 1
1.8
V
V
VDD - 0.3
V
VDDO = 3.3V 5ꢀ; NOTE 1
0.5
V
VOL
Output Low Voltage
V
DDO = 2.5V 5ꢀ; NOTE 1
DDO = 1.8V 5ꢀ; NOTE 1
0.45
0.35
V
V
V
NOTE 1: Outputs terminated with 50Ω to VDDO/2. See Parameter Measurement section, "Load Test Circuit" diagrams.
TABLE 5A. AC CHARACTERISTICS, VDD =VDDO = 3.3V 5ꢀ, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum Units
fMAX
Output Frequency
250
3.0
2.9
225
475
500
55
MHz
ns
tpLH
Propagation Delay, Low to High; NOTE 1
Propagation Delay, High to Low; NOTE 1
Input Skew; NOTE 2
2.4
2.5
2.7
2.7
55
tpHL
ns
tsk(i)
tsk(pp)
tR / tF
odc
ps
Part-to-Part Skew; NOTE 2, 3
Output Rise/Fall Time
ps
20ꢀ to 80ꢀ
@ 100MHz
50
45
ps
Output Duty Cycle
ꢀ
MUXISOL MUX Isolation
45
dB
NOTE 1: Measured from VDD/2 of the input to VDDO/2 of the output.
NOTE 2: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 3: Defined as skew between outputs on different devices operating a the same supply voltages and
with equal load conditions. Using the same type of input on each device, the output is measured at VDDO/2.
83058AGI
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REV.A SEPTEMBER 27, 2005
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ICS83058I
Integrated
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8:1, SINGLE-ENDED MULTIPLEXER
TABLE 5B. AC CHARACTERISTICS, VDD = 3.3V 5ꢀ, VDDO = 2.5V 5ꢀ, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum Units
fMAX
Output Frequency
250
3.1
3.0
150
400
500
55
MHz
ns
tpLH
Propagation Delay, Low to High; NOTE 1
Propagation Delay, High to Low; NOTE 1
Input Skew; NOTE 2
2.5
2.6
2.8
2.8
45
tpHL
ns
tsk(i)
tsk(pp)
tR / tF
odc
ps
Part-to-Part Skew; NOTE 2, 3
Output Rise/Fall Time
ps
20ꢀ to 80ꢀ
@ 100MHz
50
45
ps
Output Duty Cycle
ꢀ
MUXISOL MUX Isolation
45
dB
NOTE 1: Measured from VDD/2 of the input to VDDO/2 of the output.
NOTE 2: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 3: Defined as skew between outputs on different devices operating a the same supply voltages and
with equal load conditions. Using the same type of input on each device, the output is measured at VDDO/2.
TABLE 5C. AC CHARACTERISTICS, VDD = 3.3V 5ꢀ, VDDO = 1.8V 5ꢀ, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum Units
fMAX
Output Frequency
250
3.8
3.8
150
475
700
55
MHz
ns
tpLH
Propagation Delay, Low to High; NOTE 1
Propagation Delay, High to Low; NOTE 1
Input Skew; NOTE 2
2.7
2.8
3.2
3.3
50
tpHL
ns
tsk(i)
tsk(pp)
tR / tF
odc
ps
Part-to-Part Skew; NOTE 2, 3
Output Rise/Fall Time
ps
20ꢀ to 80ꢀ
@ 100MHz
100
45
ps
Output Duty Cycle
ꢀ
MUXISOL MUX Isolation
45
dB
NOTE 1: Measured from VDD/2 of the input to VDDO/2 of the output.
NOTE 2: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 3: Defined as skew between outputs on different devices operating a the same supply voltages and
with equal load conditions. Using the same type of input on each device, the output is measured at VDDO/2.
83058AGI
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REV.A SEPTEMBER 27, 2005
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ICS83058I
Integrated
Circuit
Systems, Inc.
8:1, SINGLE-ENDED MULTIPLEXER
TABLE 5D. AC CHARACTERISTICS, VDD =VDDO = 2.5V 5ꢀ, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum Units
fMAX
Output Frequency
250
3.5
3.4
175
300
500
60
MHz
ns
tpLH
Propagation Delay, Low to High; NOTE 1
Propagation Delay, High to Low; NOTE 1
Input Skew; NOTE 2
2.5
2.5
3.0
2.9
60
tpHL
ns
tsk(i)
tsk(pp)
tR / tF
odc
ps
Part-to-Part Skew; NOTE 2, 3
Output Rise/Fall Time
ps
20ꢀ to 80ꢀ
@ 100MHz
100
40
ps
Output Duty Cycle
ꢀ
MUXISOL MUX Isolation
45
dB
NOTE 1: Measured from VDD/2 of the input to VDDO/2 of the output.
NOTE 2: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 3: Defined as skew between outputs on different devices operating a the same supply voltages and
with equal load conditions. Using the same type of input on each device, the output is measured at VDDO/2.
TABLE 5E. AC CHARACTERISTICS, VDD = 2.5V 5ꢀ, VDDO = 1.8V -5ꢀ, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum Units
fMAX
Output Frequency
250
4.0
4.0
150
325
700
60
MHz
ns
tpLH
Propagation Delay, Low to High; NOTE 1
Propagation Delay, High to Low; NOTE 1
Input Skew; NOTE 2
2.6
2.7
3.3
3.3
50
tpHL
ns
tsk(i)
tsk(pp)
tR / tF
odc
ps
Part-to-Part Skew; NOTE 2, 3
Output Rise/Fall Time
ps
20ꢀ to 80ꢀ
@ 100MHz
100
40
ps
Output Duty Cycle
ꢀ
MUXISOL MUX Isolation
45
dB
NOTE 1: Measured from VDD/2 of the input to VDDO/2 of the output.
NOTE 2: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 3: Defined as skew between outputs on different devices operating a the same supply voltages and
with equal load conditions. Using the same type of input on each device, the output is measured at VDDO/2.
83058AGI
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REV.A SEPTEMBER 27, 2005
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ICS83058I
Integrated
Circuit
Systems, Inc.
8:1, SINGLE-ENDED MULTIPLEXER
PARAMETER MEASUREMENT INFORMATION
1.65V 5ꢀ
1.25V 5ꢀ
SCOPE
SCOPE
VDD
VDDO
,
VDD
VDDO
,
Qx
Qx
LVCMOS
GND
LVCMOS
GND
-1.65V 5ꢀ
-1.25V 5ꢀ
3.3V CORE/3.3V OUTPUT LOAD AC TEST CIRCUIT
2.5V CORE/2.5V OUTPUT LOAD AC TEST CIRCUIT
2.4 5ꢀ
2.05V 5ꢀ 1.25V 5ꢀ
0.9V 5ꢀ
SCOPE
SCOPE
VDD
VDD
VDDO
VDDO
Qx
Qx
LVCMOS
LVCMOS
GND
GND
-0.9V 5ꢀ
-1.25V 5ꢀ
3.3V CORE/2.5V OUTPUT LOAD AC TEST CIRCUIT
0.9V 5ꢀ
3.3V CORE/1.8V OUTPUT LOAD AC TEST CIRCUIT
1.6V 5ꢀ
Part 1
Qx
VDDO
2
SCOPE
VDD
VDDO
Qx
LVCMOS
Part 2
Qy
VDDO
GND
2
tsk(pp)
-0.9V 5ꢀ
2.5 CORE/1.8V OUTPUT LOAD AC TEST CIRCUIT
PART-TO-PART SKEW
83058AGI
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REV.A SEPTEMBER 27, 2005
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ICS83058I
Integrated
Circuit
Systems, Inc.
8:1, SINGLE-ENDED MULTIPLEXER
VDD
2
VDD
2
80ꢀ
tF
80ꢀ
tR
CLK0:CLK7
Q
VDDO
2
20ꢀ
20ꢀ
VDDO
2
Clock
Outputs
tpLH
tpHL
PROPAGATION DELAY
OUTPUT RISE/FALL TIME
CLKx
VDDO
2
Q
Q
tPW
tPERIOD
tPD1
tPW
x 100ꢀ
odc =
tPERIOD
CLKy
Q
tPD2
tsk(i) = ⏐tPD2 – tPD1
⏐
INPUT SKEW
OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
83058AGI
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REV.A SEPTEMBER 27, 2005
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ICS83058I
Integrated
Circuit
Systems, Inc.
8:1, SINGLE-ENDED MULTIPLEXER
APPLICATION INFORMATION
RECOMMENDATIONS FOR UNUSED INPUT PINS
INPUTS:
CLK INPUT:
LVCMOS CONTROL PINS:
For applications not requiring the use of a clock input, it can
be left floating. Though not required, but for additional
protection, a 1kW resistor can be tied from the CLK input to
ground.
All control pins have internal pull-ups or pull-downs;
additional resistance is not required but can be added for
additional protection. A 1kΩ resistor can be used.
83058AGI
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REV.A SEPTEMBER 27, 2005
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ICS83058I
Integrated
Circuit
Systems, Inc.
8:1, SINGLE-ENDED MULTIPLEXER
RELIABILITY INFORMATION
TABLE 6. θJAVS. AIR FLOW TABLE FOR 16 LEAD TSSOP
θJA byVelocity (Linear Feet per Minute)
0
200
118.2°C/W
81.8°C/W
500
106.8°C/W
78.1°C/W
Single-Layer PCB, JEDEC Standard Test Boards
Multi-Layer PCB, JEDEC Standard Test Boards
137.1°C/W
89.0°C/W
NOTE: Most modern PCB designs use multi-layered boards.The data in the second row pertains to most designs.
TRANSISTOR COUNT
The transistor count for ICS83058I is: 874
83058AGI
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REV.A SEPTEMBER 27, 2005
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ICS83058I
Integrated
Circuit
Systems, Inc.
8:1, SINGLE-ENDED MULTIPLEXER
PACKAGE OUTLINE - G SUFFIX FOR 16 LEAD TSSOP
TABLE 7. PACKAGE DIMENSIONS
Millimeters
Minimum Maximum
SYMBOL
N
A
16
--
1.20
0.15
1.05
0.30
0.20
5.10
A1
A2
b
0.05
0.80
0.19
0.09
4.90
c
D
E
6.40 BASIC
0.65 BASIC
E1
e
4.30
4.50
L
0.45
0°
0.75
8°
α
aaa
--
0.10
Reference Document: JEDEC Publication 95, MO-153
83058AGI
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REV.A SEPTEMBER 27, 2005
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ICS83058I
Integrated
Circuit
Systems, Inc.
8:1, SINGLE-ENDED MULTIPLEXER
TABLE 8. ORDERING INFORMATION
Part/Order Number
ICS83058AGI
Marking
Package
Shipping Packaging
tube
Temperature
-40°C to 85°C
-40°C to 85°C
-40°C to 85°C
-40°C to 85°C
83058AGI
83058AGI
TBD
16 Lead TSSOP
ICS83058AGIT
ICS83058AGILF
ICS83058AGILFT
16 Lead TSSOP
2500 tape & reel
tube
16 Lead "Lead-Free" TSSOP
16 Lead "Lead-Free" TSSOP
TBD
2500 tape & reel
NOTE: Parts that are ordered with an "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant.
The aforementioned trademark, HiPerClockS™ is a trademark of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries.
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use
or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use
in normal commercial and industrial applications. Any other applications such as those requiring high reliability or other extraordinary environmental requirements are not
recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product
for use in life support devices or critical medical instruments.
83058AGI
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REV.A SEPTEMBER 27, 2005
12
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