ICS8343 [ICSI]

Low Skew 1-to-16 Fanout Buffer; 低偏移1至16扇出缓冲器
ICS8343
型号: ICS8343
厂家: INTEGRATED CIRCUIT SOLUTION INC    INTEGRATED CIRCUIT SOLUTION INC
描述:

Low Skew 1-to-16 Fanout Buffer
低偏移1至16扇出缓冲器

文件: 总7页 (文件大小:185K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
ICS8343  
LOW SKEW 1-TO-16  
FANOUT BUFFER  
Integrated  
Circuit  
Systems, Inc.  
GENERAL DESCRIPTION  
FEATURES  
The ICS8343 is a low skew, 1-to-16 Fanout 16 LVCMOS outputs  
,&6  
Buffer and a member of the HiPerClockS™  
Output frequency up to 200MHz  
HiPerClockS™ family of High Performance Clock Solutions  
from ICS. The ICS8343 is at 3.3V, 2.5V and  
250ps output skew  
700ps part to part  
mixed 3.3V input and 2.5V supply modes over  
the commercial temperature range. Guaranteed output and  
part-to-part skew characteristics make the ICS8343 ideal for  
those clock distribution applications demanding well defined  
performance and repeatability.  
CMOS compatible clock input at 5V, LVTTLand LVCMOS  
compatible at 3.3V and 2.5V  
LVTTLoutput enable inputs  
Dual output enable inputs facilitates 1-to-16 or 1-to-8 input to  
output modes  
3.3V, 2.5V or mixed 3.3V, 2.5V from 0°C to 70°C ambient  
operating temperature  
32 lead low-profile QFP(LQFP), 7mm x 7mm x 1.4mm  
package body, 0.8mm package lead pitch  
BLOCK DIAGRAM  
PIN ASSIGNMENT  
VDD1  
VDD  
VDD2  
CLK  
32 31 30 29 28 27 26 25  
Q15  
Q14  
Q13  
Q12  
Q11  
Q10  
Q9  
Q0  
Q1  
Q2  
Q3  
Q4  
Q5  
Q6  
Q7  
VDD1  
VDD1  
VDD1  
Q3  
1
2
3
4
5
6
7
8
24  
23  
22  
21  
20  
19  
18  
17  
VDD2  
VDD2  
VDD2  
Q12  
ICS8343  
Q4  
Q11  
GND  
GND  
GND  
GND  
GND  
GND  
Q8  
9
10 11 12 13 14 15 16  
OE1  
GND  
OE2  
32-Lead LQFP  
(Top View)  
8343  
www.icst.com  
REV. C, 07072000  
1
ICS8343  
LOW SKEW 1-TO-16  
FANOUT BUFFER  
Integrated  
Circuit  
Systems, Inc.  
TABLE 1. PIN DESCRIPTIONS  
Number  
1, 2, 3  
4, 5  
Name  
Type  
Description  
VDD1  
Power  
Output  
Power  
Output  
Input  
Output Q0 thru Q7 power supply. Connect to 5V, 3.3V or 2.5V.  
Clock outputs. 14typical output impedance.  
Connect to ground.  
Q3, Q4  
GND  
6, 7, 8  
9, 10, 11  
12  
Q5, Q6, Q7  
CLK  
Clock outputs. 14typical output impedance.  
Clock input.  
13  
VDD  
Power  
Output  
Power  
Output  
Power  
Output  
Input  
Input power supply. Connect to 5V, 3.3V or 2.5V  
Clock outputs. 14typical output impedance.  
Connect to ground.  
14, 15, 16  
17, 18, 19  
20, 21  
22, 23, 24  
25, 26, 27  
28  
Q8, Q9, Q10  
GND  
Q11, Q12  
VDD2  
Clock outputs. 14typical output impedance.  
Output Q8 thru Q15 power supply. Connect to 5V, 3.3V or 2.5V.  
Clock outputs. 14typical output impedance.  
Output enable. When low forces outputs Q8 thru Q15 to HiZ state.  
Output enable. When low forces outputs Q0 thru Q7 to HiZ state.  
Clock outputs. 14typical output impedance.  
Q13, Q14, Q15  
OE2  
Pullup  
Pullup  
29  
OE1  
Input  
30, 31, 32  
Q0, Q1, Q2  
Output  
TABLE 2. PIN CHARACTERISTICS  
Symbol  
Parameter  
Test Conditions  
Minimum  
Typical  
Maximum  
Units  
pF  
CIN  
Input Capacitance  
VDD1, VDD2 = 5.25V  
VDD1, VDD2 = 3.47V  
VDD1, VDD2 = 2.63V  
15  
11  
pF  
Power Dissipation Capacitance  
(per output)  
CPD  
pF  
9.5  
pF  
TABLE 3. FUNCTION TABLE  
Inputs  
Outputs  
OE1  
OE2  
Q0 thru Q7  
Hi Z  
Q8 thru Q15  
Hi Z  
0
1
0
1
0
0
1
1
Active  
Hi Z  
Hi Z  
Active  
Active  
Active  
8343  
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REV. C, 07072000  
2
ICS8343  
LOW SKEW 1-TO-16  
FANOUT BUFFER  
Integrated  
Circuit  
Systems, Inc.  
ABSOLUTE MAXIMUM RATINGS  
Supply Voltage  
7V  
Inputs  
Outputs  
AmbientOperatingTemperature  
StorageTemperature  
-0.5V to VDD+0.5 V  
-0.5V to VDD+0.5V  
Cto70°C  
-65°Cto150°C  
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifi-  
cations only and functional operation of the device at these or any conditions beyond those listed in the DC Electrical Characteristics or AC Electrical  
Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.  
TABLE 4A. DC ELECTRICAL CHARACTERISTICS, VDD = VDD1 = VDD2 = 3.3V±5%, TA = 0° TO 70°C  
Symbol  
Parameter  
Test Conditions  
Minimum  
Typical  
Maximum  
Units  
V
VDD, VDD1, VDD2 Operating Supply Voltage  
3.135  
2
3.3  
3.465  
CLK  
OEx  
CLK  
OEx  
CLK  
OEx  
CLK  
OEx  
VDD = 3.465V  
VDD = 3.465V  
VDD = 3.135V  
VDD = 3.135V  
VIN = VDD  
VDD + 0.3  
V
VIH  
VIL  
Input High Voltage  
Input Low Voltage  
2
VDD + 0.3  
V
-0.3  
-0.3  
0.8  
0.8  
1
V
V
IIH  
IIL  
Input High Current  
Input Low Current  
µA  
µA  
µA  
µA  
µA  
V
VIN = VDD  
1
VIN = 0V  
-15  
-15  
VIN = 0V  
IDD  
Input Operating Supply Current  
Output High Voltage  
100  
VOH  
VOL  
IOZH  
IOZL  
VDD = 3.135V, IOH = -25mA  
VDD = 3.135V, IOL = 25mA  
OEx = 0V, VOUT = VDD  
OEx = 0V, VOUT = 0V  
2.4  
-1  
Output Low Voltage  
0.8  
1
V
High Impedance Leakage Current  
High Impedance Leakage Current  
µA  
µA  
TABLE 5A. AC ELECTRICAL CHARACTERISTICS, VDD = VDD1 = VDD2 = 3.3V±5%, TA = 0° TO 70°C  
Symbol  
fMAX  
tpLH  
tpHL  
Parameter  
Test Conditions  
Minimum  
Typical  
Maximum  
200  
Units  
MHz  
ns  
Maximum Input Frequency  
Propagation Delay, Low-to-High  
Propagation Delay, High-to-Low  
Output Skew; NOTE 3  
Process Skew; NOTE 4  
Part-to-Part Skew; NOTE 5  
Output Rise Time  
0 < f 200MHz  
1.1  
1.2  
2.1  
2.0  
3.1  
0 < f 200MHz  
2.7  
ns  
tsk(o)  
tsk(p)  
tsk(pp)  
tR  
Measured on rising edge @VDDx/2  
Measured on rising edge @VDDx/2  
Measured on rising edge @VDDx/2  
250  
ps  
450  
ps  
700  
ps  
0.5  
0.9  
0.8  
ns  
tF  
Output Fall Time  
1.7  
ns  
tCYCLE/2  
- 0.5  
tCYCLE/2  
+ 0.5  
tPW  
Output Pulse Width  
tCYCLE/2  
ns  
NOTE 1: All parameters measured at fMAX unless noted otherwise.  
NOTE 2: Outputs terminated with 50resistor connected to VDDx/2.  
NOTE 3: Defined as skew across outputs at the same supply voltages and with equal load conditions.  
NOTE 4: Defined as skew at the same output on different devices operating at the same supply voltages and with equal load conditions.  
NOTE 5: Defined as skew at different outputs on different devices operating at the same supply voltages and with equal load conditions.  
8343  
www.icst.com  
REV. C, 07072000  
3
ICS8343  
LOW SKEW 1-TO-16  
FANOUT BUFFER  
Integrated  
Circuit  
Systems, Inc.  
TABLE 4B. DC ELECTRICAL CHARACTERISTICS, VDD = 3.3V±5%, VDD1 = VDD2 = 2.5V±5%, TA = 0° TO 70°C  
Symbol  
VDD  
Parameter  
Test Conditions  
Minimum  
3.135  
2.375  
2
Typical  
3.3  
Maximum  
3.465  
2.625  
VDD + 0.3  
VDD + 0.3  
0.8  
Units  
Input Operating Supply Voltage  
Output Operating Supply Voltage  
V
VDD1, VDD2  
VIH  
2.5  
Input High Voltage  
Input Low Voltage  
Input High Current  
Input Low Current  
CLK  
OEx  
CLK  
OEx  
CLK  
OEx  
CLK  
OEx  
VDD = 3.465  
VDD = 3.465  
VDD = 3.135  
VDD = 3.135  
VIN = VDD  
VIN = VDD  
VIN = 0V  
V
2
V
VIL  
IIH  
IIL  
-0.3  
V
-0.3  
0.8  
V
1
µA  
µA  
µA  
µA  
µA  
V
1
-15  
-15  
VIN = 0V  
IDD  
Input Operating Supply Current  
Output High Voltage  
100  
VOH  
VOL  
IOZH  
IOZL  
VDD = 2.375V, IOH = -25mA  
VDD = 2.375V, IOL = 25mA  
OEx = 0V, VOUT = VDD  
OEx = 0V, VOUT = 0V  
1.5  
-1  
Output Low Voltage  
0.8  
1
V
High Impedance Leakage Current  
High Impedance Leakage Current  
µA  
µA  
TABLE 5B. AC ELECTRICAL CHARACTERISTICS, VDD = 3.3V±5%, VDD1 = VDD2 = 2.5V±5%, TA = 0° TO 70°C  
Symbol  
fMAX  
tpLH  
tpHL  
Parameter  
Test Conditions  
Minimum  
Typical  
Maximum  
200  
Units  
MHz  
ns  
Maximum Input Frequency  
Propagation Delay, Low-to-High  
Propagation Delay, High-to-Low  
Output Skew; NOTE 3  
Process Skew; NOTE 4  
Part-to-Part Skew; NOTE 5  
Output Rise Time  
0 < f 200MHz  
1.0  
1.4  
2.3  
2.3  
3.2  
0< f 200MHz  
3.2  
ns  
tsk(o)  
tsk(p)  
tsk(pp)  
tR  
Measured on rising edge @VDDx/2  
Measured on rising edge @VDDx/2  
Measured on rising edge @VDDx/2  
250  
ps  
450  
ps  
700  
ps  
0.5  
0.9  
0.8  
ns  
tF  
Output Fall Time  
1.7  
ns  
tCYCLE/2  
- 0.5  
tCYCLE/2  
+ 0.5  
tPW  
Output Pulse Width  
tCYCLE/2  
ns  
NOTE 1: All parameters measured at fMAX unless noted otherwise.  
NOTE 2: Outputs terminated with 50resistor connected to VDDx/2.  
NOTE 3: Defined as skew across outputs at the same supply voltages and with equal load conditions.  
NOTE 4: Defined as skew at the same output on different devices operating at the same supply voltages and with equal load conditions.  
NOTE 5: Defined as skew at different outputs on different devices operating at the same supply voltages and with equal load conditions.  
8343  
www.icst.com  
REV. C, 07072000  
4
ICS8343  
LOW SKEW 1-TO-16  
FANOUT BUFFER  
Integrated  
Circuit  
Systems, Inc.  
TABLE 4C. DC ELECTRICAL CHARACTERISTICS, VDD = VDD1 = VDD2 = 2.5V±5%, TA = 0° TO 70°C  
Symbol  
Parameter  
Test Conditions  
Minimum  
Typical  
Maximum  
Units  
V
VDD, VDD1, VDD2 Operating Supply Voltage  
2.375  
2
2.5  
2.625  
VIH  
VIL  
IIH  
Input High Voltage  
Input Low Voltage  
Input High Current  
Input Low Current  
CLK  
OEx  
CLK  
OEx  
CLK  
OEx  
CLK  
OEx  
VDD = 2.625  
VDD = 2.625  
VDD = 2.375  
VDD = 2.375  
VIN = VDD  
VIN = VDD  
VIN = 0V  
VDD + 0.3  
V
2
VDD + 0.3  
V
-0.3  
-0.3  
0.7  
0.8  
1
V
V
µA  
µA  
µA  
µA  
µA  
V
1
IIL  
-10  
-10  
VIN = 0V  
IDD  
Input Operating Supply Current  
Output High Voltage  
100  
VOH  
VOL  
IOZH  
IOZL  
VDD = 2.375V, IOH = -25mA  
VDD = 2.375V, IOL = 25mA  
OEx = 0V, VOUT = VDD  
OEx = 0V, VOUT = 0V  
1.5  
-1  
Output Low Voltage  
0.8  
1
V
High Impedance Leakage Current  
High Impedance Leakage Current  
µA  
µA  
TABLE 5C. AC ELECTRICAL CHARACTERISTICS, VDD = VDD1 = VDD2 = 2.5V±5%, TA = 0° TO 70°C  
Symbol  
fMAX  
tpLH  
tpHL  
Parameter  
Test Conditions  
Minimum  
Typical  
Maximum  
133  
Units  
MHz  
ns  
Maximum Input Frequency  
Propagation Delay, Low-to-High  
Propagation Delay, High-to-Low  
Output Skew; NOTE 3  
Process Skew; NOTE 4  
Part-to-Part Skew; NOTE 5  
Output Rise Time  
0 < f 200MHz  
1.0  
1.4  
2.5  
2.6  
3.7  
0< f 200MHz  
3.5  
ns  
tsk(o)  
tsk(p)  
tsk(pp)  
tR  
Measured on rising edge @VDDx/2  
Measured on rising edge @VDDx/2  
Measured on rising edge @VDDx/2  
250  
ps  
500  
ps  
750  
ps  
0.5  
0.9  
0.8  
ns  
tF  
Output Fall Time  
1.7  
ns  
tCYCLE/2  
- 0.75  
tCYCLE/2  
+ 0.75  
tPW  
Output Pulse Width  
tCYCLE/2  
ns  
NOTE 1: All parameters measured at fMAX unless noted otherwise.  
NOTE 2: Outputs terminated with 50resistor connected to VDDx/2.  
NOTE 3: Defined as skew across outputs at the same supply voltages and with equal load conditions.  
NOTE 4: Defined as skew at the same output on different devices operating at the same supply voltages and with equal load conditions.  
NOTE 5: Defined as skew at different outputs on different devices operating at the same supply voltages and with equal load conditions.  
8343  
www.icst.com  
REV. C, 07072000  
5
ICS8343  
LOW SKEW 1-TO-16  
FANOUT BUFFER  
Integrated  
Circuit  
Systems, Inc.  
PACKAGE OUTLINE & DIMENSIONS  
e / 2  
NOTE 4  
D
NOTE 5, 7  
D1  
D/2  
NOTE 3  
-D-  
-A, B, OR -D-  
D1/2  
b
NOTE 3  
-A-  
NOTE 3  
-B-  
E1  
E
e
-A, B, OR -D-  
N
O
T
N
O
T
E
4
NOTES:  
1. ALL DIMENSIONS AND TOLERANCING CONFORM TO  
ANSI Y14.5-1982  
E
5,  
7
2. DATUM PLANE -H- LOCATED AT MOLD PARTING  
LINE AND COINCIDENT WITH LEAD, WHERE LEAD  
EXITS PLASTIC BODY AT BOTTOM OF PARTING LINE.  
3. DATUMS A-B AND -D- TO BE DETERMINED AT  
CENTERLINE BETWEEN LEADS WHERE LEADS EXIT  
E/2  
N/4 TIPS  
0.20 C A-B  
4X  
D
E1/2  
PLASTIC AT DATUM PLANE -H-  
.
4. TO BE DETERMINED AT SEATING PLACE -C- .  
5. DIMENSIONS D1 AND E1 DO NOT INCLUDE MOLD  
PROTRUSION.  
SEE DETAIL A”  
6. “N” IS THE TOTAL NUMBER OF TERMINALS.  
7. THESE DIMENSIONS TO BE DETEREMINED AT DATUM  
PLANE -H-.  
8 PLACES  
11 / 13°  
8. PACKAGE TOP DIMENSIONSARE SMALLER THAN  
BOTTOM DIMENSIONS AND TOP OF PACKAGE WILL  
NOT OVERHANG BOTTOM OF PACKAGE.  
9. DIMENSION b DOES NOT INCLUDE DAMBAR  
PROTRUSION. ALLOWABLE DAMBAR PROTRUSION  
SHALL BE 0.08mm TOTAL IN EXCESS OF THE b  
DIMENSION AT MAXIMUM MATERIAL CONDITION.  
10. CONTROLLING DIMENSION: MILLIMETER.  
11. THIS OUTLINE CONFORMS TO JEDEC PUBLIBCATION  
95 REGISTRATION MS-026, VARIATION BBA.  
12. A1 IS DEFINED AS THE DISTANCE FROM THE  
SEATING PLANE TO THE LOWEST POINT OF THE  
PACKAGE.  
A
-H- NOTE 2 / / 0.10 C  
ccc  
-C-  
SEE DETAIL B”  
S
Y
M
B
O
L
JEDEC VARIATION  
ALL DIMENSIONS IN MILLIMETERS  
NOTE 9  
b
ddd M C A-B S D S  
WITH LEAD FINISH  
N
O
T
BBA  
E
MIN  
NOM  
MAX  
1.60  
0.15  
1.45  
0.09 / 0.20  
0.09 / 0.16  
A
A1  
A2  
D
0.05  
1.35  
12  
b1  
BASE MET AL  
1.4  
9.00 BSC.  
7.00 BSC.  
9.00 BSC.  
7.00 BSC.  
0.60  
4
D1  
E
7, 8  
4
0° MIN.  
- 0.05 S  
E1  
L
7, 8  
0.08/0.20 R.  
0.25  
GAUGE PLANE  
DATUM  
A2  
A1  
PLANE  
-H-  
0.45  
0.75  
N
32  
e
0.80 BSC.  
0.37  
0.08  
R. MIN.  
0° - 7 °  
b
0.30  
0.30  
0.45  
0.40  
0.10  
0.20  
0.20 MIN.  
L
b1  
ccc  
ddd  
0.35  
9
1.00 REF.  
8343  
www.icst.com  
REV. C, 07072000  
6
ICS8343  
LOW SKEW 1-TO-16  
FANOUT BUFFER  
Integrated  
Circuit  
Systems, Inc.  
ORDERING INFORMATION  
Part/Order Number  
ICS8343Y  
Marking  
ICS8343Y  
ICS8343Y  
Package  
32 Lead LQFP  
Count  
250 per tray  
2000  
Temperature  
0°C to 70°C  
0°C to 70°C  
ICS8343YT  
32 Lead LQFP on Tape and Reel  
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use or  
for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal  
commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recom-  
mended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use  
in life support devices or critical medical instruments.  
8343  
www.icst.com  
REV. C, 07072000  
7

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