IS61C3216-10K [ICSI]
32K x 16 HIGH-SPEED CMOS STATIC RAM; 32K ×16高速CMOS静态RAM
| 型号： | IS61C3216-10K |
| 厂家： | 
INTEGRATED CIRCUIT SOLUTION INC |
| 描述： | 32K x 16 HIGH-SPEED CMOS STATIC RAM |
| 文件： | 总8页 (文件大小：434K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
IS61C3216
32K x 16 HIGH-SPEED CMOS STATIC RAM
FEATURES
DESCRIPTION
1
The ICSI IS61C3216 is a high-speed, 512K static RAM
organized as 32,768 words by 16 bits. It is fabricated using
ICSI's high-performance CMOS technology. This highly reli-
able process coupled with innovative circuit design techniques,
yields fast access times with low power consumption.
• High-speed access time: 10, 12, 15, and 20 ns
• CMOS low power operation
— 450 mW (typical) operating
— 250 µW (typical) standby
2
• TTL compatible interface levels
• Single 5V ± 10% power supply
• I/O compatible with 3.3V device
• Fully static operation: no clock or refresh
required
• Three state outputs
• Industrial temperature available
When CE is HIGH (deselected), the device assumes a standby
mode at which the power dissipation can be reduced down with
CMOS input levels.
3
Easy memory expansion is provided by using Chip Enable and
Output Enable inputs, CE and OE. The active LOW Write
Enable (WE) controls both writing and reading of the memory.
A data byte allows Upper Byte (UB) and Lower Byte (LB)
access.
4
• Available in 44-pin 400mil SOJ package and
44-pin TSOP-2
5
The IS61C3216 is packaged in the JEDEC standard 44-pin
400mil SOJ and 44-pin 400mil TSOP-2.
FUNCTIONAL BLOCK DIAGRAM
6
7
32K x 16
MEMORY ARRAY
A0-A14
DECODER
8
VCC
GND
9
I/O0-I/O7
Lower Byte
I/O
DATA
CIRCUIT
COLUMN I/O
I/O8-I/O15
Upper Byte
10
11
12
CE
OE
WE
CONTROL
CIRCUIT
UB
LB
ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors
which may appear in this publication. © Copyright 2000, Integrated Circuit Solution Inc.
Integrated Circuit Solution Inc.
1
SR008-0B
IS61C3216
PIN CONFIGURATIONS
44-Pin SOJ
44-Pin TSOP-2
NC
A14
A13
A12
A11
CE
1
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A0
2
A1
NC
A14
A13
A12
A11
CE
I/O0
I/O1
I/O2
I/O3
Vcc
GND
I/O4
I/O5
I/O6
I/O7
WE
A10
A9
1
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A0
A1
A2
OE
UB
LB
I/O15
I/O14
I/O13
I/O12
GND
Vcc
I/O11
I/O10
I/O9
I/O8
NC
3
A2
2
4
OE
3
4
5
UB
5
6
LB
6
I/O0
I/O1
I/O2
I/O3
Vcc
GND
I/O4
I/O5
I/O6
I/O7
WE
A10
A9
7
I/O15
I/O14
I/O13
I/O12
GND
Vcc
I/O11
I/O10
I/O9
I/O8
NC
7
8
8
9
9
10
11
12
13
14
15
16
17
18
19
20
21
22
10
11
12
13
14
15
16
17
18
19
20
21
22
A3
A4
A5
A6
A3
A4
A8
A7
NC
A8
A5
NC
A7
A6
NC
NC
PIN DESCRIPTIONS
LB
Lower-byte Control (I/O0-I/O7)
Upper-byte Control (I/O8-I/O15)
No Connection
A0-A14
I/O0-I/O15
CE
Address Inputs
UB
Data Inputs/Outputs
Chip Enable Input
Output Enable Input
Write Enable Input
NC
Vcc
GND
Power
OE
Ground
WE
TRUTH TABLE
Mode
WE
CE
OE
LB
UB
I/O0-I/O7 I/O8-I/O15 Vcc Current
Not Selected
Output Disabled
X
H
X
H
L
L
X
H
X
X
X
H
X
X
H
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
ISB1, ISB2
ICC
Read
Write
H
H
H
L
L
L
L
L
L
L
L
L
L
L
L
X
X
X
L
H
L
L
H
L
H
L
L
H
L
L
DOUT
High-Z
DOUT
DIN
High-Z
DIN
High-Z
ICC
ICC
DOUT
DOUT
High-Z
DIN
DIN
2
Integrated Circuit Solution Inc.
SR008-0B
IS61C3216
ABSOLUTE MAXIMUM RATINGS(1)
Symbol Parameter
Note:
1. Stress greater than those listed under
ABSOLUTE MAXIMUM RATINGS
may cause permanent damage to the
device. This is a stress rating only and
functional operation of the device at
these or any other conditions above
those indicated in the operational sec-
tions of this specification is not implied.
Exposure to absolute maximum rat-
ing conditions for extended periods
may affect reliability.
Value
–0.5 to +7.0
–0.5 to +7.0
–65 to +150
1.5
Unit
V
V
°C
W
mA
VCC
Supply Voltage with Respect to GND
Terminal Voltage with Respect to GND
Storage Temperature
1
VTERM
TSTG
PT
Power Dissipation
IOUT
DC Output Current (LOW)
20
2
OPERATING RANGE
3
Range
Commercial
Ambient Temperature
Speed
VCC
0°C to +70°C
-10, -12
5V ± 5%
-15, -20 5V ± 10%
Industrial
–40°C to +85°C
-12
5V ± 5%
4
-15, -20 5V ± 10%
DC ELECTRICAL CHARACTERISTICS (Over Operating Range)
5
Symbol Parameter
Test Conditions
Min.
2.4
—
Max.
—
Unit
V
VOH
VOL
VIH
VIL
ILI
Output HIGH Voltage
VCC = Min., IOH = –4.0 mA
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage(1)
Input Leakage
VCC = Min., IOL = 8.0 mA
0.4
V
6
2.2
–0.5
–2
VCC + 0.5
V
0.8
2
V
GND < VIN < VCC
µA
µA
7
ILO
Output Leakage
GND < VOUT < VCC, Outputs Disabled
–2
2
Notes:
1. VIL (min.) = –3.0V for pulse width less than 10 ns.
8
POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range)
9
-10
-12
-15
Min. Max.
-20
Min. Max. Unit
Symbol Parameter
Test Conditions
VCC = Max.,
IOUT = 0 mA, f = fMAX
Min. Max. Min. Max.
ICC
Vcc Dynamic Operating
Supply Current
Com.
Ind.
—
—
300
—
—
—
270
300
—
—
250
270
—
—
230 mA
250
10
11
12
ISB1
TTL Standby Current
(TTL Inputs)
VCC = Max.,
VIN = VIH or VIL
CE > VIH , f = 0
Com.
Ind.
—
—
40
—
—
—
40
45
—
—
40
45
—
—
40
45
mA
ISB2
CMOS Standby
Current (CMOS Inputs)
VCC = Max.,
Com.
Ind.
—
—
5
—
—
—
5
10
—
—
5
10
—
—
5
10
mA
CE > VCC – 0.2V,
VIN > VCC – 0.2V, or
VIN
< 0.2V, f = 0
Note:
1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
Integrated Circuit Solution Inc.
3
SR008-0B
IS61C3216
CAPACITANCE(1)
Symbol
CIN
Parameter
Input Capacitance
Conditions
VIN = 0V
Max.
6
Unit
pF
COUT
Input/Output Capacitance
VOUT = 0V
8
pF
Note:
1. Tested initially and after any design or process changes that may affect these parameters.
READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)
-10
-12
-15
-20
Symbol
tRC
Parameter
Read Cycle Time
Min. Max.
Min. Max.
Min. Max.
Min. Max.
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
10
—
3
—
10
—
10
5
12
—
3
—
12
—
12
5
15
—
3
—
15
—
15
7
20
—
3
—
20
—
20
8
tAA
Address Access Time
Output Hold Time
CE Access Time
tOHA
tACE
—
—
0
—
—
0
—
—
0
—
—
—
0
tDOE
OE Access Time
(2)
tHZOE
OE to High-Z Output
OE to Low-Z Output
CE to High-Z Output
CE to Low-Z Output
LB, UB Access Time
LB, UB to High-Z Output
LB, UB to Low-Z Output
5
6
7
8
(2)
tLZOE
tHZCE
0
—
5
0
—
6
0
—
7
—
8
(2
0
0
0
0
(2)
tLZCE
tBA
4
—
5
4
—
6
4
—
7
4
—
8
—
0
—
0
—
0
—
—
5
tHZB
tLZB
5
6
7
8
5
—
5
—
5
—
—
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of
0 to 3.0V and output loading specified in Figure 1a.
2. Tested with the load in Figure 1b. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
3. Not 100% tested.
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Unit
0V to 3.0V
3 ns
Input and Output Timing
and Reference Level
1.5V
Output Load
See Figures 1a and 1b
AC TEST LOADS
480 Ω
480 Ω
5V
5V
OUTPUT
OUTPUT
255 Ω
255 Ω
30 pF
Including
jig and
5 pF
Including
jig and
scope
scope
Figure 1a.
Figure 1b.
4
Integrated Circuit Solution Inc.
SR008-0B
IS61C3216
AC WAVEFORMS
READ CYCLE NO. 1(1,2) (Address Controlled) (CE = OE = VIL, UB or LB = VIL)
1
t
RC
ADDRESS
2
t
AA
t
OHA
t
OHA
DATA VALID
DOUT
PREVIOUS DATA VALID
3
4
READ CYCLE NO. 2(1,3)
t
RC
5
ADDRESS
OE
t
AA
t
OHA
6
t
HZOE
t
DOE
LZOE
ACE
t
CE
7
t
t
HZCE
t
LZCE
LB, UB
8
t
BA
t
HZB
t
LZB
HIGH-Z
DOUT
DATA VALID
9
Notes:
1. WE is HIGH for a Read Cycle.
2. The device is continuously selected. OE, CE, UB, or LB = VIL.
3. Address is valid prior to or coincident with CE LOW transition.
10
11
12
Integrated Circuit Solution Inc.
5
SR008-0B
IS61C3216
WRITE CYCLE SWITCHING CHARACTERISTICS(1,3) (Over Operating Range)
-10
-12
-15
-20
Symbol
tWC
Parameter
Write Cycle Time
Min. Max.
Min. Max.
Min. Max.
Min. Max.
Unit
ns
10
—
—
—
12
10
10
—
—
—
15
11
11
—
—
—
20
12
12
—
—
—
tSCE
CE to Write End
9
ns
tAW
Address Setup Time
to Write End
9
ns
tHA
Address Hold from Write End
Address Setup Time
1
0
—
—
—
—
—
—
5
1
0
—
—
—
—
—
—
6
1
0
—
—
—
—
—
—
7
1
0
—
—
—
—
—
—
8
ns
ns
ns
ns
ns
ns
ns
ns
tSA
tPWB
tPWE
tSD
LB, UB Valid to End of Write
WE Pulse Width
9
10
8
11
10
7
12
11
8
7
Data Setup to Write End
Data Hold from Write End
WE LOW to High-Z Output
WE HIGH to Low-Z Output
5
6
tHD
0
0
0
0
(2)
tHZWE
—
1
—
1
—
1
—
1
(2)
tLZWE
—
—
—
—
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V
and output loading specified in Figure 1a.
2. Tested with the load in Figure 1b. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
3. The internal write time is defined by the overlap of CE LOW and UB or LB, and WE LOW. All signals must be in valid states to
initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the
rising or falling edge of the signal that terminates the write.
6
Integrated Circuit Solution Inc.
SR008-0B
IS61C3216
AC WAVEFORMS
WRITE CYCLE NO. 1 (WE Controlled)(1,2)
1
t
WC
2
ADDRESS
CE
t
HA
t
SCE
3
t
PWB
LB, UB
t
AW
4
t
PWE
WE
t
SA
5
(1)
WRITE
D
t
SD
t
HD
6
IN
t
HZWE
t
LZWE
HIGH-Z
HIGH-Z
DOUT
UNDEFINED
UNDEFINED
7
Notes:
8
1. WRITE is an internally generated signal asserted during an overlap of the LOW states on the CE and WE inputs and at least
one of the LB and UB inputs being in the LOW state.
2. WRITE = (CE) [ (LB) = (UB) ] (WE).
9
10
11
12
Integrated Circuit Solution Inc.
7
SR008-0B
IS61C3216
ORDERING INFORMATION
Commercial Range: 0°C to +70°C
ORDERING INFORMATION
Industrial Range: –40°C to +85°C
Speed (ns) Order Part No.
Package
Speed (ns) Order Part No.
Package
10
12
15
20
IS61C3216-10T 400mil TSOP-2
IS61C3216-10K 400mil SOJ
12
15
20
IS61C3216-12TI 400mil TSOP-2
IS61C3216-12KI 400mil SOJ
IS61C3216-12T 400mil TSOP-2
IS61C3216-12K 400mil SOJ
IS61C3216-15TI 400mil TSOP-2
IS61C3216-15KI 400mil SOJ
IS61C3216-15T 400mil TSOP-2
IS61C3216-15K 400mil SOJ
IS61C3216-20TI 400mil TSOP-2
IS61C3216-20KI 400mil SOJ
IS61C3216-20T 400mil TSOP-2
IS61C3216-20K 400mil SOJ
Integrated Circuit Solution Inc.
HEADQUARTER:
NO.2, TECHNOLOGY RD. V, SCIENCE-BASED INDUSTRIAL PARK,
HSIN-CHU, TAIWAN, R.O.C.
TEL: 886-3-5780333
Fax: 886-3-5783000
BRANCH OFFICE:
7F, NO. 106, SEC. 1, HSIN-TAI 5TH ROAD,
HSICHIH TAIPEI COUNTY, TAIWAN, R.O.C.
TEL: 886-2-26962140
FAX: 886-2-26962252
http://www.icsi.com.tw
8
Integrated Circuit Solution Inc.
SR008-0B
相关型号：
©2020 ICPDF网 联系我们和版权申明