IS62LV12816L-100TI [ICSI]
128K x 16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM; 128K ×16低电压，超低功耗CMOS静态RAM
| 型号： | IS62LV12816L-100TI |
| 厂家： | 
INTEGRATED CIRCUIT SOLUTION INC |
| 描述： | 128K x 16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM |
| 文件： | 总10页 (文件大小：463K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
IS62LV12816L
IS62LV12816LL
128K x 16 LOW VOLTAGE, ULTRA
LOW POWER CMOS STATIC RAM
FEATURES
DESCRIPTION
The ICSIIS62LV12816L and IS62LV12816LL are high-speed,
2.097,152-bit static RAMs organized as 131,072 words by 16
bits. They are fabricated using ICSI's high-performance CMOS
technology. This highly reliable process coupled with innova-
tive circuit design techniques, yields high-performance and
low power consumption devices.
High-speed access times: 55, 70, 100 ns
CMOS low power operation
-- 120 mW (typical) operating
-- 6 µW (typical) CMOS standby
TTL compatible interface levels
Single 2.7V-3.6V Vcc power supply
When CE is HIGH (deselected) or when CE is low and both LB
and UB are HIGH, the device assumes a standby mode at
which the power dissipation can be reduced by using CMOS
input levels.
Fully static operation: no clock or refresh re-
quired
Three state outputs
Easy memory expansion is provided by using Chip Enable
Output and Enable inputs, CE and OE. The active LOW Write
Enable (WE) controls both writing and reading of the memory.
A data byte allows Upper Byte (UB) and Lower Byte (LB)
access.
Data control for upper and lower bytes
Industrial temperature available
Available in the 44-pin TSOP-2 and 48-pin
6*8mm TF-BGA
The IS62LV12816L and IS62LV12816LL are packaged in the
JEDEC standare 44-pin 400mil TSOP-2 and 48-pin 6*8mm
TF-BGA.
FUNCTIONAL BLOCK DIAGRAM
128K x 16
MEMORY ARRAY
A0-A16
DECODER
VCC
GND
I/O0-I/O7
Lower Byte
I/O
DATA
COLUMN I/O
CIRCUIT
I/O8-I/O15
Upper Byte
CE
OE
WE
CONTROL
CIRCUIT
UB
LB
ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors
which may appear in this publication. © Copyright 2000, Integrated Circuit Solution Inc.
Integrated Circuit Solution Inc.
SR020-0C
1
IS62LV12816L
IS62LV12816LL
PIN CONFIGURATIONS
44-Pin TSOP-2
48-Pin TF-BGA
A4
A3
A2
A1
A0
1
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A5
A6
A7
OE
UB
LB
2
1
2
3
4
5
6
3
4
5
A0
A3
A1
A4
A2
LB
OE
UB
N/C
A
CE
6
I/O0
I/O1
I/O2
I/O3
Vcc
GND
I/O4
I/O5
I/O6
I/O7
WE
A16
A15
A14
A13
A12
7
I/O15
I/O14
I/O13
I/O12
GND
Vcc
I/O11
I/O10
I/O9
I/O8
NC
A8
A9
A10
A11
NC
I/O
CE
I/O
0
B
C
D
E
F
8
8
9
I/O
I/O
I/O
I/O
A5
A6
I/O
I/O
2
9
10
1
10
11
12
13
14
15
16
17
18
19
20
21
22
GND
NC
NC
A14
A12
A7
I/O
I/O
I/O
Vcc
11
3
4
5
GND
Vcc
A16
A15
A13
A10
12
I/O
14
I/O
I/O
6
13
I/O
15
NC
A8
WE
A11
I/O
7
G
H
NC
A9
NC
PIN DESCRIPTIONS
A0-A16
I/O0-I/O15
CE
Address Inputs
LB
Lower-byte Control (l/O0-I/O7)
Upper-byte Control (l/O8-I/O15)
No Connection
Data Input/Output
Chip Enable Input
Output Enable Input
Write Enable Input
UB
NC
Vcc
GND
OE
Power
WE
Ground
TRUTH TABLE
I/O PIN
I/O8-I/O15 Vcc Current
Mode
WE
CE
OE
LB
UB
I/O0/-I/O7
Not Selected
X
X
H
L
X
X
X
H
X
H
High-Z
High-Z
High-Z
ISB1, ISB2
ISB1, ISB2
High-Z
High-Z
High-Z
High-Z
DOUT
Output Disabled H
X
L
L
L
L
L
L
L
L
H
X
L
X
H
L
X
H
H
L
High-Z
High-Z
DOUT
High-Z
DOUT
DIN
ICC
ISB
ICC
Read
H
H
H
L
L
H
L
L
L
DOUT
Write
X
X
X
L
H
L
High-Z
DIN
ICC
L
H
L
High-Z
DIN
L
L
DIN
2
Integrated Circuit Solution Inc.
SR020-0C
IS62LV12816L
IS62LV12816LL
OPERATING RANGE
Range
Ambient Temperature
VCC
Commercial
0°C to +70°C
2.7V - 3.6V
Industrial
40°C to +85°C
2.7V - 3.6V
ABSOLUTE MAXIMUM RATINGS(1)
Symbol Parameter
Value
Unit
V
VTERM
TBIAS
VCC
Terminal Voltage with Respect to GND
Temperature Under Bias
Vcc related to GND
0.5 to Vcc + 0.5
40 to +85
0.3 to +4.0
65 to +150
1.0
°C
V
TSTG
PT
Storage Temperature
°C
W
Power Dissipation
Notes:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the
device. This is a stress rating only and functional operation of the device at these or any other conditions above
those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
DC ELECTRICAL CHARACTERISTICS (Over Operating Range)
Symbol Parameter
Test Conditions
Min.
Max.
Unit
VOH
VOL
VIH
Output HIGH Voltage
VCC = Min., IOH
VCC = Min., IOL
=
=
1
2.1
V
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage(1)
Input Leakage
2.2
0.2
1
VCC + 0.2
(1)
VIL
ILI
0.4
1
V
GND ≤ VIN ≤ VCC
GND ≤ VOUT ≤ VCC, OUTPUTS DISABLED
µA
µA
ILO
Output Leakage
1
1
Notes:
1. VIL(min.) = 2.0V for pulse width less than 10 ns.
CAPACITANCE(1)
Symbol
CIN
Parameter
ConditionsMax.
VIN = 0V
Unit
6
Input Capacitance
Output Capacitance
pF
pF
COUT
VOUT = 0V
8
Notes:
1. Tested initially and after any design or process changes that may affect these parameters.
Integrated Circuit Solution Inc.
SR020-0C
3
IS62LV12816L
IS62LV12816LL
AC TEST CONDITIONS
Parameter
Unit
0.4V to 2.2V
5 ns
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Level
1.3V
Output Load
See Figures 1 and 2
AC TEST LOADS
1 TTL
1 TTL
OUTPUT
OUTPUT
100 pF
5 pF
Including
jig and
Including
jig and
scope
scope
Figure 1
Figure 2
IS62LV12816L POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range)
-55
-70
-100
Symbol Parameter
Test Conditions
Min. Max.
Min. Max.
Min. Max.
Unit
ICC
Vcc Dynamic Operating
VCC = Max.,
Com.
Ind.
40
45
30
35
20
25
mA
Supply Current
IOUT = 0 mA, f = fMAX
ISB1
TTL Standby Current
(TTL Inputs)
VCC = Max.,
Com.
Ind.
0.4
1.0
0.4
1.0
0.4
1.0
mA
VIN = VIH or VIL,
CE
≤
VIH, f = 0
OR
ULB Control
VCC = Max., VIN = VIH or VIL
CE VIL, f = 0, UB VIH, LB
=
=
=
VIH
ISB2
CMOS Standby
VCC = Max.,
Com.
Ind.
35
50
35
50
35
50
µA
Current (CMOS Inputs)
CE
VIN
VIN
≥
≥
≤
VCC 0.2V,
VCC 0.2V, or
0.2V, f = 0
OR
ULB Control
VCC = Max., CE
=
VIL
VIN
≤
0.2V, f = 0, UB / LB
=
VCC 0.2V
Note:
1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
4
Integrated Circuit Solution Inc.
SR020-0C
IS62LV12816L
IS62LV12816LL
IS62LV12816LL POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range)
-55
-70
-100
Symbol Parameter
Test Conditions
Min. Max.
Min. Max.
Min. Max.
Unit
ICC
Vcc Dynamic Operating
VCC = Max.,
Com.
Ind.
40
45
30
35
20
25
mA
Supply Current
IOUT = 0 mA, f = fMAX
ISB1
TTL Standby Current
(TTL Inputs)
VCC = Max.,
Com.
Ind.
0.4
1.0
0.4
1.0
0.4
1.0
mA
VIN = VIH or VIL,
CE
≥
VIH, f = 0
OR
ULB Control
VCC = Max., VIN = VIH or VIL
CE VIL, f = 0, UB VIH, LB
=
=
=
VIH
ISB2
CMOS Standby
VCC = Max., f = 0
Com.
Ind.
10
15
10
15
10
15
µA
Current (CMOS Inputs)
CE
VIN
VIN
≥
≥
≤
VCC 0.2V,
VCC 0.2V, or
0.2V, f = 0
OR
ULB Control
VCC = Max., CE
=
VIL
VIN
≤
0.2V, f = 0, UB / LB
=
VCC 0.2V
Note:
1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)
-55
-70
-100
Min.
Symbol Parameter
Min.
55
10
5
Max.
Min.
70
10
5
Max.
Max.
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tRC
Read Cycle Time
100
15
5
tAA
Address Access Time
Output Hold Time
55
70
100
tOHA
tACE
tDOE
tHZOE
CE Access Time
55
30
20
70
35
25
100
50
OE Access Time
(2)
OE to High-Z Output
OE to Low-Z Output
CE to High-Z Output
CE to Low-Z Output
LB, UB Access Time
LB, UB o High-Z Output
LB. UB to Low-Z Output
30
(2)
tLZOE
(2)
tHZCE
0
20
0
25
0
30
(2)
tLZCE
tBA
10
0
10
0
10
0
55
25
70
25
100
35
tHZB
tLZB
0
0
0
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.3V, input pulse levels
of 0.4V to 2.2V and output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
Integrated Circuit Solution Inc.
SR020-0C
5
IS62LV12816L
IS62LV12816LL
AC TEST LOADS
READ CYCLE NO.1(1,2) (Address Controlled) (CE = OE = VIL, UB or LB = VIL)
t
RC
ADDRESS
t
AA
t
OHA
t
OHA
DATA VALID
DOUT
PREVIOUS DATA VALID
AC WAVEFORMS
READ CYCLE NO. 2(1,3) (CS, OE, AND UB/LB Controlled)
t
RC
ADDRESS
OE
t
AA
t
OHA
t
HZOE
t
DOE
LZOE
ACE
t
CE
t
t
HZCE
t
LZCE
LB, UB
t
BA
t
HZB
t
LZB
HIGH-Z
DOUT
DATA VALID
Notes:
1. WE is HIGH for a Read Cycle.
2. The device is continuously selected. OE, CE, UB, or LB = VIL.
3. Address is valid prior to or coincident with CE LOW transitions.
6
Integrated Circuit Solution Inc.
SR020-0C
IS62LV12816L
IS62LV12816LL
WRITE CYCLE SWITCHING CHARACTERISTICS(1,2) (Over Operating Range)
-55
-70
-100
Min.
Symbol Parameter
Min.
55
50
50
0
Max.
Min.
70
65
65
0
Max.
Max
40
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tWC
tSCE
tAW
Write Cycle Time
100
80
80
0
CE to Write End
Address Setup Time to Write End
Address Hold from Write End
Address Setup Time
tHA
tSA
0
0
0
tPWB
tPWE
tSD
LB, UB Valid to End of Write
WE Pulse Width
45
45
25
0
60
60
30
0
80
80
40
0
Data Setup to Write End
Data Hold from Write End
WE LOW to High-Z Output
WE HIGH to Low-Z Output
tHD
(3)
tHZWE
5
30
5
30
5
(3)
tLZWE
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.3V, input pulse levels of 0.4V to 2.2V
and output loading specified in Figure 1.
2. The internal write time is defined by the overlap of CE LOW, and UB or LB, and WE LOW. All signals must be in valid states to
initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the
rising or falling edge of the signal that terminates the Write.
3. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
AC WAVEFORMS
WRITE CYCLE NO. 1(1,2) (CS, Controlled, OE = HIGH or LOW)
t
WC
VALID ADDRESS
SCS
ADDRESS
CS
t
SA
t
t
HA
t
AW
t
t
PWE1
PWE2
WE
t
PWB
UB, LB
t
HZWE
t
LZWE
HIGH-Z
DATA UNDEFINED
DOUT
t
SD
t
HD
DATAIN VALID
DIN
Notes:
1. WRITE is an internally generated signal asserted during an overlap of the LOW states on the CS and WE inputs and at least
one of the LB and UB inputs being in the LOW state.
2. WRITE = (CS) [ (LB) = (UB) ] (WE).
Integrated Circuit Solution Inc.
SR020-0C
7
IS62LV12816L
IS62LV12816LL
WRITE CYCLE NO. 2 (WE Controlled; OE is HIGH During Write Cycle)
t
WC
ADDRESS
OE
VALID ADDRESS
t
HA
LOW
CS
t
AW
t
PWE1
WE
t
SA
t
PWB
UB, LB
t
HZWE
t
LZWE
HIGH-Z
DATA UNDEFINED
DOUT
t
SD
t
HD
DATAIN VALID
DIN
WRITE CYCLE NO. 3 (WE Controlled; OE is LOW During Write Cycle)
t
WC
ADDRESS
VALID ADDRESS
t
HA
LOW
LOW
OE
CS
t
t
AW
t
PWE2
WE
t
SA
t
PWB
UB, LB
HZWE
t
LZWE
HIGH-Z
DATA UNDEFINED
DOUT
t
SD
t
HD
DATAIN VALID
DIN
8
Integrated Circuit Solution Inc.
SR020-0C
IS62LV12816L
IS62LV12816LL
WRITE CYCLE NO. 4 (UB / LB Controlled)
t
WC
t
WC
ADDRESS 1
ADDRESS 2
ADDRESS
OE
CS
t
SA
LOW
t
HA
SA
t
HA
t
WE
t
PWB
t
PWB
UB, LB
WORD 1
WORD 2
t
HZWE
t
LZWE
HIGH-Z
DOUT
DATA UNDEFINED
t
HD
t
HD
t
SD
t
SD
DATAIN
VALID
DATAIN
VALID
DIN
DATA RETENTION SWITCHING CHARACTERISTICS (L/LL)
Symbol
VDR
Parameter
Test Condition
Min.
Max.
Unit
Vcc for Data Retention
Data Retention Current
See Data Retention Waveform
1.5
3.6
V
IDR
Vcc = 2.0V, CE
≥
Vcc 0.2V
Com. (-L)
Com. (-LL)
Ind. (-L)
20
5
µA
µA
µA
µA
25
7
Ind. (-LL)
tSDR
tRDR
Data Retention Setup Time
Recovery Time
See Data Retention Waveform
See Data Retention Waveform
0
ns
ns
tRC
DATA RETENTION WAVEFORM (CE Controlled)
t
SDR
Data Retention Mode
tRDR
V
V
CC
DR
2.7V
2.2V
CE ≥ VCC - 0.2V
CE
GND
Integrated Circuit Solution Inc.
SR020-0C
9
IS62LV12816L
IS62LV12816LL
ORDERING INFORMATION
Commercial Range: 0°C to +70°C
Industrial Range: -40°C to +85°C
Speed (ns) Order Part No.
Package
Speed (ns) Order Part No.
Package
55
IS62LV12816L-55TI
IS62LV12816L-55BI
400mil TSOP-2
6*8mm TF-BGA
55
IS62LV12816L-55T
IS62LV12816L-55B
400mil TSOP-2
6*8mm TF-BGA
70
IS62LV12816L-70TI
IS62LV12816L-70BI
400mil TSOP-2
6*8mm TF-BGA
70
IS62LV12816L-70T
IS62LV12816L-70B
400mil TSOP-2
6*8mm TF-BGA
100
IS62LV12816L-100TI
IS62LV12816L-100BI
400mil TSOP-2
6*8mm TF-BGA
100
IS62LV12816L-100T
IS62LV12816L-100B
400mil TSOP-2
6*8mm TF-BGA
ORDERING INFORMATION
Commercial Range: 0°C to +70°C
Industrial Range: -40°C to +85°C
Speed (ns) Order Part No.
Package
Speed (ns) Order Part No.
Package
55
IS62LV12816LL-55TI
400mil TSOP-2
6*8mm TF-BGA
55
IS62LV12816LL-55T
400mil TSOP-2
6*8mm TF-BGA
IS62LV12816LL-55BI
IS62LV12816LL-55B
70
IS62LV12816LL-70TI
IS62LV12816LL-70BI
400mil TSOP-2
6*8mm TF-BGA
70
IS62LV12816LL-70T
IS62LV12816LL-70B
400mil TSOP-2
6*8mm TF-BGA
100
IS62LV12816LL-100TI
IS62LV12816LL-100BI
400mil TSOP-2
6*8mm TF-BGA
100
IS62LV12816LL-100T
IS62LV12816LL-100B
400mil TSOP-2
6*8mm TF-BGA
Integrated Circuit Solution Inc.
HEADQUARTER:
NO.2, TECHNOLOGY RD. V, SCIENCE-BASED INDUSTRIAL PARK,
HSIN-CHU, TAIWAN, R.O.C.
TEL: 886-3-5780333
Fax: 886-3-5783000
BRANCH OFFICE:
7F, NO. 106, SEC. 1, HSIN-TAI 5TH ROAD,
HSICHIH TAIPEI COUNTY, TAIWAN, R.O.C.
TEL: 886-2-26962140
FAX: 886-2-26962252
http://www.icsi.com.tw
10
Integrated Circuit Solution Inc.
SR020-0C
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