MK3724GTR [ICSI]
VCXO PLUS AUDIO CLOCK FOR STB; VCXO以及音频时钟机顶盒
| 型号： | MK3724GTR |
| 厂家： | 
INTEGRATED CIRCUIT SOLUTION INC |
| 描述： | VCXO PLUS AUDIO CLOCK FOR STB |
| 文件： | 总8页 (文件大小：157K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MK3724
VCXO PLUS AUDIO CLOCK FOR STB
Description
Features
The MK3724 is a low cost, low jitter, high performance
VCXO and PLL clock synthesizer designed to replace
expensive discrete VCXOs and multipliers. The
patented on-chip Voltage Controlled Crystal Oscillator
accepts a 0 to 3.3 V input voltage to cause the output
clocks to vary by 115 ppm. Using ICS’ analog/digital
Phase-Locked Loop (PLL) techniques, the device uses
an inexpensive 27 MHz pullable crystal input to
produce a reference output and a selectable audio
clock.
• Packaged in 16-pin TSSOP
• Available in Pb free packaging
• Replaces a VCXO and oscillator
• Operating voltage of 3.3 V
• Provides output of 27 MHz plus audio clock
• Uses an inexpensive 27 MHz pullable crystal
• On-chip patented VCXO with pull range of 230 ppm
(minimum)
• VCXO tuning voltage of 0 to 3.3 V
ICS manufactures the largest variety of VCXO based
timing devices for all applications. Consult ICS to
eliminate VCXOs, crystals, and oscillators from your
board.
• Advanced, low power, sub-micron CMOS process
• Industrial temperature range available
• For other standard audio frequencies see the
MK3722
The frequency of the on-chip VCXO is adjusted by an
external control voltage connected to VIN. Because
VIN is a high impedance input, it can be driven directly
from an PWM RC integrator circuit.
Block Diagram
VDD
3
PLL/Clock
Synthesis
3
ACLK
S2:S0
Circuitry
VIN
X1
Voltage
27 MHz
Pullable
Crystal
Controlled
Crystal
Oscillator
27MHz
X2
3
GND
PDTS
MDS 3724 C
1
Revision 121904
Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
MK3724
VCXO PLUS AUDIO CLOCK FOR STB
Pin Assignment
Audio Clock Select Table
S2 S1 S0
ACLK (MHz)
3.072
X2
X1
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
S1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
NC
4.096
VDD
VDD
VIN
VDD
S0
6.144
8.192
27M
GND
ACLK
S2
12.288
24.576
33.8688
73.728
GND
GND
PDTS
16-pin TSSOP
Pin Descriptions
Pin
Number
Pin
Name
Pin
Type
Pin Description
1
2
X2
X1
Output Crystal connection. Connect to a 27 MHz fundamental mode
pullable crystal.
Input
Crystal connection. Connect to a 27 MHz fundamental mode
pullable crystal.
3
4
5
VDD
VDD
VIN
Power Connect to +3.3 V.
Power Connect to +3.3 V.
Input
Voltage input to VCXO. Changing the voltage between 0 to 3.3 V
controls the VCXO frequency.
6
7
8
GND
GND
PDTS
Power Connect to ground.
Power Connect to ground.
Power Power Down Tri-state. This pin powers down entire chip and
tri-states the outputs when low. Internal pull-up resistor.
9
S2
Input
Select input S2. Selects ACLK per table above. Internal pull-up
resistor.
10
11
12
13
ACLK
GND
27M
S0
Output Audio clock output per table above.
Power Connect to ground.
Output 27 MHz reference clock output.
Input
Select input S0. Selects ACLK per table above. Internal pull-up
resistor.
MDS 3724 C
2
Revision 121904
Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
MK3724
VCXO PLUS AUDIO CLOCK FOR STB
Pin
Number
Pin
Name
Pin
Type
Pin Description
14
15
16
VDD
NC
Power Connect to +3.3 V.
--
No connect. Do not connect anything to this pin.
S1
Input
Select input S1. Selects ACLK per table above. Internal pull-up
resistor.
MDS 3724 C
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Revision 121904
Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
MK3724
VCXO PLUS AUDIO CLOCK FOR STB
Crystal Tuning Load Capacitors
External Component Selection
The crystal traces should include pads for small fixed
capacitors, one between X1 and ground, and another
between X2 and ground. Stuffing of these capacitors
on the PCB is optional. The need for these capacitors is
determined at system prototype evaluation, and is
influenced by the particular crystal used (manufacture
and frequency) and by PCB layout. The typical required
capacitor value is 1 to 4 pF.
The MK3724 requires a minimum number of external
components for proper operation.
Decoupling Capacitors
Decoupling capacitors of 0.01 µF should be connected
between VDD and GND on pins 3 and 4, pins 6 and 7,
and pins 11 and 14 as close to the MK3724 as
possible. For optimum device performance, the
decoupling capacitors should be mounted on the
component side of the PCB. Avoid the use of vias in the
decoupling circuit.
To determine the need for and value of the crystal
adjustment capacitors, you will need a PC board of
your final layout, a frequency counter capable of about
1 ppm resolution and accuracy, two power supplies,
and samples of the crystals which you plan to use in
production. You will also need measured initial
Series Termination Resistor
When the PCB traces between the clock outputs and
the loads are over 1 inch, series termination should be
used. To series terminate a 50 Ω trace (a commonly
used trace impedance), place a 33 Ω resistor in series
with the clock line, as close to the clock output pin as
possible. The nominal impedance of the clock output is
20 Ω.
accuracy for each crystal at the specified crystal load
capacitance (C ).
L
To determine the value of the crystal capacitors:
1. Connect VDD to 3.3 V. Connect pin 5 to the second
power supply. Adjust the voltage on pin 5 to 0V.
Measure and record the frequency of the CLK output.
2. Adjust the voltage on pin 5 to 3.3 V. Measure and
record the frequency of the same output.
Quartz Crystal
The MK3724 VCXO function consists of the external
crystal and the integrated VCXO oscillator circuit. To
assure the best system performance (frequency pull
range) and reliability, a crystal device meeting ICS’
recommended parameters must be used, and the
layout guidelines discussed in the following section
must be followed.
To calculate the centering error:
(f3.3(3.0)V – ftarget) + (f0V – ftarget
)
Error = 106x
– errorxtal
----------------------------------------------------------------------------------------
ftarget
Where:
f = nominal crystal frequency
target
See Application Note MAN05 for a full list of crystal
parameters.
error
=actual initial accuracy (in ppm) of the crystal
xtal
The frequency of oscillation of a quartz crystal is
determined by its “cut” and by the load capacitors
connected to it. The MK3724 incorporates on-chip
variable load capacitors that “pull” (change) the
frequency of the crystal. The crystal specified for use
with the MK3724 is designed to have zero frequency
error when the total of on-chip + stray capacitance is 14
pF.
being measured
If the centering error is less than 25 ppm, no
adjustment is needed. If the centering error is more
than 25 ppm negative, the PC board has excessive
stray capacitance and a new PCB layout should be
considered to reduce stray capacitance. (Alternately,
the crystal may be re-specified to a higher load
capacitance. Contact ICS for details.) If the centering
error is more than 25 ppm positive, add identical fixed
centering capacitors from each crystal pin to ground.
The value for each of these caps (in pF) is given by:
The external crystal must be connected as close to the
chip as possible and should be on the same side of the
PCB as the MK3724. There should be no via’s between
the crystal pins and the X1 and X2 device pins. There
should be no signal traces underneath or close to the
crystal.
MDS 3724 C
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Revision 121904
Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
MK3724
VCXO PLUS AUDIO CLOCK FOR STB
External Capacitor =
assume it is 30 ppm/pF. After any changes, repeat the
measurement to verify that the remaining error is
acceptably low (typically less than 25 ppm).
2 x (centering error)/(trim sensitivity)
Trim sensitivity is a parameter which can be supplied by
your crystal vendor. If you do not know the value,
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the MK3724. These ratings,
which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of
the device at these or any other conditions above those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can
affect product reliability. Electrical parameters are guaranteed only over the recommended operating
temperature range.
Item
Rating
Supply Voltage, VDD
All Inputs and Outputs
7 V
-0.5 V to VDD+0.5 V
0 to +70°C
Ambient Operating Temperature, Commercial
Ambient Operating Temperature, Industrial
Storage Temperature
-40 to +85°C
-65 to +150°C
260°C
Soldering Temperature
Recommended Operation Conditions
Parameter
Min.
Typ.
Max.
+70
Units
°C
Ambient Operating Temperature, Commercial
Ambient Operating Temperature, Industrial
Power Supply Voltage (measured in respect to GND)
Reference crystal parameters
0
-40
+85
°C
+3.135
+3.465
V
Refer to page 3
DC Electrical Characteristics
VDD=3.3 V 5% , Ambient temperature -40 to +85°C, unless stated otherwise
Parameter
Symbol
Conditions
Min.
3.135
2.4
Typ.
Max.
Units
Operating Voltage
VDD
3.465
V
V
V
V
Output High Voltage
Output Low Voltage
V
I
I
I
= -12 mA
= 12 mA
= -4 mA
OH
OH
OL
OH
V
0.4
OL
Output High Voltage (CMOS
Level)
V
VDD-0.4
OH
Output Low Voltage (CMOS
Level)
V
I
= +4 mA
0.375
V
OL
OH
MDS 3724 C
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Revision 121904
Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
MK3724
VCXO PLUS AUDIO CLOCK FOR STB
Parameter
Input High Voltage (S1:S0)
Input High Voltage (S2)
Input Low Voltage (S1:S0)
Input Low Voltage (S2)
Input High Current
Symbol
Conditions
Min.
2.0
Typ.
Max.
Units
V
V
V
IH
IH
2.5
V
V
V
0.8
0.5
V
IL
IL
V
I
at 3.3V, Sx, PDTS
at 0V, Sx, PDTS
No load
0.1
-8.5
11
µA
µA
mA
mA
V
IH
Input Low Current
I
IL
Operating Supply Current
Short Circuit Current
IDD
I
50
OS
VIN, VCXO Control Voltage
V
0
3.3
IA
On Chip Pull-up Resistor,
inputs
R
Input selects
Input selects
360
kΩ
PU
Input Capacitance
C
5
pF
IN
Nominal Output Impedance
Z
20
Ω
OUT
AC Electrical Characteristics
VDD = 3.3 V 5%, Ambient Temperature -40 to +85° C, unless stated otherwise
Parameter
Crystal Pullability
VCXO Gain
Symbol
Conditions
Min. Typ. Max. Units
f
0V< VIN < 3.3 V, Note 1
VIN = VDD/2 + 1 V, Note 1
+ 100 + 150
ppm
ppm/V
ns
P
150
1.2
1.2
Output Rise Time
Output Fall Time
Output Clock Duty Cycle
t
20% to 80%, C =15 pF
2.0
2.0
60
OR
L
t
80% to 20%, C =15 pF
ns
OF
L
t
Measured at 1.65 V, C =15
40
50
%
D
L
pF
Maximum Output Jitter,
short term
t
C =15 pF
+150
ps
ms
ms
ms
J
L
Changing Frequency
Setting Time
1
10
2
Power-up time
PLL lock time from power-up
up to 1% of final frequency
PDTS goes high until stable
CLK output up to 1% of final
frequency
Note 1: External crystal device must conform with Pullable Crystal Specifications listed on page 3.
MDS 3724 C
6
Revision 121904
Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
MK3724
VCXO PLUS AUDIO CLOCK FOR STB
Thermal Characteristics
Parameter
Symbol
Conditions
Min.
Typ. Max. Units
Thermal Resistance Junction to
Ambient
θ
θ
θ
θ
Still air
78
70
68
37
°C/W
°C/W
°C/W
°C/W
JA
JA
JA
JC
1 m/s air flow
3 m/s air flow
Thermal Resistance Junction to Case
Notes:
Marking Diagram
1. ###### is the lot code.
16
9
2. YYWW is the last two digits of the year, and the week
number that the part was assembled.
MK3724G
######
3. “L” designates Pb (lead) free.
4. Bottom mark denotes country of origin if not USA.
YYWW
1
8
Non Lead-Free
16
9
MK3724GL
######
YYWW
1
8
Lead-Free
16
9
MK3724IL
######
YYWW
1
8
Industrial Temp., Lead-Free
MDS 3724 C
7
Revision 121904
Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
MK3724
VCXO PLUS AUDIO CLOCK FOR STB
Package Outline and Package Dimensions (16-pin TSSOP, 4.40 mm Body, 0.65 mm Pitch)
Package dimensions are kept current with JEDEC Publication No. 95Ordering Information
Millimeters
Min Max
Inches
Max
16
Symbol
Min
--
A
A1
A2
b
--
1.20
0.15
1.05
0.30
0.20
5.1
0.047
0.006
0.041
0.012
0.05
0.80
0.19
0.09
4.90
0.002
0.032
0.007
E1
E
INDEX
AREA
C
D
E
0.0035 0.008
0.193 0.201
0.252 BASIC
0.169 0.177
0.0256 Basic
6.40 BASIC
4.30 4.50
0.65 Basic
1
2
E1
e
L
D
0.45
0.75
0.018
0.030
α
0°
8°
0°
8°
A
2
A
A
1
c
- C -
e
SEATING
PLANE
b
L
.10 (.004)
C
Part / Order Number
Marking
Shipping
packaging
Tubes
Tape and Reel
Tubes
Tape and Reel
Tubes
Tape and Reel
Package
Temperature
MK3724G
MK3724GTR
MK3724GLF
MK3724G
MK3724G
MK3724GL
MK3724GL
MK3724IL
MK3724IL
16-pin TSSOP
16-pin TSSOP
16-pin TSSOP
16-pin TSSOP
16-pin TSSOP
16-pin TSSOP
0 to +70° C
0 to +70° C
0 to +70° C
0 to +70° C
-40 to +85° C
-40 to +85° C
MK3724GLFTR
MK3724GILF
MK3724GILFTR
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS)
assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would
result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial
applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary
environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any
circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or
critical medical instruments.
MDS 3724 C
8
Revision 121904
Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
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