MK74CB217 [ICSI]

Dual 1 to 8 Buffalo⑩ Clock Driver; 双1至8布法罗™时钟驱动器


型号：	MK74CB217
厂家：	INTEGRATED CIRCUIT SOLUTION INC
描述：	Dual 1 to 8 Buffalo⑩ Clock Driver 双1至8布法罗™时钟驱动器时钟驱动器
文件：	总5页 (文件大小：79K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

PRELIMIN ARY IN FO RMAT IO N

MK74CB217

Dual 1 to 8 Buffalo™ Clock Driver

Description

Features

The MK74CB217 Buffalo™ is a monolithic

CMOS high speed clock driver. It consists of two

identical single input to eight low-skew output,

non-inverting clock drivers. This eliminates

concerns of part to part matching in many

systems. The MK74CB217 is packaged in the

tiny 28 pin SSOP, which uses the same board

space as the narrow 16 pin SOIC. The inputs can

be connected together for a 1 to 16 fanout buffer.

• Tiny 28 pin SSOP (150 mil) package

• Dual one input to eight output clock drivers

• Outputs are skew matched to within 250 ps

• A outputs and B outputs matched to 250 ps

• 3.3 V or 5 V supply voltage

• Output Enable tri-states each bank of eight

• Clock speeds up to 200 MHz

Family of ICS Parts

A quad 1 to 4, and PECL versions, are also

available. Consult us for more details.

The MK74CB217 Buffalo™ is designed to be used

with ICS’s clock synthesizer devices. The inputs of the

Buffalo are matched to the outputs of ICS clock

synthesizers. Consult ICS for applications support.

VDD

Block Diagram

INA

QA0

INB

QB0

QA1

QA2

QA3

QA4

QA5

QA6

QA7

QB1

QB2

QB3

QB4

QB5

QB6

QB7

GND

OEB (all B outputs)

OEA (all A outputs)

MDS74CB217A

Revision 12299

Printed 2/22/00

IntegratedCircuit Systems, Inc. • 525 Race Street • San Jose •CA •95126•(408) 295-9800tel • www.icst.com

PRELIMIN ARY IN FO RMAT IO N

MK74CB217

Dual 1 to 8 Buffalo™ Clock Driver

Pin Assignment

Suggested Layout

INA

QA0

QA1

QA2

VDD

28 INB

QB0

QB1

QB2

VDD

QA3

QA4

GND

GND 10

QA5

22 QB3

21 QB4

20 GND

19 GND

18 QB5

17 QB6

16 QB7

15 OEB

0.1µF

QA6 12

QA7 13

OEA 14

For simplicity, terminating resistors are not shown for the

outputs, but should be placed as close to the device as

possible. It is most critical to have the 0.1µF decoupling

capacitors closest.

= connect to VDD

= connect to GND

Pin Descriptions

Number

Name

Type Description

INA

Clock input for eight A outputs.

Clock A outputs.

2, 3, 4 QA0, QA1, QA2

5, 6

7, 8

VDD

QA3, QA4

GND

Power supply. Connect to 3.3 V or +5 V. Must be same as pins 23, 24.

Clock A outputs.

9, 10

Connect to ground.

11, 12, 13 QA5, QA6, QA7

Clock A outputs.

OEA

OEB

Output Enable. Tri-states all A clock outputs when this input is low. Internal pull-up.

Output Enable. Tri-states all B clock outputs when this input is low. Internal pull-up.

16, 17, 18 QB7, QB6, QB5

Clock B outputs.

19, 20

21, 22

23, 24

GND

QB4, QB3

VDD

Connect to ground.

Clock B outputs.

Power supply. Connect to +3.3 V or +5 V. Must be same as pins 5, 6.

Clock B outputs.

25, 26, 27 QB2, QB1, QB0

28 INB

Clock input for eight B outputs.

Type: I = Input, O = output, P = power supply connection

MDS74CB217A

Revision 12299

Printed 2/22/00

IntegratedCircuit Systems, Inc. • 525 Race Street • San Jose •CA •95126•(408) 295-9800tel • www.icst.com

PRELIMIN ARY IN FO RMAT IO N

MK74CB217

Dual 1 to 8 Buffalo™ Clock Driver

Electrical Specifications

Parameter

Conditions

Minimum

Typical

Maximum

Units

ABSOLUTE MAXIMUM RATINGS (Note 1)

Supply Voltage, VDD

Inputs

Referenced to GND

VDD+0.5

Referenced to GND

0.5

Clock Outputs

Ambient Operating Temperature

Soldering Temperature

Storage Temperature

°C

Max of 20 seconds

260

-65

150

DC CHARACTERISTICS (VDD = 3.3 V unless noted)

Operating Voltage, VDD

3.0

3.3

5.5

1.0

0.8

Input High Voltage, VIH (INA, INB pins)

Input Low Voltage, VIL (INA, INB pins)

Input High Voltage, VIH (OEA, OEB pins)

Input Low Voltage, VIL (OEA, OEB pins)

VDD-1.0

VDD/2

2.0

Output High Voltage, 3.3V and 5V

Output Low Voltage, 3.3V and 5V

Operating Supply Current, IDD, at 100 MHz

Output Impedance

IOH=-12mA

IOH=-25mA

IOL=25mA

No Load

VDD-0.4

2.4

0.8

Short Circuit Current

On-Chip Pull-up Resistor

Input Capacitance

Each output

OEA, OEB

100

250

AC CHARACTERISTICS (VDD = 3.3 V unless noted)

Input Clock Frequency

Note 4

200

MH z

Propagation Delay with load=15pF

Output Clock Rise Time

1.4

0.8 to 2.0V

Output Clock Fall Time

2.0 to 0.8V

Output Clock Rising Edge Skew

Output Clock A to B Skew

At VDD/2. Note 2

At VDD/2. Note 3

100

250

Output Enable Time, OE high to output on

Output Disable Time, OE low to tri-state

Notes:

1. Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the device. Prolonged exposure

to levels above the operating limits but below the Absolute Maximums may affect device reliability.

2. Between any two A outputs, or any two B outputs, with equal loading.

3. Between any clock A output and any clock B output with INA connected to INB, and equal loading.

4. See discussion and graph of speed versus load.

MDS74CB217A

Revision 12299

Printed 2/22/00

IntegratedCircuit Systems, Inc. • 525 Race Street • San Jose •CA •95126•(408) 295-9800tel • www.icst.com

PRELIMIN ARY IN FO RMAT IO N

MK74CB217

Dual 1 to 8 Buffalo™ Clock Driver

Maximum Speed

The maximum speed at which the chip can operate is limited by power dissipation in the package. Graph 1

shows the operating frequency plotted against load capacitance per pin for a die temperature of 125°C. This is

at VDD = 3.3 V, 70°C and with 33 Wseries termination resistors. The termination resistors are essential

because they allow a large proportion of the total power to be dissipated outside the package. Reducing or

eliminating the series termination will cause an increase in die temperature. It is not recommended to operate

the chip at die temperatures greater than 125°C. Also note that the load capacitance per pin must include PC

board parasitics such as trace capacitance.

If not all outputs of the chip are used, it is possible to operate the chip faster with larger loads. Consult ICS for

your specific requirement.

300

250

Do not operate in this area.

200

150

100

Load Capacitance/per pin (pF)

Graph 1

MK74CB217

Maximum Speed

MDS74CB217A

Revision 12299

Printed 2/22/00

IntegratedCircuit Systems, Inc. • 525 Race Street • San Jose •CA •95126•(408) 295-9800tel • www.icst.com

PRELIMIN ARY IN FO RMAT IO N

MK74CB217

Dual 1 to 8 Buffalo™ Clock Driver

Package Outline and Package Dimensions

(For current dimensional specifications, see JEDEC publication no. 95.)

28 pin SSOP

Inches

Symbol Min

Millimeters

Max

0.053 0.069

0.004 0.01

Min

1.35

0.10

0.20

0.19

9.80

3.81

5.79

Max

1.75

0.25

0.30

0.25

10.01

3.99

6.20

0.008 0.012

0.007 0.010

0.386 0.394

0.150 0.157

0.228 0.244

.025 BSC

0.635 BSC

0.016

0.05

0.41

1.27

Ordering Information

Part/Order Number

Marking

Package

Temperature

MK74CB217R

28 pin SSOP

0-70 °C

MK74CB217RTR

Add Tape & Reel

While the information presented herein has been checked for both accuracy and reliability, ICS Incorporated assumes no responsibility for either its use or for the infringement of

any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal

commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not

recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS

product for use in life support devices or critical medical instruments.

Buffalo is a trademark of ICS Incorporated

MDS74CB217A

Revision 12299

Printed 2/22/00

IntegratedCircuit Systems, Inc. • 525 Race Street • San Jose •CA •95126•(408) 295-9800tel • www.icst.com

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