7283L20PA8 [IDT]

TSSOP-56, Reel;


型号：	7283L20PA8
厂家：	INTEGRATED DEVICE TECHNOLOGY
描述：	TSSOP-56, Reel
文件：	总12页 (文件大小：153K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

IDT7280

IDT7281

IDT7282

IDT7283

IDT7284

IDT7285

CMOS DUAL ASYNCHRONOUS FIFO

DUAL 256 x 9, DUAL 512 x 9,

DUAL 1,024 x 9, DUAL 2,048 x 9,

DUAL 4,096 x 9, DUAL 8,192 x 9

FEATURES:

DESCRIPTION:

•

The IDT7280 is equivalent to two IDT7200 256 x 9 FIFOs

The IDT7281 is equivalent to two IDT7201 512 x 9 FIFOs

The IDT7282 is equivalent to two IDT7202 1,024 x 9 FIFOs

The IDT7283 is equivalent to two IDT7203 2,048 x 9 FIFOs

The IDT7284 is equivalent to two IDT7204 4,096 x 9 FIFOs

The IDT7285 is equivalent to two IDT7205 8,192 x 9 FIFOs

Low power consumption

The IDT7280/7281/7282/7283/7284/7285 are dual-FIFO memories that

loadandemptydataonafirst-in/first-outbasis.Thesedevicesarefunctional

andcompatibletotwoIDT7200/7201/7202/7203/7204/7205FIFOsinasingle

packagewithallassociatedcontrol,data,andflaglinesassignedtoseparate

pins. The devices use Full and Empty flags to prevent data overflow and

underflowandexpansionlogictoallowforunlimitedexpansioncapabilityinboth

word size and depth.

— Active: 685 mW (max.)

— Power-down: 83 mW (max.)

Ultra high speed—12 ns access time

Asynchronous and simultaneous read and write

Offers optimal combination of data capacity, small foot print

and functional flexibility

Ideal for bi-directional, width expansion, depth expansion,

bus-matching, and data sorting applications

Status Flags: Empty, Half-Full, Full

Thereadsandwritesareinternallysequentialthroughtheuseofringpointers,

withnoaddressinformationrequiredtoloadandunloaddata.Dataistoggled

inandoutofthedevices throughtheuseoftheWrite(W)andRead(R)pins.

Thedevicesutilizea9-bitwidedataarraytoallowforcontrolandparitybits

attheuser’soption.Thisfeatureis especiallyusefulindatacommunications

applicationswhereitisnecessarytouseaparitybitfortransmission/reception

errorchecking.ItalsofeaturesaRetransmit(RT)capabilitythatallowsforreset

of the read pointer to its initial position when RT is pulsed LOW to allow for

retransmissionfromthebeginningofdata.AHalf-FullFlagisavailableinthe

singledevicemodeandwidthexpansionmodes.

•

Auto-retransmit capability

High-performance CMOS technology

Space-saving TSSOP

These FIFOs are fabricated using IDT’s high-speed CMOS technology.

Theyaredesignedforthoseapplicationsrequiringasynchronousandsimul-

taneousread/writesinmultiprocessingandratebufferapplications.

Industrial temperature range (–40

Green parts available, see ordering information

°C to +85°C) is available

FUNCTIONAL BLOCK DIAGRAM

DATA INPUTS

(DA0-DA8)

(DB0-DB8)

RSA

RSB

WRITE

CONTROL

WRITE

CONTROL

RAM

ARRAY A

256 x 9

ARRAY B

256 x 9

512 x 9

1,024 x 9

2,048 x 9

4,096 x 9

8,192 x 9

1,024 x 9

2,048 x 9

4,096 x 9

8,192 x 9

WRITE

POINTER

WRITE

POINTER

READ

POINTER

READ

POINTER

THREE-

STATE

BUFFERS

THREE-

STATE

BUFFERS

READ

CONTROL

READ

CONTROL

RESET

LOGIC

RESET

LOGIC

FLAG

LOGIC

FLAG

LOGIC

EXPANSION

LOGIC

EXPANSION

LOGIC

XIA

FFA EFA

XIB

XOA/HFA

FLA/RTA

FFB EFB

FLB/RTB

DATA

OUTPUTS

(QA0-QA8)

XOB/HFB

DATA

OUTPUTS

(QB0-QB8)

3208 drw 01

IDTandtheIDTlogoaretrademarksofIntegratedDeviceTechnology,Inc

COMMERCIALANDINDUSTRIALTEMPERATURERANGES

JULY 2006

DSC-3208/7

IDT7280/7281/7282/7283/7284/72855VASYNCHRONOUSFIFO

DUAL 256 x 9, 512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9 and 8,192 x 9

COMMERCIALTEMPERATURERANGE

PINCONFIGURATION

ABSOLUTE MAXIMUM RATINGS

Symbol

Rating

Com'l & Ind'l

Unit

FFA

XIA

VTERM

TerminalVoltagewith

Respect to GND

StorageTemperature

DCOutputCurrent

–0.5 to +7.0

TSTG

IOUT

–55to+125

–50to+50

°C

DA3

QA8

DA8

NOTE:

GND

1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause

permanent damage to the device. This is a stress rating only and functional operation

of the device at these or any other conditions above those indicated in the operational

sections of this specification is not implied. Exposure to absolute maximum rating

conditions for extended periods may affect reliability.

VCC

XOA/HFA

EFA

FLA/RTA

RSA

RECOMMENDEDDCOPERATING

CONDITIONS

FFB

XIB

DB0

Symbol

VCC

Parameter

Min.

4.5

Typ.

5.0

Max. Unit

SupplyVoltage

5.5

GND

SupplyVoltage

GND

(1)

VCC

VIH

InputHighVoltage

InputLowVoltage

2.0

—

0.8

(2)

VIL

OperatingTemperature

Commercial

°C

XOB/HFB

FLB/RTB

RSB

EFB

OperatingTemperature

Industrial

–40

—

°C

3208 drw 02

NOTES:

TSSOP (SO56-2, order code: PA)

TOP VIEW

1. For RT/RS/XI input, V^IH= 2.6V (commercial).

2. 1.5V undershoots are allowed for 10ns once per cycle.

DCELECTRICALCHARACTERISTICS

(Commercial: VCC = 5V ± 10%, TA = 0°C to +70°C; Industrial: VCC = 5V ± 10%, TA = –40°C to +85°C)

IDT7280L

IDT7281L

IDT7282L

IDT7283L

IDT7284L

IDT7285lL

Commercial & Industrial⁽¹⁾

tA = 12, 15 ns

Commercial & Industrial⁽¹⁾

tA = 12, 15 ns

Symbol

Parameter

InputLeakageCurrent(AnyInput)

OutputLeakageCurrent

Min.

–1

Max.

Min.

–1

Max.

—

Unit

(2)

ILI

µA

(3)

ILO

–10

2.4

—

–10

2.4

—

VOH

VOL

OutputLogic“1”Voltage

OutputLogic“0”Voltage

IOH = –2mA

IOL = 8mA

—

0.4

—

0.4

150

(4,5)

(6)

ICC1

Active Power Supply Current (both FIFOs)

—

125

—

(4,7)

ICC2

Standby Current (R=W=RS=FL/RT=VIH)

—

NOTES:

1. Industrial temperature range product for the 15ns speed grade is available as a standard

ACTESTCONDITIONS

InputPulseLevels

InputRise/FallTimes

InputTimingReferenceLevels

OutputReferenceLevels

OutputLoad

device.

GND to 3.0V

5ns

1.5V

See Figure 1

2. Measurements with 0.4 ≤ VIN ≤ VCC.

3. R ≥ V^IH, 0.4 ≤ VOUT ≤ VCC.

4. Tested with outputs open (I^OUT= 0).

5. Tested at f = 20 MHz.

6. Typical I^CC1= 2*[15 + 2*fS + 0.02*CL*fS] (in mA) with VCC = 5V, TA = 25^oC, fS = WCLK

frequency = RCLK frequency (in MHz, using TTL levels), data switching at f^S/2,

C^L= capacitive load (in pF).

7. All Inputs = V^CC- 0.2V or GND + 0.2V.

1.1K

OUTPUT

CAPACITANCE(TA = +25^oC, f = 1.0 MHz)

30pF*

Symbol

CIN

Parameter

Condition

VIN = 0V

Max.

Unit

680Ω

InputCapacitance

OutputCapacitance

3208 drw 03

COUT

VOUT = 0V

or equivalent circuit

NOTE:

1. Characterized values, not currently tested.

Figure 1. Output Load

* Includes scope and jig capacitances.

JULY 17, 2006

IDT7280/7281/7282/7283/7284/72855VASYNCHRONOUSFIFO

DUAL 256 x 9, 512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9 and 8,192 x 9

COMMERCIALTEMPERATURERANGE

ACELECTRICALCHARACTERISTICS⁽¹⁾

(Commercial: VCC = 5V ± 10%, TA = 0°C to +70°C; Industrial: VCC = 5V ± 10%, TA = –40°C to +85°C)

Commercial

Commercial & Industrial⁽²⁾

IDT7280L12

IDT7281L12

IDT7282L12

IDT7283L12

IDT7284L12

IDT7285L12

IDT7280L15

IDT7281L15

IDT7282L15

IDT7283L15

IDT7284L15

IDT7285L15

Symbol

Parameter

Min.

—

Max.

Min.

—

Max.

Unit

MHz

ShiftFrequency

ReadCycleTime

AccessTime

—

tRC

tRR

ReadRecoveryTime

ReadPulseWidth⁽³⁾

tRPW

tRLZ

tWLZ

tDV

(4)

ReadPulseLowtoDataBusatLowZ

(4,5)

WritePulseHightoDataBusatLowZ

DataValidfromReadPulseHigh

(4)

tRHZ

tWC

ReadPulseHightoDataBusatHighZ

—

WriteCycleTime

tWPW

tWR

WritePulseWidth⁽³⁾

WriteRecoveryTime

DataSet-upTime

tDS

tDH

DataHoldTime

tRSC

tRS

ResetCycleTime

—

(3)

ResetPulseWidth

tRSS

tRSR

tRTC

tRT

ResetSet-upTime⁽⁴⁾

ResetRecoveryTime

RetransmitCycleTime

(3)

RetransmitPulseWidth

tRTS

tRTR

tEFL

RetransmitSet-upTime⁽⁴⁾

RetransmitRecoveryTime

ResettoEmptyFlagLow

—

tHFH,FFH ResettoHalf-FullandFullFlagHigh

tRTF

tREF

tRFF

tRPE

tWEF

tWFF

tWHF

tRHF

tWPF

tXOL

tXOH

tXI

RetransmitLowtoFlagsValid

Read Low to Empty Flag Low

ReadHightoFullFlagHigh

ReadPulseWidthafterEFHigh

WriteHightoEmptyFlagHigh

WriteLowtoFullFlagLow

WriteLowtoHalf-FullFlagLow

ReadHightoHalf-FullFlagHigh

WritePulseWidthafterFFHigh

Read/WritetoXOLow

Read/WritetoXOHigh

XIPulseWidth⁽³⁾

tXIR

XI Recovery Time

tXIS

XISet-upTime

NOTES:

1. Timings referenced as in AC Test Conditions.

2. Industrial temperature range product for the 15ns speed grade is available as a standard device.

3. Pulse widths less than minimum value are not allowed.

4. Values guaranteed by design, not currently tested.

5. Only applies to read data flow-through mode.

JULY 17, 2006

IDT7280/7281/7282/7283/7284/72855VASYNCHRONOUSFIFO

DUAL 256 x 9, 512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9 and 8,192 x 9

COMMERCIALTEMPERATURERANGE

DeviceMode,thispinactsastheretransmitinput.TheSingleDeviceModeis

initiated by grounding the Expansion In (XI).

SIGNALDESCRIPTIONS

INPUTS:

ThesedevicescanbemadetoretransmitdatawhentheRetransmitEnable

control(RT)inputispulsedLOW. Aretransmitoperationwillsettheinternalread

pointertothefirstlocationandwillnotaffectthewritepointer.ReadEnable(R)

andWriteEnable(W)mustbeintheHIGHstateduringretransmit.Thisfeature

is useful when less than 256/512/1,024/2,048/4,096/8,192 writes are per-

formedbetweenresets.TheretransmitfeatureisnotcompatiblewiththeDepth

Expansion Mode and will affect the Half-Full Flag (HF), depending on the

relativelocationsofthereadandwritepointers.

DATA IN (D0 – D8)

Data inputs for 9-bit wide data.

CONTROLS:

RESET (RS)

ResetisaccomplishedwhenevertheReset(RS)inputistakentoaLOWstate.

Duringreset,bothinternalreadandwritepointersaresettothefirstlocation.

Aresetisrequiredafterpowerupbeforeawriteoperationcantakeplace.Both

the Read Enable (R) and Write Enable (W) inputs must be in the HIGH

state during the window shown in Figure 2, (i.e., tRSS before the rising

edge of RS) and should not change until tRSR after the rising edge of

RS. Half-Full Flag (HF) will be reset to HIGH after Reset (RS).

EXPANSION IN (XI)

Thisinputisadual-purposepin. ExpansionIn(XI)isgroundedtoindicate

an operation in the single device mode. Expansion In (XI) is connected to

ExpansionOut(XO)oftheprevious deviceintheDepthExpansionorDaisy

Chain Mode.

WRITE ENABLE (W)

OUTPUTS:

AwritecycleisinitiatedonthefallingedgeofthisinputiftheFullFlag(FF)

isnotset.Dataset-upandholdtimesmustbeadheredtowithrespecttotherising

edgeoftheWriteEnable(W).DataisstoredintheRAMarraysequentiallyand

independently of any on-going read operation.

After half of the memory is filled and at the falling edge of the next write

operation,theHalf-FullFlag(HF)willbesettoLOWandwillremainsetuntilthe

differencebetweenthewritepointerandreadpointeris less thanorequalto

onehalfofthetotalmemoryofthedevice.TheHalf-FullFlag(HF)isthenreset

by the rising edge of the read operation.

Topreventdataoverflow,theFullFlag(FF)willgoLOW,inhibitingfurther

writeoperations.Uponthecompletionofavalidreadoperation,theFullFlag

(FF)willgoHIGHaftertRFF,allowingavalidwritetobegin.WhentheFIFOis

full,theinternalwritepointerisblockedfromW,soexternalchangesinWwill

notaffecttheFIFOwhenitisfull.

FULL FLAG (FF)

TheFullFlag(FF)willgoLOW,inhibitingfurtherwriteoperation,whenthe

write pointer is one location less than the read pointer, indicating that the

deviceisfull.IfthereadpointerisnotmovedafterReset(RS),theFull-Flag(FF)

willgoLOWafter256writes forIDT7280,512writes fortheIDT7281, 1,024

writes for the IDT7282, 2,048 writes for the IDT7283, 4,096 writes for the

IDT7284 and 8,192 writes for the IDT7285.

EMPTY FLAG (EF)

TheEmptyFlag(EF)willgoLOW,inhibitingfurtherreadoperations,when

the read pointer is equal to the write pointer, indicating that the device is

empty.

EXPANSION OUT/HALF-FULL FLAG (XO/HF)

This is a dual-purpose output. In the single device mode, when Expan-

sionIn(XI)isgrounded,thisoutputactsasanindicationofahalf-fullmemory.

After half of the memory is filled and at the falling edge of the next write

operation,theHalf-FullFlag(HF)willbesetLOWandwillremainsetuntilthe

difference between the write pointer and read pointer is less than or equal

toonehalfofthetotalmemoryofthedevice.TheHalf-FullFlag(HF)isthenreset

by using rising edge of the read operation.

IntheDepthExpansionMode,ExpansionIn(XI)isconnectedtoExpansion

Out(XO)ofthepreviousdevice.Thisoutputactsasasignaltothenextdevice

intheDaisyChainbyprovidingapulsetothenextdevicewhentheprevious

devicereachesthelastlocationofmemory.

READ ENABLE (R)

AreadcycleisinitiatedonthefallingedgeoftheReadEnable(R)provided

theEmptyFlag(EF)isnotset.ThedataisaccessedonaFirst-In/First-Outbasis,

independent of any ongoing write operations. After Read Enable (R) goes

HIGH,theDataOutputs(Q0–Q8)willreturntoahighimpedanceconditionuntil

thenextReadoperation.WhenalldatahasbeenreadfromtheFIFO,theEmpty

Flag (EF) will go LOW, allowing the “final” read cycle but inhibiting further read

operations with the data outputs remaining in a high impedance state. Once a

validwriteoperationhasbeenaccomplished,theEmptyFlag(EF)willgoHIGH

aftertWEFandavalidReadcanthenbegin.WhentheFIFOisempty,theinternal

readpointeris blockedfrom Rsoexternalchanges inRwillnotaffectthe FIFO

when it is empty.

DATA OUTPUTS (Q0 – Q8)

Data outputs for 9-bit wide data. This data is in a high impedance

condition whenever Read (R) is in a HIGH state.

FIRST LOAD/RETRANSMIT (FL/RT)

This is a dual-purpose input. In the Depth Expansion Mode, this pin is

groundedtoindicatethatitisthefirstloaded(seeOperatingModes). IntheSingle

JULY 17, 2006

IDT7280/7281/7282/7283/7284/72855VASYNCHRONOUSFIFO

DUAL 256 x 9, 512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9 and 8,192 x 9

COMMERCIALTEMPERATURERANGE

RSC

RSS

RSR

RSS

EFL

HFH FFH

, t

HF, FF

3208 drw 04

NOTES:

1. EF, FF, HF may change status during Reset, but flags will be valid at t^RSC.

2. W and R = V^IHaround the rising edge of RS.

Figure 2. Reset

RPW

RHZ

RLZ

Q0-Q8

DATA OUT VALID

WPW

D0-D8

DATA IN VALID

3208 drw 05

Figure 3. Asynchronous Write and Read Operation

LAST WRITE

IGNORED

WRITE

FIRST READ

ADDITIONAL

READS

FIRST

WRITE

WFF

RFF

3208 drw 06

Figure 4. Full Flag From Last Write to First Read

JULY 17, 2006

IDT7280/7281/7282/7283/7284/72855VASYNCHRONOUSFIFO

DUAL 256 x 9, 512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9 and 8,192 x 9

COMMERCIALTEMPERATURERANGE

LAST READ

IGNORED

READ

FIRST WRITE

ADDITIONAL

WRITES

FIRST

READ

WEF

REF

DATA OUT

VALID

3208 drw 07

Figure 5. Empty Flag From Last Read to First Write

RTC

W,R

RTS

RTR

RTF

HF, EF, FF

FLAG VALID

3208 drw 08

Figure 6. Retransmit

WEF

RPE

3208 drw 09

Figure 7. Minimum Timing for an Empty Flag Coincident Read Pulse

RFF

WPF

3208 drw 10

Figure 8. Minimum Timing for a Full Flag Coincident Write Pulse

JULY 17, 2006

IDT7280/7281/7282/7283/7284/72855VASYNCHRONOUSFIFO

DUAL 256 x 9, 512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9 and 8,192 x 9

COMMERCIALTEMPERATURERANGE

RHF

WHF

HALF-FULL OR LESS

3208 drw 11

HALF-FULL OR LESS

MORE THAN HALF-FULL

Figure 9. Half-Full Flag Timing

WRITE TO

LAST PHYSICAL

LOCATION

READ FROM

LAST PHYSICAL

LOCATION

XOL

XOH

XOL

3208 drw 12

Figure 10. Expansion Out

XIR

XIS

WRITE TO

FIRST PHYSICAL

LOCATION

XIS

READ FROM

FIRST PHYSICAL

LOCATION

3208 drw 13

Figure 11. Expansion In

14 demonstrates a four-FIFO Depth Expansion using two IDT7280/7281/

7282/7283/7284/7285s. Any depth can be attained by adding additional

IDT7280/7281/7282/7283/7284/7285s.TheseFIFOsoperateintheDepth

Expansionmodewhenthefollowingconditionsaremet:

OPERATINGMODES:

Care must be taken to assure that the appropriate flag is monitored by

eachsystem(i.e.FFismonitoredonthedevicewhereWisused;EFismonitored

on the device where Ris used).

1. ThefirstFIFOmustbedesignatedbygroundingtheFirstLoad(FL)control

input.

2. AllotherFIFOs musthave FLinthe HIGHstate.

3. TheExpansionOut(XO)pinofeachdevicemustbetiedtotheExpansion

In (XI) pin of the next device. See Figure 14.

4. ExternallogicisneededtogenerateacompositeFullFlag(FF)andEmpty

Flag(EF).ThisrequirestheORingofallEFsandORingofallFFs(i.e.all

mustbesettogeneratethecorrectcompositeFForEF).SeeFigure14.

5. TheRetransmit(RT)functionandHalf-FullFlag(HF)arenotavailablein

theDepthExpansionMode.

SINGLE DEVICE MODE

A single IDT7280/7281/7282/7283/7284/7285 may be used when the

applicationrequirementsarefor256/512/1,024/2,048/4,096/8,192wordsor

less. TheseFIFOsareinaSingleDeviceConfigurationwhentheExpansion

In (XI) control input is grounded (see Figure 12).

DEPTHEXPANSION

These devices can easily be adapted to applications when the require-

mentsareforgreaterthan256/512/1,024/2,048/4,096/8,192words. Figure

JULY 17, 2006

IDT7280/7281/7282/7283/7284/72855VASYNCHRONOUSFIFO

DUAL 256 x 9, 512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9 and 8,192 x 9

COMMERCIALTEMPERATURERANGE

theFIFOpermitsareadingofasinglewordafterwritingonewordofdatainto

anemptyFIFO.Thedataisenabledonthebusin(tWEF+tA)nsaftertherising

edgeofW,calledthefirstwriteedge,anditremainsonthe busuntiltheRline

is raisedfromLOW-to-HIGH,afterwhichthebus wouldgointoathree-state

mode after tRHZ ns. The EF line would have a pulse showing temporary

deassertionandthenwouldbeasserted.

In the write flow-through mode (Figure 18), the FIFO permits the writing

of a single word of data immediately after reading one word of data from a

fullFIFO.TheRlinecausestheFFtobedeassertedbuttheWlinebeingLOW

causesittobeassertedagaininanticipationofanewdataword.Ontherising

edgeofW,thenewwordisloadedintheFIFO.TheWlinemustbetoggledwhen

FFisnotassertedtowritenewdataintheFIFOandtoincrementthewritepointer.

USAGEMODES:

WIDTH EXPANSION

Wordwidthmaybeincreasedsimplybyconnectingthecorrespondinginput

controlsignalsofmultipleFIFOs.Statusflags(EF,FFandHF)canbedetected

fromanyoneFIFO. Figure13demonstratesan18-bitwordwidthbyusingthe

twoFIFOscontainedintheIDT7280/7281/7282/7283/7284/7285s.Anyword

width can be attained by adding FIFOs (Figure 13).

BIDIRECTIONAL OPERATION

Applications which require data buffering between two systems (each

system capable of Read and Write operations) can be achieved by pairing

IDT7280/7281/7282/7283/7384/7285s as shown in Figure 16. Both Depth

ExpansionandWidthExpansionmaybeusedinthis mode.

COMPOUNDEXPANSION

Thetwoexpansiontechniquesdescribedabovecanbeappliedtogether

in a straightforward manner to achieve large FIFO arrays (see Figure 15).

DATAFLOW-THROUGH

Two types of flow-through modes are permitted, a read flow-through

and write flow-through mode. For the read flow-through mode (Figure 17),

(HALF-FULL FLAG)

WRITE (W)

(HF)

FIFO

A or B

IDT

READ (R)

DATA IN (D)

FULL FLAG (FF)

RESET (RS)

DATA OUT (Q)

7280

7281

7282

7283

7284

7285

EMPTY FLAG (EF)

RETRANSMIT (RT)

3208 drw 14

EXPANSION IN (XI)

Figure 12. Block Diagram of One 256 x 9, 512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9, 8,192 x 9 FIFO Used in Single Device Mode

HFA

HFB

DATA

(D)

FIFO A

FIFO B

WRITE (W)

FULL FLAG (FFA)

RESET (RS)

READ (R)

EMPTY FLAG (EFB)

RETRANSMIT (RT)

7280/7281/7282/

7283/7284/7285

XIA

XIB

OUT

(Q)

DATA

3208 drw 15

Figure 13. Block Diagram of 256 x 18, 512 x 18, 1,024 x 18, 2,048 x 18, 4,096 x 18, 8,192 x 18 FIFO Memory Used in Width Expansion Mode

JULY 17, 2006

IDT7280/7281/7282/7283/7284/72855VASYNCHRONOUSFIFO

DUAL 256 x 9, 512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9 and 8,192 x 9

COMMERCIALTEMPERATURERANGE

TABLE 1 — RESET AND RETRANSMIT

Single Device Configuration/Width Expansion Mode

Inputs

InternalStatus

Write Pointer

Outputs

Mode

Read Pointer

Reset

LocationZero

Increment⁽¹⁾

LocationZero

Unchanged

Increment⁽¹⁾

Retransmit

Read/Write

NOTE:

1. Pointer will increment if flag is High.

TABLE 2 — RESET AND FIRST LOAD TRUTH TABLE

Depth Expansion/Compound Expansion Mode

Inputs

InternalStatus

Write Pointer

Outputs

Mode

Read Pointer

ResetFirstDevice

Reset All Other Devices

Read/Write

(1)

LocationZero

NOTE:

1. XI is connected to XO of previous device. See Figure 14. RS = Reset Input, FL/RT = First Load/Retransmit, EF = Empty Flag Output, FF = Full Flag Output,

XI = Expansion Input, HF = Half-Full Flag Output

XOA

EFA

FFA

FIFO A

FLA

XIA

7280/7281/

7282/7283/

7284/7285

XOB

EFB

FFB

FIFO B

FLB

V_CC

XIB

XOA

FFA

EFA

FULL

EMPTY

FIFO A

FLA

XIA

7280/7281/

7282/7283/

7284/7285

XOB

EFB

FFB

FIFO B

RSA

FLB

XIB

3208 drw 16

Figure 14. Block Diagram of 1,024 x 9, 2,048 x 9, 4,096 x 9, 8,192 x 9, 16,384 x 9, 32,768 x 9 FIFO Memory (Depth Expansion)

JULY 17, 2006

IDT7280/7281/7282/7283/7284/72855VASYNCHRONOUSFIFO

DUAL 256 x 9, 512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9 and 8,192 x 9

COMMERCIALTEMPERATURERANGE

-Q

(N-8)-Q

-Q17

-Q

Q(N-8)-Q

IDT7280/7281/

7282/7283/

7284/7285

DEPTH

EXPANSION

BLOCK

IDT7280/7281/

7282/7283/

7284/7285

DEPTH

EXPANSION

BLOCK

IDT7280/7281/

7282/7283/

7284/7285

DEPTH

EXPANSION

BLOCK

R, W, RS

D0-D8

D(N-8)-DN

D9-D17

D0-DN

D18-D

D(N-8)-DN

D9-DN

3208 drw 17

NOTES:

1. For depth expansion block see section on Depth Expansion and Figure 14.

2. For Flag detection see section on Width Expansion and Figure 13.

Figure 15. Compound FIFO Expansion

W_A

D_A0-8

R_A

FIFO A

IDT

7201A

Q_A0-8

IDT

7280

7281

7282

7283

7284

7285

SIDE 1

SIDE 2

Q_B0-8

D_B0-8

FIFO B

W_B

FF_B

3208 drw 18

Figure 16. Bidirectional FIFO Mode

JULY 17, 2006

IDT7280/7281/7282/7283/7284/72855VASYNCHRONOUSFIFO

DUAL 256 x 9, 512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9 and 8,192 x 9

COMMERCIALTEMPERATURERANGE

DATA

RPE

REF

WEF

WLZ

DATA OUT

OUT

DATA

VALID

3208 drw 19

Figure 17. Read Data Flow-Through Mode

WPF

RFF

WFF

DATA

VALID

DATA

OUT

DATA

OUT

DATA

VALID

3208 drw 20

Figure 18. Write Data Flow-Through Mode

JULY 17, 2006

ORDERING INFORMATION

IDT

XXXX

XXX

Device Type Power Speed Package

Process/

Temperature

Range

Blank

I⁽¹⁾

Commercial (0°C to +70°C)

Industrial (-40°C to +85°C)

G⁽²⁾

Green

Thin Shrink SOIC (TSSOP, SO56-2)

Commercial Only

Commercial and Industrial

Access Time (t

Speed in Nanoseconds

Low Power

7280

7281

7282

7283

7284

7285

256 x 9  CMOS Dual Asynchronous FIFO

512 x 9  CMOS Dual Asynchronous FIFO

1,024 x 9  CMOS Dual Asynchronous FIFO

2,048 x 9  CMOS Dual Asynchronous FIFO

4,096 x 9  CMOS Dual Asynchronous FIFO

8,192 x 9  CMOS Dual Asynchronous FIFO

3208 drw 21

NOTES:

1. Industrial temperature range product for the 15ns speed grade is available as a standard device.

2. Green parts are available. For specific speeds contact your local sales office.

DATASHEETDOCUMENTHISTORY

07/13/2001

07/17/2006

pgs. 2, 3 and 12.

pgs. 1 and 12.

CORPORATE HEADQUARTERS

6024 Silver Creek Valley Road

San Jose, CA 95138

for SALES:

for Tech Support:

408-360-1753

email:FIFOhelp@idt.com

800-345-7015 or 408-284-8200

fax: 408-284-2775

www.idt.com

7283L20PA8 [IDT]

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