74ALVCH16501PF8 [IDT]

TVSOP-56, Reel;


型号：	74ALVCH16501PF8
厂家：	INTEGRATED DEVICE TECHNOLOGY
描述：	TVSOP-56, Reel 电视
文件：	总7页 (文件大小：79K)
中文：	中文翻译
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IDT74ALVCH16501

3.3VCMOS18-BITUNIVERSALBUSTRANSCEIVERWITH3-STATEOUTPUTS

INDUSTRIALTEMPERATURERANGE

3.3V CMOS 18-BIT UNIVERSAL IDT74ALVCH16501

BUS TRANSCEIVER WITH

3-STATE OUTPUTS

AND BUS-HOLD

FEATURES:

DESCRIPTION:

• 0.5 MICRON CMOS Technology

• Typical tSK(o) (Output Skew) < 250ps

This 18-bit universal bus transceiver is built using advanced dual metal

CMOStechnology.Dataflowineachdirectioniscontrolledbyoutput-enable

• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using

machine model (C = 200pF, R = 0)

• VCC = 3.3V ± 0.3V, Normal Range

• VCC = 2.7V to 3.6V, Extended Range

• VCC = 2.5V ± 0.2V

• CMOS power levels (0.4μ W typ. static)

• Rail-to-Rail output swing for increased noise margin

• Available in SSOP and TSSOP packages

(OEAB and OEBA), latch enable (LEAB and LEBA), and clock (CLKAB and

CLKBA)inputs. ForA-to-Bdata flow, the device operates inthe transparent

modewhenLEABis high. WhenLEABis low,theAdatais latchedifCLKAB

isheldatahighorlowlogiclevel.IfLEABislow,theAdataisstoredinthelatch/

flip-floponthelow-to-hightransitionofCLKAB.WhenOEABishigh,theoutputs

areactive.WhenOEABislow,theoutputsareinthehigh-impedancestate.

DataflowforBtoAissimiliartothatofAtoBbutusesOEBA,LEBA,andCLKBA.

Theoutputenablesarecomplementary(OEABisactivehighandOEBAisactive

low).

DRIVE FEATURES:

• High Output Drivers: ±24mA

• Suitable for heavy loads

The ALVCH16501 has been designed with a ±24mA output driver. This

driveriscapableofdrivingamoderatetoheavyloadwhilemaintainingspeed

performance.

The ALVCH16501 has “bus-hold” which retains the inputs’ last state

whenevertheinputbusgoestoahighimpedance.Thispreventsfloatinginputs

andeliminatestheneedforpull-up/downresistors.

APPLICATIONS:

• 3.3V high speed systems

• 3.3V and lower voltage computing systems

FUNCTIONALBLOCKDIAGRAM

OEAB

CLKAB

LEAB

LEBA

CLKBA

OEBA

CLK

TO 17 OTHER CHANNELS

TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.

INDUSTRIAL TEMPERATURE RANGE

MAY 2006

DSC-4738/4

IDT74ALVCH16501

3.3VCMOS18-BITUNIVERSALBUSTRANSCEIVERWITH3-STATEOUTPUTS

INDUSTRIALTEMPERATURERANGE

ABSOLUTEMAXIMUMRATINGS⁽¹⁾

PINCONFIGURATION

Symbol

Description

Max

Unit

(2)

VTERM

Terminal Voltage with Respect to GND

–0.5 to +4.6

(3)

VTERM

Terminal Voltage with Respect to GND –0.5 to VCC+0.5

OEAB

LEAB

A¹

GND

TSTG

IOUT

IIK

Storage Temperature

DC Output Current

–65 to +150

–50 to +50

±50

° C

CLKAB

B¹

Continuous Clamp Current,

VI < 0 or VI > VCC

GND

A²

GND

IOK

Continuous Clamp Current, VO < 0

–50

ICC

ISS

Continuous Current through each

VCC or GND

±100

B³

VCC

NOTES:

1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause

permanent damage to the device. This is a stress rating only and functional operation

of the device at these or any other conditions above those indicated in the operational

sections of this specification is not implied. Exposure to absolute maximum rating

conditions for extended periods may affect reliability.

A⁶

2. V^CCterminals.

3. All terminals except VCC.

GND

B⁷

A¹⁰

A11

A12

B10

B¹¹

B12

GND

B13

B14

B¹⁵

VCC

CAPACITANCE (TA = +25°C, F = 1.0MHz)

Symbol

Parameter⁽¹⁾

Conditions

VIN = 0V

VOUT = 0V

VIN = 0V

Typ.

Max. Unit

CIN

Input Capacitance

Output Capacitance

I/O Port Capacitance

GND

A13

COUT

CI/O

A14

NOTE:

A15

1. As applicable to the device type.

VCC

A¹⁶

B16

A17

GND

A18

B¹⁷

GND

B¹⁸

OEBA

LEBA

CLKBA

GND

PINDESCRIPTION

Pin Names

Description

SSOP/ TSSOP

TOP VIEW

OEAB

OEBA

LEAB

LEBA

CLKAB

CLKBA

A-to-B Output Enable Input

B-to-A Output Enable Input (Active LOW)

A-to-B Latch Enable Input

B-to-A Latch Enable Input

A-to-B Clock Input

B-to-A Clock Input

A-to-B Data Inputs or B-to-A 3-State Outputs⁽¹⁾

B-to-A Data Inputs or A-to-B 3-State Outputs⁽¹⁾

NOTE:

1. These pins have "Bus-Hold". All other pins are standard inputs, outputs, or I/Os.

IDT74ALVCH16501

3.3VCMOS18-BITUNIVERSALBUSTRANSCEIVERWITH3-STATEOUTPUTS

INDUSTRIALTEMPERATURERANGE

FUNCTIONTABLE^(1,2)

Inputs

Output

OEAB

LEAB

CLKAB

↑

(3)

L or H

NOTES:

1. A-to-B data flow is shown. B-to-A data flow is similar, but uses OEBA, LEBA, and

CLKBA.

2. H = HIGH Voltage Level

L = LOW Voltage Level

X = Don’t Care

Z = High-Impedance

↑ = LOW-to-HIGH Transition

3. Output level before the indicated steady-state input conditions were established.

DCELECTRICALCHARACTERISTICSOVEROPERATINGRANGE

FollowingConditionsApplyUnlessOtherwiseSpecified:

OperatingCondition:TA = –40°C to +85°C

Symbol

Parameter

Test Conditions

Min.

1.7

Typ.⁽¹⁾

—

Max.

—

Unit

VIH

Input HIGH Voltage Level

VCC = 2.3V to 2.7V

VCC = 2.7V to 3.6V

—

VIL

Input LOW Voltage Level

VCC = 2.3V to 2.7V

VCC = 2.7V to 3.6V

—

0.7

0.8

IIH

IIL

Input HIGH Current

VCC = 3.6V

VI = VCC

—

µA

µ A

Input LOW Current

VI = GND

VO = VCC

VO = GND

IOZH

IOZL

VIK

High Impedance Output Current

(3-State Output pins)

—

Clamp Diode Voltage

VCC = 2.3V, IIN = –18mA

VCC = 3.3V

–0.7

–1.2

Input Hysteresis

—

100

0.1

—

µ A

ICCL

ICCH

ICCZ

Quiescent Power Supply Current

VCC = 3.6V

VIN = GND or VCC

ΔICC

Quiescent Power Supply Current

Variation

One input at VCC - 0.6V, other inputs at VCC or GND

—

750

µ A

NOTE:

1. Typical values are at VCC = 3.3V, +25°C ambient.

IDT74ALVCH16501

3.3VCMOS18-BITUNIVERSALBUSTRANSCEIVERWITH3-STATEOUTPUTS

INDUSTRIALTEMPERATURERANGE

BUS-HOLDCHARACTERISTICS

Symbol

IBHH

Parameter⁽¹⁾

Test Conditions

VI = 2V

Min.

–75

Typ.⁽²⁾

—

Max.

—

Unit

Bus-HoldInputSustainCurrent

VCC = 3V

µ A

IBHL

VI = 0.8V

—

IBHH

Bus-HoldInputSustainCurrent

Bus-HoldInputOverdrive Current

VCC = 2.3V

VCC = 3.6V

VI = 1.7V

–45

—

µ A

IBHL

VI = 0.7V

—

IBHHO

VI = 0 to 3.6V

—

±500

IBHLO

NOTES:

1. Pins with Bus-Hold are identified in the pin description.

2. Typical values are at VCC = 3.3V, +25°C ambient.

OUTPUTDRIVECHARACTERISTICS

Symbol

Parameter

TestConditions⁽¹⁾

Min.

VCC – 0.2

Max.

—

Unit

VOH

OutputHIGHVoltage

VCC = 2.3V to 3.6V

VCC = 2.3V

IOH = – 0.1mA

IOH = – 6mA

IOH = – 12mA

—

VCC = 2.3V

1.7

—

VCC = 2.7V

2.2

—

VCC = 3V

2.4

—

VCC = 3V

IOH = – 24mA

IOL = 0.1mA

IOL = 6mA

—

VOL

OutputLOWVoltage

VCC = 2.3V to 3.6V

VCC = 2.3V

—

0.2

0.4

0.7

0.4

0.55

—

IOL = 12mA

IOL = 24mA

—

VCC = 2.7V

VCC = 3V

—

NOTE:

1. VIH and VIL must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the appropriate VCC range.

TA = – 40°C to + 85°C.

OPERATING CHARACTERISTICS, TA = 25°C

VCC = 2.5V ± 0.2V

VCC = 3.3V ± 0.3V

Symbol

CPD

Parameter

Test Conditions

Typical

Unit

PowerDissipationCapacitanceOutputsenabled

PowerDissipationCapacitanceOutputsdisabled

CL = 0pF, f = 10Mhz

CPD

IDT74ALVCH16501

3.3VCMOS18-BITUNIVERSALBUSTRANSCEIVERWITH3-STATEOUTPUTS

INDUSTRIALTEMPERATURERANGE

SWITCHINGCHARACTERISTICS⁽¹⁾

VCC = 2.5V ± 0.2V

VCC = 2.7V

VCC = 3.3V ± 0.3V

Symbol

fMAX

tPLH

tPHL

tPLH

tPHL

tPLH

tPHL

tPZH

tPZL

tPZH

tPZL

tPHZ

tPLZ

tPHZ

tPLZ

tSU

Parameter

Min.

150

Max.

—

Min.

150

—

Max.

—

Min.

150

Max.

—

Unit

MHz

PropagationDelay

Ax to Bx or Bx to Ax

PropagationDelay

LE to Ax or Bx

4.8

4.5

3.9

1.1

1.2

1.3

5.7

6.1

6.3

5.8

5.3

6.2

—

5.3

5.6

1.3

1.4

1.1

4.6

4.9

PropagationDelay

CLK to Ax or Bx

OutputEnableTime

OEBA to Ax

OutputEnableTime

OEAB to Bx

5.3

4.6

5.7

4.6

4.2

OutputDisableTime

OEBA to Ax

1.3

1.5

1.3

1.4

OutputDisableTime

OEAB to Bx

Set-upTime,databeforeCLK↑

Set-upTime,databeforeLE↓

2.2

1.9

1.3

0.6

1.4

3.3

—

2.1

1.6

1.1

0.6

1.7

3.3

—

1.7

1.5

—

500

tSU

CLK LOW

CLK HIGH

HoldTime,dataafterCLK↑

0.7

1.4

3.3

—

Hold Time, data after LE↓, CLK HIGH or LOW

Pulse Width, LE HIGH

Pulse Width, CLK HIGH or LOW

(2)

t^SK(o)

NOTES:

OutputSkew

1. See TEST CIRCUITS AND WAVEFORMS. TA = – 40°C to + 85°C.

Skew between any two outputs of the same package and switching in the same direction.

IDT74ALVCH16501

3.3VCMOS18-BITUNIVERSALBUSTRANSCEIVERWITH3-STATEOUTPUTS

INDUSTRIALTEMPERATURERANGE

TESTCIRCUITSANDWAVEFORMS

TESTCONDITIONS

VIH

SAME PHASE

INPUT TRANSITION

tPHL

tPLH

Symbol VCC⁽¹⁾=3.3V±0.3V VCC⁽¹⁾=2.7V VCC⁽²⁾=2.5V±0.2V Unit

VOH

VOL

OUTPUT

VLOAD

VIH

2 x Vcc

Vcc

2.7

1.5

300

2.7

1.5

300

VIH

Vcc / 2

150

OPPOSITE PHASE

INPUT TRANSITION

VLZ

VHZ

150

ALVC Link

Propagation Delay

VLOAD

Open

GND

DISABLE

VCC

ENABLE

VIH

CONTROL

INPUT

500Ω

tPZL

tPLZ

VIN

VOUT

(1, 2)

Pulse

VLOAD/2

D.U.T.

VLOAD/2

OUTPUT

NORMALLY

LOW

SWITCH

Generator

VLZ

VOL

CLOSED

500Ω

tPHZ

tPZH

OUTPUT

NORMALLY

HIGH

VOH

VHZ

SWITCH

OPEN

ALVC Link

Test Circuit for All Outputs

ALVC Link

DEFINITIONS:

CL = Load capacitance: includes jig and probe capacitance.

RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.

Enable and Disable Times

NOTE:

1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.

NOTES:

VIH

1. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.

2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2ns; tR ≤ 2ns.

DATA

INPUT

tSU

VIH

TIMING

INPUT

SWITCHPOSITION

Test

Switch

V^LOAD

GND

Open

tREM

VIH

ASYNCHRONOUS

CONTROL

Open Drain

Disable Low

Enable Low

VIH

SYNCHRONOUS

CONTROL

Disable High

Enable High

tSU

ALVC Link

All Other Tests

VIH

Set-up, Hold, and Release Times

INPUT

tPLH1

tPHL1

VOH

LOW-HIGH-LOW

PULSE

OUTPUT 1

OUTPUT 2

VOL

tSK (x)

VOH

VOL

HIGH-LOW-HIGH

PULSE

ALVC Link

tPLH2

tSK(x) = tPLH2 - tPLH1 or tPHL2 - tPHL1

tPHL2

Pulse Width

ALVC Link

Output Skew - tSK(X)

NOTES:

1. For tSK(o) OUTPUT1 and OUTPUT2 are any two outputs.

2. For tSK(b) OUTPUT1 and OUTPUT2 are in the same bank.

IDT74ALVCH16501

3.3VCMOS18-BITUNIVERSALBUSTRANSCEIVERWITH3-STATEOUTPUTS

INDUSTRIALTEMPERATURERANGE

ORDERINGINFORMATION

IDT

ALVC

Bus-Hold Family

Device Type Package

XXX

Temp. Range

Shrink Small Outline Package

SSOP - Green

Thin Shrink Small Outline Package

TSSOP - Green

PVG

PAG

18-Bit Universal Bus Transceiver with 3-State Outputs

Double-Density, 24mA

501

Bus-Hold

– 40°C to +85°C

CORPORATE HEADQUARTERS

6024 Silver Creek Valley Road

San Jose, CA 95138

for SALES:

800-345-7015 or 408-284-8200

fax: 408-284-2775

for Tech Support:

logichelp@idt.com

www.idt.com

74ALVCH16501PF8 [IDT]

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