74FCT16374ATE [IDT]
Bus Driver, FCT Series, 2-Func, 8-Bit, True Output, CMOS, CDFP48, CERPACK-48;
| 型号： | 74FCT16374ATE |
| 厂家： | 
INTEGRATED DEVICE TECHNOLOGY |
| 描述： | Bus Driver, FCT Series, 2-Func, 8-Bit, True Output, CMOS, CDFP48, CERPACK-48 CD |
| 文件： | 总7页 (文件大小：81K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
FAST CMOS 16-BIT
REGISTER (3-STATE)
IDT54/74FCT16374AT/CT/ET
DESCRIPTION:
FEATURES:
The FCT16374T 16-bit edge-triggered D-type register is built using
advanced dual metal CMOS technology. These high-speed, low-power
registers are idealforuse as bufferregisters fordata synchronizationand
storage.TheOutputEnable(xOE)andclock(xCLK)controlsareorganized
to operate each device as two 8-bit registers or one 16-bit register with
commonclock.Flow-throughorganizationofsignalpinssimplifieslayout.All
inputs are designedwithhysteresis forimprovednoise margin.
TheFCT16374Tisideallysuitedfordrivinghigh-capacitanceloadsand
low-impedancebackplanes.Theoutputbuffersaredesignedwithpoweroff
disablecapabilitytoallow"liveinsertion"ofboardswhenusedasbackplane
drivers.
• 0.5 MICRON CMOS Technology
• High-speed, low-power CMOS replacement for ABT functions
• Typical tSK(o) (Output Skew) < 250ps
• Low input and output leakage ≤1µA (max.)
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
• VCC = 5V ±10%
• High drive outputs (–32mA IOH, 64mA IOL)
• Power off disable outputs permit “live insertion”
• Typical VOLP (Output Ground Bounce) < 1.0V at VCC = 5V,
TA = 25°C
• Available in the following packages:
– Industrial: SSOP, TSSOP
– Military: CERPACK
FUNCTIONALBLOCKDIAGRAM
2OE
1OE
2CLK
1CLK
D
C
D
C
1D1
2D1
1O1
2
O1
TO SEVEN OTHER CHANNELS
TO SEVEN OTHER CHANNELS
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
SEPTEMBER 2009
1
© 2009 Integrated Device Technology, Inc.
DSC-5452/7
IDT54/74FCT16374AT/CT/ET
FASTCMOS16-BITREGISTER(3-STATE)
MILITARYANDINDUSTRIALTEMPERATURERANGES
PINCONFIGURATION
ABSOLUTEMAXIMUMRATINGS(1)
Symbol
Description
Max
Unit
V
(2)
VTERM
Terminal Voltage with Respect to GND
–0.5 to 7
1
48
1
1
1
CLK
1
OE
(3)
VTERM
Terminal Voltage with Respect to GND –0.5 to VCC+0.5
V
2
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1
O
1
2
D
1
2
TSTG
IOUT
Storage Temperature
DC Output Current
–65 to +150
–60 to +120
° C
mA
3
1
O
D
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
GND
4
GND
5
1
O
3
4
1D
3
6
1
O
1
D
4
2. All device terminals except FCT162XXX Output and I/O terminals.
3. Outputs and I/O terminals for FCT162XXX.
V
CC
7
V
CC
8
1
1
O5
1D
5
9
CAPACITANCE (TA = +25°C, f = 1.0MHz)
O6
1D
6
Symbol
CIN
Parameter(1)
Conditions
VIN = 0V
Typ.
3.5
Max. Unit
GND
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
GND
Input Capacitance
Output Capacitance
6
8
pF
pF
1
1
2
2
O7
O8
O1
O2
1
1
2
2
D
D
D
D
7
8
1
2
COUT
VOUT = 0V
3.5
NOTE:
1. This parameter is measured at characterization but not tested.
GND
GND
PINDESCRIPTION
Pin Names
xDx
Description
2
2
O
3
4
2
2
D
3
DataInputs
O
D
4
xCLK
xOx
ClockInputs
3-StateOutputs
V
CC
V
CC
xOE
3-StateOutputEnableInput(ActiveLOW)
2
2
O5
2D
5
O6
2D
6
GND
GND
FUNCTIONTABLE(1)
2
2
O
7
8
2
2
2
D
7
8
Inputs
Outputs
O
D
Function
xDx
X
xCLK
xOE
H
xOx
Z
CLK
2OE
Z
L
H
↑
↑
↑
↑
X
H
Z
Load
L
L
L
SSOP/ TSSOP/ CERPACK
TOP VIEW
Register
H
L
H
Z
L
H
H
H
Z
NOTE:
1. H = HIGH voltage level
L = LOW voltage level
X = Don’t care
Z = High-impedance
↑ = LOW-to-HIGH transition
2
IDT54/74FCT16374AT/CT/ET
FASTCMOS16-BITREGISTER(3-STATE)
MILITARYANDINDUSTRIALTEMPERATURERANGES
DCELECTRICALCHARACTERISTICSOVEROPERATINGRANGE
FollowingConditionsApplyUnlessOtherwiseSpecified:
Industrial: TA = –40°C to +85°C, VCC = 5.0V ±10%; Military: TA = –55°C to +125°C, VCC = 5.0V ±10%
Symbol
VIH
Parameter
Test Conditions(1)
GuaranteedLogicHIGHLevel
Min.
2
Typ.(2)
—
Max.
—
Unit
V
Input HIGH Level
VIL
InputLOWLevel
GuaranteedLogicLOWLevel
VCC = Max.
—
—
—
—
—
—
—
—
–80
—
—
—
0.8
±1
V
IIH
InputHIGHCurrent(Inputpins)(5)
Input HIGH Current (I/O pins)(5)
InputLOWCurrent(Inputpins)(5)
InputLOWCurrent(I/Opins)(5)
HighImpedanceOutputCurrent
(3-StateOutputpins)(5)
VI = VCC
—
µA
—
±1
IIL
VI = GND
—
±1
—
±1
IOZH
IOZL
VIK
VCC = Max.
VO = 2.7V
VO = 0.5V
—
±1
µ A
—
±1
ClampDiodeVoltage
VCC = Min., IIN = –18mA
–0.7
–140
100
5
–1.2
–250
—
V
(3)
IOS
ShortCircuitCurrent
VCC = Max., VO = GND
mA
mV
µ A
VH
InputHysteresis
—
ICCL
ICCH
ICCZ
QuiescentPowerSupplyCurrent
VCC = Max
500
VIN = GND or VCC
OUTPUTDRIVECHARACTERISTICS
Symbol
IO
Parameter
OutputDriveCurrent
OutputHIGHVoltage
Test Conditions(1)
(3)
Min.
–50
2.5
Typ.(2) Max.
Unit
mA
V
VCC = Max., VO = 2.5V
—
3.5
3.5
–180
—
VOH
VCC = Min.
IOH = –3mA
VIN = VIH or VIL
IOH = –12mA MIL
IOH = –15mA IND
IOH = –24mA MIL
2.4
—
V
2
3
—
0.55
±1
V
V
(4)
IOL = –32mA IND
IOL = 48mA MIL
IOL = 64mA IND
VOL
OutputLOWVoltage
VCC = Min.
—
—
0.2
—
VIN = VIH or VIL
IOFF
Input/OutputPowerOffLeakage(5)
VCC = 0V, VIN = or VO ≤ 4.5V
μA
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. Duration of the condition can not exceed one second.
5. This test limit for this parameter is ±5µA at TA = –55°C.
3
IDT54/74FCT16374AT/CT/ET
FASTCMOS16-BITREGISTER(3-STATE)
MILITARYANDINDUSTRIALTEMPERATURERANGES
POWERSUPPLYCHARACTERISTICS
Symbol
Parameter
QuiescentPowerSupplyCurrent
TTL Inputs HIGH
TestConditions(1)
Min.
Typ.(2)
Max.
Unit
ΔICC
VCC = Max.
—
0.5
1.5
mA
(3)
VIN = 3.4V
ICCD
IC
DynamicPowerSupplyCurrent(4)
VCC = Max.
OutputsOpen
xOE = GND
OneInputToggling
50% Duty Cycle
VIN = VCC
VIN = GND
—
60
100
µ A /
MHz
TotalPowerSupplyCurrent(6)
VCC = Max.
OutputsOpen
fCP = 10MHz
VIN = VCC
VIN = GND
—
—
—
—
0.6
1.1
3
1.5
3
mA
50% Duty Cycle
xOE = GND
fi = 5MHz
50% Duty Cycle
VIN = 3.4V
VIN = GND
OneBitToggling
(5)
VCC = Max.
VIN = VCC
VIN = GND
5.5
OutputsOpen
fCP = 10MHz
50% Duty Cycle
(5)
xOE = GND
SixteenBitsToggling
fi = 2.5MHz
VIN = 3.4V
VIN = GND
7.5
19
50% Duty Cycle
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ΔICC DHNT + ICCD (fCPNCP/2 + fiNi)
ICC = Quiescent Current (ICCL, ICCH and ICCZ)
ΔICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
NCP = Number of Clock Inputs at fCP
fi = Input Frequency
Ni = Number of Inputs at fi
4
IDT54/74FCT16374AT/CT/ET
FASTCMOS16-BITREGISTER(3-STATE)
MILITARYANDINDUSTRIALTEMPERATURERANGES
SWITCHINGCHARACTERISTICSOVEROPERATINGRANGE
FCT16374AT
Ind.
Mil.
Symbol
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tSU
Parameter
PropagationDelay
xCLK to xOx
Condition(2)
CL = 50pF
RL = 500Ω
Min.(2)
Max.
Min.(2)
Max.
Unit
2
6.5
2
7.2
ns
OutputEnableTime
1.5
1.5
6.5
5.5
1.5
1.5
7.5
6.5
ns
ns
OutputDisableTime
Set-up Time HIGH or LOW, xDx to xCLK
Hold Time HIGH or LOW, xDx to xCLK
xCLK Pulse Width HIGH or LOW
2
1.5
5
—
—
—
0.5
2
1.5
6
—
—
—
0.5
ns
ns
ns
ns
tH
tW
(3)
tSK(o)
OutputSkew
—
—
FCT16374CT
FCT16374ET
Ind.
Mil.
Min.(2)
Ind.
Mil.
Symbol
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tSU
Parameter
PropagationDelay
xCLK to xOx
Condition(2)
CL = 50pF
RL = 500Ω
Min.(2)
Max.
Max.
Min.(2) Max. Min.(2) Max.
Unit
2
5.2
2
6.2
1.5
1.5
1.5
3.7
4.4
3.6
—
—
—
—
—
—
ns
OutputEnableTime
1.5
1.5
5.5
5
1.5
1.5
6.2
5.7
ns
ns
OutputDisableTime
Set-up Time HIGH or LOW, xDx to xCLK
Hold Time HIGH or LOW, xDx to xCLK
xCLK Pulse Width HIGH or LOW
2
1.5
5
—
—
—
0.5
2
1.5
6
—
—
—
0.5
1.5
0
—
—
—
0.5
—
—
—
—
—
—
—
—
ns
ns
ns
ns
tH
(4)
tW
3
(3)
tSK(o)
OutputSkew
—
—
—
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design.
4. This limit is guaranteed but not tested.
5
IDT54/74FCT16374AT/CT/ET
FASTCMOS16-BITREGISTER(3-STATE)
MILITARYANDINDUSTRIALTEMPERATURERANGES
TESTCIRCUITSANDWAVEFORMS
V
CC
SWITCHPOSITION
7.0V
Test
Switch
Closed
Open
500Ω
500Ω
Open Drain
Disable Low
Enable Low
V
OUT
V
IN
Pulse
Generator
D.U.T.
50pF
All Other Tests
RT
CL
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
Test Circuits for All Outputs
3V
DATA
1.5V
INPUT
0V
LOW-HIGH-LOW
t
H
tSU
1.5V
PULSE
3V
1.5V
0V
TIMING
INPUT
ASYNCHRONOUS CONTROL
tW
tREM
PRESET
CLEAR
ETC.
3V
1.5V
0V
HIGH-LOW-HIGH
PULSE
1.5V
SYNCHRONOUS CONTROL
PRESET
3V
1.5V
0V
CLEAR
tSU
tH
Pulse Width
CLOCK ENABLE
ETC.
Set-up, Hold, and Release Times
ENABLE
DISABLE
3V
1.5V
0V
3V
SAME PHASE
CONTROL
INPUT
1.5V
0V
INPUT TRANSITION
t
PLH
t
PHL
PHL
t
PZL
tPLZ
VOH
OUTPUT
3.5V
1.5V
3.5V
1.5V
OUTPUT
NORMALLY
LOW
SWITCH
CLOSED
VOL
tPLH
t
0.3V
0.3V
VOL
3V
1.5V
0V
tPZH
tPHZ
OPPOSITE PHASE
INPUT TRANSITION
VOH
OUTPUT
NORMALLY
HIGH
SWITCH
OPEN
1.5V
0V
0V
Propagation Delay
Enable and Disable Times
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.
6
IDT54/74FCT16374AT/CT/ET
FASTCMOS16-BITREGISTER(3-STATE)
MILITARYANDINDUSTRIALTEMPERATURERANGES
ORDERINGINFORMATION
XX
FCT
XXXX
XXX
XX
X
Temp. Range
Family
Package
Process
Device Type
Blank Industrial
B
MIL-STD-883, Class B
Industrial Options
Shrink Small Outline Package - Green
Thin Shrink Small Outline Package - Green
PVG
PAG
Military Options
CERPACK
E
16-Bit Register (3-State)
374AT
374CT
374ET
16
Double-Density, 5 Volt, High Drive
54
74
55 C to +125 C
40 C to +85 C
DatasheetDocumentHistory
09/28/09 Pg. 7
Updatedthe orderinginformationbyremovingthe "IDT"notationandnonRoHSpart.
CORPORATE HEADQUARTERS
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San Jose, CA 95138
for SALES:
for Tech Support:
logichelp@idt.com
800-345-7015 or 408-284-8200
fax: 408-284-2775
www.idt.com
7
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