74FCT16374ATPV8 [IDT]

D Flip-Flop, FCT Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48, SSOP-48;


型号：	74FCT16374ATPV8
厂家：	INTEGRATED DEVICE TECHNOLOGY
描述：	D Flip-Flop, FCT Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48, SSOP-48 光电二极管
文件：	总7页 (文件大小：62K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

IDT54/74FCT16374AT/CT/ET

FASTCMOS16-BITREGISTER(3-STATE)

MILITARYANDINDUSTRIALTEMPERATURERANGES

FAST CMOS 16-BIT

IDT54/74FCT16374AT/CT/ET

DESCRIPTION:

ꢀEATURES:

• 0.5 MICRON CMOS Technology

The FCT16374T 16-bit edge-triggered D-type register is built using

advanced dual metal CMOS technology. These high-speed, low-power

registers are idealforuse as bufferregisters fordata synchronizationand

storage.TheOutputEnable(xOE)andclock(xCLK)controlsareorganized

to operate each device as two 8-bit registers or one 16-bit register with

commonclock.Flow-throughorganizationofsignalpinssimplifieslayout.All

inputs are designedwithhysteresis forimprovednoise margin.

TheFCT16374Tisideallysuitedfordrivinghigh-capacitanceloadsand

low-impedancebackplanes.Theoutputbuffersaredesignedwithpoweroff

disablecapabilitytoallow"liveinsertion"ofboardswhenusedasbackplane

drivers.

• High-speed, low-power CMOS replacement for ABT functions

• Typical tSK(o) (Output Skew) < 250ps

• Low input and output leakage ≤1µA (max.)

• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using

machine model (C = 200pF, R = 0)

• VCC = 5V ±10%

• High drive outputs (–32mA IOH, 64mA IOL)

• Power off disable outputs permit “live insertion”

• Typical VOLP (Output Ground Bounce) < 1.0V at VCC = 5V,

TA = 25°C

• Available in the following packages:

– Industrial: SSOP, TSSOP, TVSOP

– Military: CERPACK

ꢀUNCTIONALBLOCKDIAGRAM

2OE

1OE

1CLK

2CLK

1D1

2D1

1O1

2O1

TO SEVEN OTHER CHANNELS

TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.

MILITARY AND INDUSTRIAL TEMPERATURE RANGES

MARCH 2002

DSC-5452/2

IDT54/74FCT16374AT/CT/ET

FASTCMOS16-BITREGISTER(3-STATE)

MILITARYANDINDUSTRIALTEMPERATURERANGES

PINCONꢀIGURATION

ABSOLUTEMAXIMUMRATINGS⁽¹⁾

Symbol

Description

Max

Unit

(2)

VTERM

Terminal Voltage with Respect to GND

–0.5 to 7

₁CLK

1OE

1O1

(3)

VTERM

Terminal Voltage with Respect to GND –0.5 to VCC+0.5

1D1

TSTG

IOUT

Storage Temperature

DC Output Current

–65 to +150

–60 to +120

° C

1O2

1D2

NOTES:

1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause

permanent damage to the device. This is a stress rating only and functional operation

of the device at these or any other conditions above those indicated in the operational

sections of this specification is not implied. Exposure to absolute maximum rating

conditions for extended periods may affect reliability.

GND

1O3

1D3

1O4

VCC

1D4

2. All device terminals except FCT162XXX Output and I/O terminals.

3. Outputs and I/O terminals for FCT162XXX.

VCC

1O5

1D5

CAPACITANCE (TA = +25°C, f = 1.0MHz)

1O6

1D6

Symbol

CIN

Parameter⁽¹⁾

Conditions

VIN = 0V

Typ.

3.5

Max. Unit

GND

Input Capacitance

Output Capacitance

₁O₇

1O8

2O1

₁D₇

1D8

2D1

COUT

VOUT = 0V

3.5

NOTE:

1. This parameter is measured at characterization but not tested.

2O2

2D2

GND

PINDESCRIPTION

Pin Names

xDx

Description

2O3

2D3

DataInputs

2O4

VCC

2D4

xCLK

xOx

ClockInputs

3-StateOutputs

VCC

xOE

3-StateOutputEnableInput(ActiveLOW)

₂O₅

₂D₅

₂O₆

₂D₆

GND

ꢀUNCTIONTABLE⁽¹⁾

2O7

2O8

2OE

2D7

Inputs

Outputs

2D8

Function

xDx

xCLK

xOE

xOx

2CLK

↑

Load

SSOP/ TSSOP/ TVSOP/ CERPACK

TOP VIEW

↑

NOTE:

1. H = HIGH voltage level

L = LOW voltage level

X = Don’t care

Z = High-impedance

↑ = LOW-to-HIGH transition

IDT54/74FCT16374AT/CT/ET

FASTCMOS16-BITREGISTER(3-STATE)

MILITARYANDINDUSTRIALTEMPERATURERANGES

DCELECTRICALCHARACTERISTICSOVEROPERATINGRANGE

FollowingConditionsApplyUnlessOtherwiseSpecified:

Industrial: TA = –40°C to +85°C, VCC = 5.0V ±10%; Military: TA = –55°C to +125°C, VCC = 5.0V ±10%

Symbol

VIH

Parameter

Test Conditions⁽¹⁾

GuaranteedLogicHIGHLevel

Min.

Typ.⁽²⁾

—

Max.

—

Unit

Input HIGH Level

VIL

InputLOWLevel

GuaranteedLogicLOWLevel

VCC = Max.

—

–80

—

0.8

±1

IIH

InputHIGHCurrent(Inputpins)⁽⁵⁾

Input HIGH Current (I/O pins)⁽⁵⁾

InputLOWCurrent(Inputpins)⁽⁵⁾

InputLOWCurrent(I/Opins)⁽⁵⁾

HighImpedanceOutputCurrent

VI = VCC

—

µA

—

±1

IIL

VI = GND

—

±1

—

±1

IOZH

IOZL

VIK

VCC = Max.

VO = 2.7V

VO = 0.5V

—

±1

µ A

(5)

(3-StateOutputpins)

—

±1

ClampDiodeVoltage

ShortCircuitCurrent

VCC = Min., IIN = –18mA

–0.7

–140

100

–1.2

–250

—

(3)

IOS

VCC = Max., VO = GND

µ A

InputHysteresis

—

ICCL

ICCH

ICCZ

QuiescentPowerSupplyCurrent

VCC = Max

500

VIN = GND or VCC

OUTPUTDRIVECHARACTERISTICS

Symbol

Parameter

OutputDriveCurrent

OutputHIGHVoltage

Test Conditions⁽¹⁾

(3)

Min.

–50

2.5

Typ.⁽²⁾Max.

Unit

VCC = Max., VO = 2.5V

—

3.5

–180

—

VOH

VCC = Min.

IOH = –3mA

VIN = VIH or VIL

IOH = –12mA MIL

IOH = –15mA IND

IOH = –24mA MIL

2.4

—

0.55

±1

(4)

IOL = –32mA IND

IOL = 48mA MIL

IOL = 64mA IND

VOL

OutputLOWVoltage

VCC = Min.

—

0.2

—

VIN = VIH or VIL

IOFF

Input/OutputPowerOffLeakage⁽⁵⁾

VCC = 0V, VIN = or VO ≤ 4.5V

µA

NOTES:

1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.

2. Typical values are at VCC = 5.0V, +25°C ambient.

3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.

4. Duration of the condition can not exceed one second.

5. This test limit for this parameter is ±5µA at TA = –55°C.

IDT54/74FCT16374AT/CT/ET

FASTCMOS16-BITREGISTER(3-STATE)

MILITARYANDINDUSTRIALTEMPERATURERANGES

POWERSUPPLYCHARACTERISTICS

Symbol

Parameter

QuiescentPowerSupplyCurrent

TTL Inputs HIGH

TestConditions⁽¹⁾

Min.

Typ.⁽²⁾

Max.

Unit

∆ICC

VCC = Max.

—

0.5

1.5

(3)

VIN = 3.4V

ICCD

DynamicPowerSupplyCurrent⁽⁴⁾

VCC = Max.

OutputsOpen

xOE = GND

OneInputToggling

50% Duty Cycle

VIN = VCC

VIN = GND

—

100

µA/

MHz

TotalPowerSupplyCurrent⁽⁶⁾

VCC = Max.

OutputsOpen

f^CP= 10MHz

VIN = VCC

VIN = GND

—

0.6

1.1

1.5

50% Duty Cycle

xOE = GND

fi = 5MHz

50% Duty Cycle

VIN = 3.4V

VIN = GND

OneBitToggling

VCC = Max.

VIN = VCC

VIN = GND

5.5⁽⁵⁾

OutputsOpen

f^CP= 10MHz

50% Duty Cycle

(5)

xOE = GND

SixteenBitsToggling

fi = 2.5MHz

VIN = 3.4V

VIN = GND

7.5

50% Duty Cycle

NOTES:

1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.

2. Typical values are at VCC = 5.0V, +25°C ambient.

3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND.

4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.

5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.

6. IC = IQUIESCENT + IINPUTS + IDYNAMIC

IC = ICC + ∆ICC DHNT + ICCD (fCPNCP/2 + fiNi)

ICC = Quiescent Current (ICCL, ICCH and ICCZ)

∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)

DH = Duty Cycle for TTL Inputs High

NT = Number of TTL Inputs at DH

ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)

fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)

NCP = Number of Clock Inputs at fCP

fi = Input Frequency

Ni = Number of Inputs at fi

IDT54/74FCT16374AT/CT/ET

FASTCMOS16-BITREGISTER(3-STATE)

MILITARYANDINDUSTRIALTEMPERATURERANGES

SWITCHINGCHARACTERISTICSOVEROPERATINGRANGE

FCT16374AT

Ind.

Mil.

Symbol

tPLH

tPHL

tPZH

tPZL

tPHZ

tPLZ

tSU

Parameter

PropagationDelay

xCLK to xOx

Condition⁽²⁾

CL = 50pF

RL = 500Ω

Min.⁽²⁾

Max.

Min.⁽²⁾

Max.

Unit

6.5

7.2

OutputEnableTime

1.5

6.5

5.5

1.5

7.5

6.5

OutputDisableTime

Set-up Time HIGH or LOW, xDx to xCLK

Hold Time HIGH or LOW, xDx to xCLK

xCLK Pulse Width HIGH or LOW

1.5

—

0.5

1.5

—

0.5

(3)

tSK(o)

OutputSkew

—

FCT16374CT

FCT16374ET

Ind.

Mil.

Min.⁽²⁾

Ind.

Mil.

Symbol

tPLH

tPHL

tPZH

tPZL

tPHZ

tPLZ

tSU

Parameter

PropagationDelay

xCLK to xOx

Condition⁽²⁾

CL = 50pF

RL = 500Ω

Min.⁽²⁾

Max.

Min.⁽²⁾Max. Min.⁽²⁾Max.

Unit

5.2

6.2

1.5

3.7

4.4

3.6

—

OutputEnableTime

1.5

5.5

1.5

6.2

5.7

OutputDisableTime

Set-up Time HIGH or LOW, xDx to xCLK

Hold Time HIGH or LOW, xDx to xCLK

xCLK Pulse Width HIGH or LOW

1.5

—

0.5

1.5

—

0.5

1.5

—

0.5

—

(4)

(3)

tSK(o)

OutputSkew

—

NOTES:

1. See test circuit and waveforms.

2. Minimum limits are guaranteed but not tested on Propagation Delays.

3. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design.

4. This limit is guaranteed but not tested.

IDT54/74FCT16374AT/CT/ET

FASTCMOS16-BITREGISTER(3-STATE)

MILITARYANDINDUSTRIALTEMPERATURERANGES

TESTCIRCUITSANDWAVEꢀORMS

V CC

SWITCHPOSITION

7.0V

Test

Switch

Closed

Open

500Ω

Open Drain

Disable Low

Enable Low

VOUT

VIN

Pulse

Generator

D.U.T.

50pF

All Other Tests

500Ω

DEFINITIONS:

CL = Load capacitance: includes jig and probe capacitance.

RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.

Test Circuits for All Outputs

1.5V

DATA

INPUT

LOW-HIGH-LOW

tSU

1.5V

PULSE

1.5V

TIMING

INPUT

ASYNCHRONOUS CONTROL

tREM

PRESET

CLEAR

ETC.

1.5V

HIGH-LOW-HIGH

PULSE

1.5V

SYNCHRONOUS CONTROL

PRESET

1.5V

CLEAR

CLOCK ENABLE

ETC.

tSU

Pulse Width

Set-up, Hold, and Release Times

ENABLE

DISABLE

SAME PHASE

INPUT TRANSITION

1.5V

CONTROL

INPUT

1.5V

tPLH

tPHL

tPZL

tPLZ

VOH

1.5V

VOL

OUTPUT

3.5V

1.5V

3.5V

VOL

OUTPUT

NORMALLY

LOW

SWITCH

CLOSED

0.3V

tPZH

tPHZ

OPPOSITE PHASE

INPUT TRANSITION

1.5V

VOH

OUTPUT

NORMALLY

HIGH

SWITCH

OPEN

1.5V

Propagation Delay

Enable and Disable Times

NOTES:

1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.

2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.

IDT54/74FCT16374AT/CT/ET

FASTCMOS16-BITREGISTER(3-STATE)

MILITARYANDINDUSTRIALTEMPERATURERANGES

ORDERINGINꢀORMATION

IDT

FCT

XXXX

XXX

Temp. Range

Family

Package

Process

Device Type

Blank

Industrial

MIL-STD-883, Class B

Industrial Options

Shrink Small Outline Package

Thin Shrink Small Outline Package

Thin Very Small Outline Package

Military Options

CERPACK

16-Bit Register (3-State)

374AT

374CT

374ET

Double-Density, 5 Volt, High Drive

55 C to +125 C

° °

–

40 C to +85 C

DATASHEETDOCUMENTHISTORY

3/25/2002 Removed standard speed grade

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for Tech Support:

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www.idt.com

74FCT16374ATPV8 [IDT]

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