92HD73E1T5PRGIC1X [IDT]
PCM Codec, PQFP48, ROHS COMPLIANT, QFP-48;型号: | 92HD73E1T5PRGIC1X |
厂家: | INTEGRATED DEVICE TECHNOLOGY |
描述: | PCM Codec, PQFP48, ROHS COMPLIANT, QFP-48 PC 电信 电信集成电路 |
文件: | 总237页 (文件大小:2842K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
DATASHEET
TEN CHANNEL HD AUDIO CODEC
Description
The 92HD73E codec is a low power optimized, high fidelity,
10-channel audio codec compatible with Intel’s High
Definition (HD) Audio Interface. The 92HD73E codec
provides stereo 24-bit resolution with sample rates up to
192kHz. Dual SPDIF provides connectivity to consumer
electronic equipment that is WLP compliant. The 92HD73E
provides high quality, HD Audio capability to multimedia
notebook and desktop PC applications.
92HD73E
Software Support
•
Intuitive IDT HD Sound graphical user interface that
allows configurability and preference settings
•
•
12 band fully parametric equalizer
Constant, system-level effects tuned to optimize a
particular platform can be combined with
user-mode “presets” tailored for specific
acoustical environments and applications
•
System-level effects automatically disabled when
external audio connections made
Features
•
10 Channels (5 stereo DACs and 2 stereo ADCs)
•
•
•
Dynamics Processing
with 24-bit resolution
Enables improved voice articulation
•
Supports full-duplex 7.1 audio and simultaneous VoIP
Compressor/limiter allows higher average volume
level without resonances or damage to speakers.
•
•
Microsoft WLP premium logo compliant
Optimized and flexible power management with
pop/click mitigation
•
•
IDT Vista APO wrapper
Enables multiple APOs to be used with the IDT
Driver
•
SPDIF
•
48QFP package supports 2 independent S/PDIF Output
converters for WLP compliant HDMI/SPDIF support
40QFN package supports a single SPDIF Out
Both packages support SPDIF Input
•
Microphone Beam Forming, Acoustic Echo
Cancellation, and Noise Suppression
•
•
•
•
Dynamic Stream Switching
•
HDA signaling
Improved multi-streaming user experience with
less support calls
•
48QFP package support for 1.5V and 3.3V with runtime
selection
rd
•
Broad 3 party branded software including
•
40QFN package supports 3.3V only
Creative, Dolby, DTS, and SRS
•
•
•
3 adjustable VREF Out pins for microphone bias
High performance analog mixer
9 stereo analog ports with presence detect
capability
•
•
•
•
Digital and Analog PC Beep to all outputs
3 Integrated headphone amps
Sample rates up to 192kHz
Additional Features on 48QFP package
•
•
•
•
Two-pin volume up/down control
Digital microphone input (mono, stereo, or quad array)
4th adjustable VREF Out
Additional 5 GPIOs
•
Package Options
•
•
•
48-pin QFP RoHS package
48-pin QFP RoHS package, Industrial Temp
40-pin QFN RoHS package
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92HD73E
92HD73E
Ten Channel HD Audio Codec
TABLE OF CONTENTS
1. DESCRIPTION .......................................................................................................................... 4
1.1. Overview ............................................................................................................................................4
1.2. Orderable Part Numbers ....................................................................................................................4
1.3. Detailed Description ...........................................................................................................................5
2. CHARACTERISTICS ............................................................................................................... 22
2.1. Electrical Specifications ...................................................................................................................22
2.2. 92HD73E Analog Performance Characteristics ...............................................................................23
3. PORT CONFIGURATIONS ..................................................................................................... 27
4. FUNCTIONAL BLOCK DIAGRAMS ....................................................................................... 28
4.1. 48QFP .............................................................................................................................................28
4.2. 40QFN .............................................................................................................................................29
4.3. Widget Information and Supported Command Verbs ......................................................................30
4.4. Widget List ......................................................................................................................................31
4.5. Pin Configuration Default Register Settings .....................................................................................32
5. WIDGET INFORMATION ........................................................................................................ 34
5.1. Root Node (NID = 00)) .....................................................................................................................35
5.2. AFG Node (NID = 01 .......................................................................................................................36
5.3. Port A Node (NID = 0A) ...................................................................................................................53
5.4. PortB Node (NID = 0B) ....................................................................................................................60
5.5. Port C Node (NID = 0C) ...................................................................................................................67
5.6. Port D Node (NID = 0D) ...................................................................................................................74
5.7. PortE Node (NID = 0E) ....................................................................................................................81
5.8. PortF Node (NID = 0F) .....................................................................................................................88
5.9. PortG Node (NID = 10) ....................................................................................................................93
5.10. PortH Node (NID = 11) ................................................................................................................101
5.11. PortI Node (NID = 12) ..................................................................................................................108
5.12. DMic0 Node (NID = 13) ...............................................................................................................113
5.13. DMic1 Node (NID = 14) ...............................................................................................................117
5.14. DAC0 Node (NID = 15) ................................................................................................................122
5.15. DAC1 Node (NID = 16) ................................................................................................................126
5.16. DAC2 Node (NID = 17) ................................................................................................................131
5.17. DAC3 Node (NID = 18) ................................................................................................................135
5.18. DAC4 Node (NID = 19) ................................................................................................................140
5.19. ADC0 Node (NID = 1A) ................................................................................................................144
5.20. ADC1 Node (NID = 1B) ................................................................................................................149
5.21. DigBeep Node (NID = 1C) ...........................................................................................................153
5.22. Mixer Node (NID = 1D) ................................................................................................................156
5.23. MixerOutVol Node (NID = 1E) .....................................................................................................164
5.24. VolumeKnob Node (NID = 1F) .....................................................................................................167
5.25. ADC0Mux Node (NID = 20) .........................................................................................................171
5.26. ADC1Mux Node (NID = 21) .........................................................................................................175
5.27. Dig0Pin Node (NID = 22) .............................................................................................................180
5.28. Dig1Pin Node (NID = 23) .............................................................................................................185
5.29. Dig2Pin Node (NID = 24) .............................................................................................................190
5.30. SPDIFOut0 Node (NID = 25) .......................................................................................................196
5.31. SPDIFOut1 Node (NID = 26) .......................................................................................................202
5.32. SPDIFIn Node (NID = 27) ............................................................................................................208
5.33. InPort0Mux Node (NID = 28) .......................................................................................................219
5.34. InPort1Mux Node (NID = 29) .......................................................................................................221
5.35. InPort2Mux Node (NID = 2A) .......................................................................................................223
5.36. InPort3Mux Node (NID = 2B) .......................................................................................................226
6. DISCLAIMER ......................................................................................................................... 228
7. PINOUTS ............................................................................................................................... 229
7.1. 48QFP ...........................................................................................................................................229
7.2. 40QFN ...........................................................................................................................................232
8. PACKAGE OUTLINE AND PACKAGE DIMENSIONS ......................................................... 234
8.1. 48QFP Package ...........................................................................................................................234
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8.2. 40QFN Package ...........................................................................................................................235
8.3. Standard Reflow Profile Data ........................................................................................................235
8.4. Pb Free Process - Package Classification Reflow Temperatures ................................................236
9. DOCUMENT REVISION HISTORY ...................................................................................... 237
LIST OF FIGURES
Figure 1. Multi-channel capture ......................................................................................................................11
Figure 2. Multi-channel timing diagram ..........................................................................................................11
Figure 3. EAPD ..............................................................................................................................................14
Figure 4: Mono Digital Microphone (data is ported to both left and right channels) .......................................16
Figure 5: Stereo Digital Microphone Configuration ........................................................................................16
Figure 6: Quad Digital Microphone Configuration ..........................................................................................17
Figure 7: External Volume Control Circuit ......................................................................................................21
Figure 8. Port Configuration ...........................................................................................................................27
Figure 9. 48QFP Functional Block Diagram ...................................................................................................28
Figure 10. 40QFN Functional Block Diagram ................................................................................................29
Figure 11. Widget Diagram ............................................................................................................................30
Figure 12. 48QFP Pin Assignment ...............................................................................................................229
Figure 13. 40QFN Pin Assignment ..............................................................................................................232
Figure 14. 48QFP Package Drawing ...........................................................................................................234
Figure 15. 40QFN Package Drawing ...........................................................................................................235
Figure 16. Solder Reflow Profile ..................................................................................................................236
LIST OF TABLES
Table 1. Port Functionality ...............................................................................................................................5
Table 2. Analog I/O Port Behavior ...................................................................................................................6
Table 4. SPDIF OUT 0 (Pin 48) Behavior ........................................................................................................7
Table 5. SPDIF OUT 1 (Pin 40) Behavior ........................................................................................................7
Table 6. Input Multiplexers ...............................................................................................................................8
Table 7. Function state vs. AFG power state ...................................................................................................9
Table 10. EAPD Behavior ..............................................................................................................................13
Table 11. Valid Digital Mic Configurations .....................................................................................................15
Table 12. DMIC_CLK and DMIC_0,1 Operation During Power States ..........................................................15
Table 13. GPIO Pin mapping .........................................................................................................................19
Table 14. Electrical Specification: Maximum Ratings ...................................................................................22
Table 15. Recommended Operating Conditions ............................................................................................22
Table 16. 92HD73E Analog Performance Characteristics .............................................................................23
Table 17. High Definition Audio Widget .........................................................................................................31
Table 18. Pin Configuration Default Settings .................................................................................................32
Table 19. Command Format for Verb with 4-bit Identifier ..............................................................................34
Table 20. Command Format for Verb with 12-bit Identifier ............................................................................34
Table 21. Solicited Response Format ............................................................................................................34
Table 22. Unsolicited Response Format ........................................................................................................34
Table 23. 48QFP Pin Table .........................................................................................................................230
Table 24. 40QFN Pin Table .........................................................................................................................233
Table 25. Standard Reflow Profile ...............................................................................................................235
Table 26. Pb-Free Process Reflow ..............................................................................................................236
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92HD73E
92HD73E
Ten Channel HD Audio Codec
1. DESCRIPTION
1.1. Overview
The 92HD73E is a high fidelity, 10-channel audio codec compatible with the Intel High Definition
(HD) Audio Interface. The 92HD73E codec provides high quality, HD Audio capability to desktop
and multi-media notebook.
The 92HD73E is designed to meet or exceed premium logo requirements for Microsoft’s Windows
Logo Program (WLP) 3.09 and revisions 4 as indicated in WLP 3.09.
The 92HD73E provides stereo 24-bit, full duplex resolution supporting sample rates up to 192kHz by
the DAC and ADC. 92HD73E SPDIF outputs support sample rates of 192kHz, 176.4kHz, 96kHz,
88.2kHz, 48kHz, and 44.1kHz. 92HD73E SPDIF input supports sample rates of 96kHz, 88.2kHz,
48kHz, and 44.1kHz. Additional sample rates are supported by the driver software.
The 92HD73E supports a wide range of desktop and consumer 8/10 channel configurations. The 2
independent SPDIF output interfaces provides connectivity to Consumer Electronic equipment like
Dolby Digital decoders, powered speakers, mini disk drives or to a home entertainment system.
Simultaneous HDMI and SPDIF output is possible.
MIC inputs can be programmed with 0/10/20/30dB boost. For more advanced configurations, the
92HD73E has 8 General Purpose I/O (GPIO) in the 48QFP package.
The port presence detect capabilities allow the codecs to detect when audio devices are connected
to the codec. Load impedance sensing helps identify attached peripherals for easy set-up and a bet-
ter user experience. The fully parametric IDT SoftEQ can be initiated upon headphone jack insertion
and removal for protection of notebook speakers.
The 92HD73E operates with a 3.3V digital supply and a 5V analog supply. It can also work with 1.5V
and 3.3V HDA signaling; the correct signalling level is selected dynamically based on the power sup-
ply voltage on the DVDD-IO pin in the 48QFP package. The 40QFN package allows for 3.3V HDA
signalling.
1.2. Orderable Part Numbers
92HD73E1X5PRGXB2X*
48QFP
92HD73E1X5PRGXC1X
92HD73E1T5PRGIC1X
92HD73E2X5NDGXC1X
48QFP, Industrial Temp
40QFN
* limited quantities of the B2 available, contact IDT sales.
Add an “8” to the end for tape and reel delivery.
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Ten Channel HD Audio Codec
1.3. Detailed Description
1.3.1.
Port Functionality
Multi-function (Input / output) ports allow for the highest possible flexibility. 8 bi-directional ports (3
headphone capable) support a wide variety of consumer desktop and mobile system use models.
Port
Input
Output
Headphone
Mic Bias
(Vref pin)
Input
boost amp
Yes
CD
1
(pseudo differential)
A
B
C
D
E
F
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
G
H
Yes
Yes
CD (Port I)
SPDIF_OUT0
SPDIF_OUT1
SPDIF_IN
DMIC0
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
DMIC1
Table 1. Port Functionality
1
Note : 40dB boost requires using the IDT driver. When the 40dB mic boost feature is enabled, addi-
tional gain increases greater than 6dB may result in significant audio quality degradation of the
microphone audio input. In particular, when the 40dB MIC boost is active, the SNR, THD+N and DC
offset will significantly degrade regardless of the input signal level.
1.3.2.
Port Characteristics
Universal (Bi-directional) jacks are supported on all ports except the CD input. Ports A, B, and D are
designed to drive a set of 32 ohm (nominal) headphones or a 10K (nominal) load with on board
shunt resistance as low as 20K ohms (typical - used to maintain coupling CAP bias.) Line Level out-
puts are intended to drive an external 10K speaker load (nominal) and an on board shunt resistor of
20K-47K (nominal). However, applications may support load impedances of 5K ohms and above.
Input ports are 47K (nominal) at the pin.
DAC full scale output and intended full scale input levels are 1V rms. Line output ports and Head-
phone output ports on 92HD73E may be configured for +3dBV full scale output levels by using a
vendor specific verb.
Output ports are always on to prevent pops/clicks associated with charging and discharging output
coupling capacitors. This maintains proper bias on output coupling caps even in D3 as long as AVDD
is available. Unused ports should be left unconnected. When updating existing designs to use the
92HD73E, ensure that there are no conflicts between the output ports on 92HD73E and existing cir-
cuitry.
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92HD73E
92HD73E
Ten Channel HD Audio Codec
AFG Power
Input Enable
Output Enable
Mute
Port Behavior
State
1
1
0
0
1
0
1
1
-
-
Not allowed. Port becomes input.
Active - port enabled as input
0
1
Active - port enabled as output
D0-D2
Mute - port enabled as output but drives silence
Inactive - Port keeps coupling caps charged (same
as mute.)
0
0
-
-
-
Inactive (lower power) - Port keeps output coupling
caps charged but consumes less power.
D3
Table 2. Analog I/O Port Behavior
1.3.3.
Jack Detect
Plugs inserted to a jack on Ports A, B, C, & D are detected using SENSE_A. Plugs inserted to a jack
on Ports E, F, G, and H are detected using SENSE_B. The following table summarizes the proper
resistor tolerances for different analog supply voltages.
SENSE_C, is different from SENSE_A and SENSE_B. Because SENSE_C only determines the
presence of a plug for the CD port (port I), SENSE_C is a simple digital input pin referenced to the
analog supply. An internal pull-up resistor is provided. No external resistors are needed (jack switch
shorts to ground when a plug is inserted.) If external components are added, or if the pin is driven by
a logic gate, care should be taken to ensure that the pin voltage is above 70% of AVDD when no
plug is in the jack and less than 30% AVDD when a plug is inserted.
Resistor Tolerance
SENSE_A
(If port D used)
Resistor Tolerance
SENSE_A
(If port D is not used)
Resistor Tolerance
SENSE_B
(If port H used)
Resistor Tolerance
SENSE_B
(If port H is not used)
AVdd Nominal
Voltage (+/- 5%)
5V
4.75V
4V
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
0.50%
0.10%
0.50%
0.10%
3.3V
Table 3: SENSE Resistor Tolerance
See reference design for more information on Jack Detect implementation.
1.3.4.
SPDIF Output
All SPDIF Outputs can operate at 44.1kHz, 48kHz, 88.2kHz, 96kHz, 176.4KHz, and 192KHz as
defined in the Intel High Definition Audio Specification with resolutions up to 24 bits. This insures
compatibility with all consumer audio gear and allows for convenient integration into home theater
systems and media center PCs.
A second independent SPDIF Output is provided as an option for WLP compliant HDMI and SPDIF
outputs, available only of 48QFP package. Its function is identical to the primary SPDIF output.
Note: Peak to peak jitter is currently limited to less than 4.5nS (half of the internal master clock cycle)
which does not meet the IEC-60958-3 0.05UI requirement at 192KHz.
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Ten Channel HD Audio Codec
The two SPDIF output converters can not be aligned in phase with the DACs. Even when attached
to the same stream, the two SPDIF output converters may be misaligned with respect to their frame
boundaries.
SPDIF Outputs on pins 48 and 40 are outlined in tables below. Pin 47 behavior table resides in the
EAPD section
AFG Power
State
Converter Dig
RESET#
Output Enable
Stream ID
Pin Behavior
Enable
Hi-Z (internal pull-down enabled)
immediately after power on,
otherwise the previous state is
retained until the rising edge of
RESET#
D0-D3
Asserted (Low)
-
-
-
De-Asserted (High)
De-Asserted (High)
Disabled
Enabled
-
-
-
Hi-Z (internal pull-down enabled)
Active - Pin drives 0 (internal
pull-down NA)
Disabled
Active - Pin drives SPDIF-format,
but data is zeroes (internal
pull-down NA)
D0
De-Asserted (High)
Enabled
Enabled
0
Active - Pin drives SPDIFOut0
data (internal pull-down NA)
De-Asserted (High)
De-Asserted (High)
De-Asserted (High)
De-Asserted (High)
Enabled
Disabled
Enabled
-
Enabled
1-15
-
-
-
-
-
-
Hi-Z (internal pull-down enabled)
D1-D2
D3
Active - Pin drives 0 (internal
pull-down NA)
Hi-Z (internal pull-down enabled)
Table 4. SPDIF OUT 0 (Pin 48) Behavior
AFG Power
State
GPIO 3
Enable
Output
Enable
Converter
Dig Enable
RESET#
Stream ID
Pin Behavior
Hi-Z (internal pull-down enabled)
immediately after power on,
otherwise the previous state is
retained until the rising edge of
RESET#
D0-D3
D0-D3
Asserted (Low)
-
-
-
-
-
Active - Pin reflects GPIO7
configuration (internal pull-up
enabled)
De-Asserted (High)
Enabled
-
-
De-Asserted (High)
De-Asserted (High)
Disabled
Disabled
Disabled
Enabled
-
-
-
Hi-Z (internal pull-down enabled)
Active - Pin drives 0 (internal
pull-down enabled)
Disabled
Active - Pin drives SPDIF-format,
but data is zeroes (internal
pull-down enabled)
D0
De-Asserted (High)
De-Asserted (High)
Disabled
Disabled
Enabled
Enabled
Enabled
Enabled
0
Active - Pin drives SPDIFOut1
data (internal pull-down enabled)
1-15
Table 5. SPDIF OUT 1 (Pin 40) Behavior
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92HD73E
92HD73E
Ten Channel HD Audio Codec
AFG Power
RESET#
State
GPIO 3
Enable
Output
Enable
Converter
Dig Enable
Stream ID
Pin Behavior
De-Asserted (High)
Disabled
Disabled
Disabled
Disabled
Enabled
-
-
-
-
-
-
-
Hi-Z (internal pull-down enabled)
D1-D2
Active - Pin drives 0 (internal
pull-down NA)
De-Asserted (High)
D3
De-Asserted (High)
Hi-Z (internal pull-down enabled)
Table 5. SPDIF OUT 1 (Pin 40) Behavior
1.3.5.
SPDIF Input
SPDIF IN can operate at 44.1 KHz, 48 KHz, 88.2 KHz or 96 KHz, and implements internal Jack
Sensing.
A sophisticated digital PLL allows automatic rate detection and accurate data recovery. The ability to
directly accept consumer SPDIF voltage levels eliminates the need for costly external receiver ICs.
Advanced features such as record-slot-select and SPDIF_IN routing to the DAC allow for simultane-
ous record and play.
1.3.6.
Analog Mixer
An analog mixer is available on the 92HD73E. The mixer supports independent gain (-34.5 to +12dB
in 1.5dB steps) on each input as well as independent mutes on each input. A master volume follows
mixing and provides gain from -46.5dB to 0dB in 1.5dB steps.
The following inputs are available:
•
•
•
•
•
•
CD
Analog PC_Beep
Inport0_Mux
Inport1_Mux
Inport2_Mux
Inport3_mux
1.3.7.
Input Multiplexers
92HD73E implements 4 port input multiplexers. These multiplexers allow a preselection of one of
four possible inputs:
Inport0_Mux
Port A
Inport1_Mux
Port A
Inport2_Mux
Port B
Inport3_mux
DAC 0
Port B
Port E
Port C
DAC 1
Port D
Port G
Port G
DAC 2
Port F
Port H
Port H
DAC 3
Table 6. Input Multiplexers
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92HD73E
Ten Channel HD Audio Codec
1.3.8.
ADC Multiplexers
92HD73E implements 2 ADC input multiplexers. These multiplexers incorporate the ADC record
gain function (0 to +22.5dB gain in 1.5dB steps) as an output amp and allow a preselection of one of
12 possible inputs:
•
•
•
•
•
DMIC 0 (not on 40QFN)
DMIC 1 (not on 40QFN)
Mixer output
CD input
Ports A - H
1.3.9.
Power Management
The HD Audio specification defines power states, power state widgets, and power state verbs.
Power management is implemented at several levels. The Audio Function Group (AFG) and all con-
verter widgets support the power state verb F05/705 (as well as the pin widget associated with pin
47.) Converter widgets are active in D0 and inactive in D1-D3.
The following table describes what functionality is active in each power state supported by the AFG.
D11
Off
Off
Off
Off
Off
Off
Off
Off
Off
On
On
On
On
On
On
On
On
On
On
On
On
On
On
Function
D0
D2
D3
vendor specific
SPDIF Outputs
SPDIF Inputs
Digital Microphone inputs
DAC
On
On
On
On
On
On
On
On
On
On
On
On
On
On
On
On
On
On
On
On
On
On
On
Off
Off
Off
Off
Off
Off
Off
Off
Off
On
Off
Off
Off
Off
Off
On
On
On
On
On
On
On
On
Off
Off
-
-
-
-
-
-
-
-
-
-
-
-
-
Off
Off
D2S
Off
ADC
Off
ADC Volume Control
Ref ADC
Off
Off
Analog Clocks
GPIO pins
Off
On
VrefOut Pins
Input Boost
Off
Off
Analog mixer
Mixer Volumes
Analog PC_Beep
Digital PC_Beep
Lo Amp
Off
Off
Off
On
-
Low Drive2
Low Drive2
Low Drive3
On4
On
Programmable
Programmable
Programmable
Programmable
Programmable5
Programmable5
-
HP Amps
VAG amp
Port Sense
Reference Bias generator
Reference Bandgap core
HD Audio-Link
On
On6
Table 7. Function state vs. AFG power state
1.No DAC or ADC streams are active. Analog mixing and loop thru are supported.
2.VAG is kept active when ports are disabled or in D2/D3. Ports may be powered down using vendor specific verbs.
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3.VAG is always ramped up and down gradually, except in the case of a sudden power removal. VAG is active in D2/D3 but in
a low power state.
4. BITCLK must be active and both AVDD and DVDD must be available for Port Sense to operate.
5.Vendor specific bit for Ref Top controls VAG generator, Bandgap Reference, and Reference bias generator. Place part into
D3 and power down all ports (using vendor specific verbs) before powering down Ref Top.
6.Obviously not active if BITCLK is not running (Controller in D3).
1.3.9.1.
AFG D0
The AFG D0 state is the active state for the device. All functions are active if their power state (if they
support power management at their node level) has been set to D0.
1.3.9.2.
AFG D1
D1 is a lower power mode where all converter widgets are disabled. Analog mixer and port functions
are active.
1.3.9.3.
AFG D2
The D2 state further reduces power by disabling the mixer and port functions. The port amplifiers
and internal references remain active to keep port coupling caps charged and the system ready for a
quick resume to either the D1 or D0 state.
1.3.9.4.
AFG D3
The D3-default state is available for HD Audio compliance. All converters are shut down. Port ampli-
fiers and references are active but in a low power state to prevent pops. Resume times may be lon-
ger than those from D2, but still very fast to meet Intel low power goals.
The traditional use for D3 was as a transitional state before power was removed (D3 cold) before the
system entered into standby, hibernate, or shut-down. To conserve power, Intel now promotes using
D3 whenever there are no active streams or other activity that requires the part to consume full
power. The system remains in S0 during this time. When a stream request or user activity requires
the CODEC to become active, the driver will immediately transition the CODEC from D3 to D0. To
enable this use model, the CODEC must resume within 10mS and not pop.
The default power state for the Audio Function Group after reset is D3-default
1.3.9.5.
AFG D3 and vendor specific verbs
The programmable values, exposed via vendor-specific settings, are under the IDT Device Driver
control for further power reduction.
1.3.10. Low-voltage HDA Signaling
The 92HD73E is compatible with either 1.5V or 3.3V HDA bus signaling; the voltage selection is
done dynamically based on the input voltage of DVDD_IO on the 48QFP package. The 40QFN
allows for 3.3V only.
When in 1.5V mode, the 92HD73E can correctly decode BITCLK, SYNC, RESET# and SDO as they
operate at 1.5V; additionally it will drive SDI and SDO at 1.5V. None of the GPIOs are affected, as
they always function at their nominal voltage (DVDD or AVDD).
1.3.11. Multi-channel capture
The capability to assign multiple ADC “Input Converters” to the same stream is supported to meet
the microphone array requirements of Vista and future operating systems. Single converter streams
are still supported and is done by assigning unique non zero Stream IDs to each converter. All cap-
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ture devices (ADCs 0 and 1) may be used to create a multi-channel input stream. There are no
restrictions regarding digital microphones. However, the SPDIF input can not be used with an ADC
to create a 4-channel stream. SPDIF_In only supports stereo capture.
The ADC Converters can be associated with a single stream as long as the sample rate and the bits
per sample are the same. The assignment of converter to channel is done using the “CnvtrID” widget
and is restricted to even values. The ADC converters will always put out a stereo sample and there-
fore require 2 channels per converter.
The stream will not be generated unless all entries for the targeted converters are set identically, and
the total number of assigned converter channels matches the value in the NmbrChan field. These
are listed the “Multi-Converter Stream Critical Entries” table.
An example of a 4 Channel Steam with ADC0 supplying channels 0&1 and ADC1 supplying chan-
nels 2&3 is shown below. A 4 Channel stream can be created by assigning the same non-zero
stream id “Strm= N” to both ADC0 and ADC1. The sample rates must be set the same and the num-
ber of channels must be set to 4 channels “NmbrChan = 0011”.
ADC1 CnvtrID
ADC0 CnvtrID
(NID = 0x08)
[3:0]
Ch = 2
Ch = 0
(NID = 0x07)
[3:0]
Table 8: Example channel mapping
ADC0.CnvrtID.Channel = 0
ADC1.CnvrtID.Channel = 2
Data
Length
ADC0
Left Channel
ADC0
Right Channel
ADC1
Left Channel
ADC1
Right Channel
Stream ID
Stream ID
ADC0.CnvrtID.Channel = 2
ADC1.CnvrtID.Channel = 0
Data
Length
ADC1
Left Channel
ADC1
Right Channel
ADC0
Left Channel
ADC0
Right Channel
Figure 1. Multi-channel capture
The following figure describes the bus waveform for a 24-bit, 48KHz capture stream with ID set to 1.
BITCLK
SDI
ADC0
L23
ADC0
L0
ADC0
R23
ADC0
R0
ADC1
L23
ADC1
L0
ADC1
R23
ADC1
R0
0
0
1
0
1
1
0
0
0
0
STREAM ID
DATA LENGTH
LEFT
RIGHT
LEFT
RIGHT
STREAM TAG
ADC0
ADC1
DATA BLOCK
Figure 2. Multi-channel timing diagram
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ADC[1:0] Cnvtr
Bit Number
Sub Field Name
StrmType
Description
Stream Type (TYPE):
[15]
0: PCM
1: Non-PCM (not supported)
Sample Base Rate
0= 48kHz
1=44.1KHz
[14]
FrmtSmplRate
SmplRateMultp
Sample Base Rate Multiple
000=48kHz/44.1kHz or less
001= x2
010= x3 (not supported)
011= x4
[13:11]
100-111= Reserved
Sample Base Rate Divisor
000= Divide by 1
001= Divide by 2 (not supported)
010= Divide by 3 (not supported)
011= Divide by 4 (not supported)
100= Divide by 5 (not supported)
101= Divide by 6 (not supported)
110= Divide by 7 (not supported)
111= Divide by 8 (not supported)
[10:8]
SmplRateDiv
Bits per Sample
000= 8 bits (not supported)
001= 16 bits
010= 20 bits
011= 24 bits
[6:4]
[3:0]
BitsPerSmpl
NmbrChan
100-111= Reserved
Number of Channels
Number of channels for this stream in each “sample
block” of the “packets” in each “frame” on the link.
0000=1 channel (not supported)
0001 = 2 channels
…
1111= 16 channels.
ADC[1:0] CnvtrID
Bit Number
Sub Field Name
Description
Software-programmable integer representing link
stream ID used by the converter widget. By
convention stream 0 is reserved as unused.
[7:4]
[3:0]
Strm
Integer representing lowest channel used by
converter.
0 and 2 are valid Entries
If assigned to the same stream, one ADC must be
assigned a value of 0 and the other ADC assigned a
value of 2.
Ch
Table 9: Multi-Converter Stream Critical Entries.
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1.3.12. EAPD
The EAPD pin also supports SPDIF_In and GPIO functions. The pin defaults to EAPD after power
on reset and will remain in EAPD mode until either GPIO is enabled for pin 47 or the port I/O is
enabled to support SPDIF. Although named External Amplifier Power Down (EAPD) by the HD
Audio specification, this pin operates as an external amplifier power up signal. The EAPD value is
reflected on the EAPD pin; a 1 causes the external amplifier to power up, and a 0 causes it to power
down. When the EAPD value = 1, the EAPD pin must be placed in a state appropriate to the current
power state of the associated Pin Widget even though the EAPD value may remain 1. The default
state of this pin is 0 (driving low) and a Pull-down prevents the line from floating high when the part is
in reset.
AFG Power
State
EAPD Power
RESET#
GPIO Enable
Input Enable
Pin Behavior
State
Hi-Z (internal pull-down enabled)
immediately after power on,
otherwise the previous state is
retained until the rising edge of
RESET#
D0-D3
Asserted (Low)
-
-
-
Active - Pin reflects GPIO0
configuration (internal pull-up
enabled)
De-Asserted (High)
De-Asserted (High)
De-Asserted (High)
Enabled
Disabled
Disabled
-
-
-
Enabled
Disabled
Active - Pin is SPDIF_In
D0
Active - Pin drives the value of the
EAPD bit (internal pull-down
enabled)
D0-D1
De-Asserted (High)
De-Asserted (High)
Disabled
Disabled
Disabled
Enabled
D2-D3
-
Hi-Z (internal pull-down enabled)
Inactive - Pin configured as input,
but SPDIF_In idle.
Active - Pin drives the value of the
EAPD bit (internal pull-down
enabled)
D1
De-Asserted (High)
Disabled
Disabled
D0-D1
De-Asserted (High)
De-Asserted (High)
De-Asserted (High)
Disabled
Disabled
Disabled
Disabled
D2-D3
D0-D3
D0-D3
Hi-Z (internal pull-down enabled)
Hi-Z (internal pull-down enabled)
Hi-Z (internal pull-down enabled)
D2
D3
-
-
Table 10. EAPD Behavior
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SPKR R+
SPKR R-
Audio R
Audio
Input R
Input
L
L
SPKR L+
SPKR L-
CODEC
EAPD
SHUTDOWN
OR
SPKR R+
SPKR R-
Audio R
Input R
Audio
L
Input L
SPKR L+
SPKR L-
CODEC
EAPD
MUTE
Figure 3. EAPD
1.3.13. Digital Microphone Support (on 48QFP package)
The digital microphone interface permits connection of a digital microphone(s) to the CODEC via the
DMIC0, DMIC1, and DMIC_CLK 3-pin interface. The DMIC0 and DMIC1 signals are inputs that carry
individual channels of digital Mic data to the ADC. In the event that a single microphone is used, the
data is ported to both ADC channels.
The DMIC_CLK output is controllable from 4.704Mhz, 3.528Mhz, 2.352Mhz, 1.176Mhz and is syn-
chronous to the 24Mhz internal clock. The default frequency is 2.352Mhz.
The two DMIC data inputs are reported as two stereo input pin widgets that incorporate a boost
amplifier. The pin widgets are shown connected to the ADCs through the same multiplexors as the
analog ports. Although the internal implementation is different between the analog ports and the dig-
ital microphones, the functionality is the same. In most cases, the default values for the DMIC clock
rate and data sample phase will be appropriate and an audio driver will be able to configure and use
the digital microphones exactly like an analog microphone.
92HD73E supports the following digital microphone configurations:
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Digital Mics
Data Sample
ADC Conn.
Notes
0
N/A
N/A
No Digital Microphones
Available on either DMIC_0 or DMIC_1
Both ADC Channels produce data, may be in phase or out by 1/2 DMIC_CLK
period depending upon external configuration and timing
1
2
Single Edge
0, or 1
0, or 1
Available on either DMIC_0 or DMIC_1, External logic required to support
sampling on a single Digital Mic pin channel on rising edge and second Digital Mic
right channel on falling edge of DMIC_CLK for those digital microphones that don’t
support alternative clock edge capability. If both DMIC_0 and DMIC_1 are used to
support 2 digital microphones, 2 separate ADC units will be used, however, this
configuration is not recommended since it consumes two stereo ADC resources.
Double Edge on
either DMIC_0 or 1
OR
Single Edge on
DMIC_0 and 1
Requires both DMIC_0 or DMIC_1, External logic required to support sampling on
a single Digital Mic pin channel on rising edge and second Digital Mic right
channel on falling edge of DMIC_CLK for those digital microphones that don’t
support alternative clock edge capability. Two ADC units are required to support
this configuration
Double Edge on
one DMIC pin and
Single Edge on the
second DMIC pin.
3
4
0, or 1
0, or 1
Connected to DMIC_0 and DMIC_1, External logic required to support sampling
on a single Digital Mic pin channel on rising edge and second Digital Mic right
channel on falling edge of DMIC_CLK for those digital microphones that don’t
support alternative clock edge capability. Two ADC units are required to support
this configuration
Double Edge
Table 11. Valid Digital Mic Configurations
DMIC Widget
Enabled
DMIC_CLK
Output
Power State
DMIC_0,1
Notes
DMIC_CLK Output is Enabled when either DMIC_0 or DMIC_1
Input Widget is Enabled. Otherwise, the DMIC_CLK remains Low
D0
Yes
Clock Capable
Input Capable
D1-D3
D0-D3
Yes
No
Clock Disabled Input Disabled
Clock Disabled Input Disabled
DMIC_CLK is HIGH-Z with Weak Pull-down
DMIC_CLK is HIGH-Z with Weak Pull-down
Table 12. DMIC_CLK and DMIC_0,1 Operation During Power States
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Off-Chip
On-Chip
DMIC_0
OR
DMIC_1
Digital
Microphone
Single Line In
Stereo Channels
Output
D
Q
STEREO
ADC0 or 1
PCM
Pin
CK
DMIC_CLK
Pin
On-Chip
Multiplexer
DMIC_0
Or
Valid Data
Valid Data
Valid Data
DMIC_1
Right
Left
Channel Channel
DMIC_CLK
Figure 4: Mono Digital Microphone (data is ported to both left and right channels)
Off-Chip On-Chip
External
Multiplexer
Digital
On-Chip
Multiplexer
Microphones
DMIC_0
Or
DMIC_1
Stereo Channels
Output
STEREO
ADC0 or 1
PCM
Pin
DMIC_CLK
Pin
DMIC_0
Valid
Data R
Valid
Data L
Valid
Data R
Valid
Data L
Valid
Data R
Or
DMIC_1
Right
Left
Channel Channel
DMIC_CLK
Figure 5: Stereo Digital Microphone Configuration
Note: Some Digital Microphone Implementations support data on either edge, therefore, the external
mux may not be required.
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Off-Chip
On-Chip
Digital
Microphones
External
Multiplexer
On-Chip
Multiplexer
Stereo Channels
Output For
DMIC_0
DMIC_0 L&R
STEREO
ADC0
Pin
PCM
DMIC_CLK
Pin
On-Chip
Multiplexer
Stereo Channels
Output For
DMIC_1 L&R
DMIC_1
Pin
STEREO
ADC1
PCM
External
Multiplexer
Digital
Microphones
Valid
Valid
Valid
Valid
Valid
Data R0
Data L0
Data R0
Data L0
Data R0
DMIC_0
DMIC_1
Valid
Data R1
Valid
Data L1
Valid
Data R1
Valid
Data L1
Valid
Data R1
Right
Left
Right
Left
Channel
Channel Channel Channel
DMIC_CLK
Figure 6: Quad Digital Microphone Configuration
Note: Some Digital Microphone Implementations support data on either edge, therefore, the external
mux may not be required.
1.3.14. PC-Beep
92HD73E supports both analog and digital PC_Beep functions.
1.3.14.1. Analog PC-Beep
92HD73E does not support automatic routing of the PC_Beep pin to all outputs when the link is in
reset. Analog PC-Beep may be supported during Link Reset if the mixer is manually configured for
pass-thru. Otherwise, Reset# must be high and Bit_Clk active.
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The default values for the vendor specific verb (7EE/FEE in AFG) associated with Analog PC-Beep
are:
•
•
Enable = 0h (Analog PC-Beep disabled - mute)
volume = 3h (0dB)
Analog PC-Beep is supported in D3, but may be attenuated or distorted depending on the load-
impedance on the port. Line outputs can drive 10K ohm loads in D3 at 1Vrms, but will be current lim-
ited when driving lower impedance loads. Enabling or disabling analog PC-Beep may cause a click
or pop sound.
1.3.14.2. Digital PC-Beep
This block uses an 8-bit divider value to generate the PC beep from the 48kHz Azalia sync pulse.
The digital PC_Beep block generates the beep tone on all Pin Complexes that are currently config-
ured as outputs. The HD Audio spec states that the beep tone frequency = (48kHz HD Audio SYNC
rate) / (4*Divider), producing tones from 47 Hz to 12 kHz (logarithmic scale). Other audio sources
are disabled when digital PC_Beep is active.
It should be noted that digital PC Beep is disabled if the divider = 00h.
1.3.15. Headphone Drivers
This product implements a +3dBV output option on headphone capable ports. (HP output and line
output levels are defined as 1Vrms at this time with an option to enable +3dBV FSOV using a vendor
specific verb.) The Microsoft Windows Logo Program allows up to the equivalent of 100ohms in
series. However, an output level of +3dBV at the pin is required to support 300mV at the jack with a
32ohm load and 1V with a 320 ohm load. Microsoft allows device and system manufactures to limit
output voltages to address EU safety requirements. (WLP 3.09 - please refer to the latest Windows
Logo Program requirements from Microsoft.) 92HD73E, however, requires external components
(series resistors) to limit the output voltage to 150mV with a 32 ohm load or secure software limiting
by restricting DAC and mixer gain ranges.
Although 3 Headphone amplifiers are present, only two may be used simultaneously.
Performance will degrade when driving more than one set of headphones. Only one set of head-
phones (32 ohm nominal) may be connected to a headphone capable port.
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1.3.16. GPIO
1.3.16.1. GPIO Pin mapping and shared functions.
GPIO
#
SPDIF
In
SPDIF
Out
Pull
Up
Pull
Down
Supply
GPI/O
GPI
GPO VrefOut DMIC
VOL
50K1
(SPDIF/EA
PD)
50K
(GPIO)
0
DVDD
YES
YES
50K
(GPIO/VOL)
50K
(DMIC)
1
2
DVDD
DVDD
YES
YES
CLK
IN
YES
YES
50K
(GPIO/VOL)
50K
(DMIC)
50K
(GPIO)
50K1
(SPDIF)
3
4
5
AVDD
AVDD
AVDD
YES
YES
YES
YES
YES
50K
(DMIC)
IN
50K1
6
7
AVDD
AVDD
YES
YES
YES
YES
Table 13. GPIO Pin mapping
1.Default condition.
1.3.16.2. Volume/Digital Microphone/GPIO Selection
There are 3 functions available on pins 2 and 4. To determine which function is actually enabled on
the 2 pins, the order of precedence is followed:
1. If the GPIOs are enabled, they override both Volume Control and Digital Mics
2. If the GPIOs are not enabled through the AFG, then at reset, the Volume control is enabled with
the weak pull-up.
3. If BIOS or other software application enables either Digital Microphones inputs through the Con-
figuration Default Register, the Volume is disconnected and the pull-ups are disconnected with
the weak pull-downs enabled.
1.3.16.3. VRefOut/GPIO Selection
Two functions are available on pins 29, 31, and 37. To determine which function is actually enabled,
the order of precedence is followed:
1. If the GPIOx function is enabled, it overrides VRefOut-X
2. If the GPIO function is not enabled through the AFG, then the VrefOut function is enabled and in
its default state.
3. If using a VrefOut pin as GPIO, make sure to incorporate a 10K ohm external pull-up to AVDD to
prevent the pin from floating in GPI mode and to allow proper operation in open-drain GPO
mode.
1.3.17. External Volume Control (on 48QFP package)
92HD73E incorporates a 2-pin volume control interface. Volume up, down, and mute functions are
easily implemented using 2 push-button switches. The CODEC provides internal pull-up resistors
simplifying external CODEC circuitry. Also, repeat and direct modes of operation add flexibility to the
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interface. The typical usage model is for front panel master volume buttons on an entertainment PC,
or case mounted hardware volume control for mobile platforms.
1.3.17.1. Theory of Operation
The codec monitors the volume up/down inputs for a change of state from high to low, and waits for
the inputs to settle. If the inputs have not settled by the end of the de-bounce period, then the value
at the end of the period is used. A 0 (low voltage) on the Down pin will decrement the volume regis-
ter, while a 0 on the Up pin will increment the volume register. If both inputs are 0 at the same time,
then the volume register will be set to its lowest value (mute). Pressing Up, Down, or both buttons at
the same time when the volume control interface is in mute mode, will cause the part to un-mute.
The de-bounce / repeat rate is selectable from 2.5Hz to 20Hz in 2.5Hz increments using the Volume
Knob VCSR0 verb (FE0) Rate bits (bits 2:0). This value is used for both de-bounce and repeat rates.
The de-bounce period is the time that the CODEC waits for the inputs to settle, and the repeat rate is
the rate at which the CODEC will increment/decrement the volume if a volume button is pushed and
held. When a falling edge is detected on either one of the volume control pins, the codec will wait for
(1/Rate) seconds for the input to settle. If the Continuous bit is set in the Volume Knob VCSR0 verb
(bit 3), then the codec will wait for the de-bounce period to expire then repeatedly increment or dec-
rement the volume register at the rate specified in the Rate bits until the button is released.
1.3.17.2. Modes of Operation
•
DIRECT MODE
In Direct mode, the Volume Knob widget directly controls the volume of all of the DACs in the part.
The volume in the Volume Knob widget acts as the master volume and limits the maximum volume
for each of the DAC amplifiers. The amp gain for each of the DACs can also be adjusted using the
DAC amplifiers. However, the actual gain for an individual DAC will be the sum of the Volume Knob
volume and the DAC amplifier volume. For example, if the DAC amplifier gain is set to 0x7F (0dB)
and the Volume Knob volume is set to 0x3F (-48dB) the resulting gain would be -48dB. If the combi-
nation of gains is less than -95.25dB (the equivalent to a value of 0x0 for the DAC or Volume Knob
volume settings) then the actual gain will be -95.25dB. For example, if the Volume Knob is set to
0x3F (-48dB) and the DAC amplifier volume is set to 0x1F (-72dB) then the DAC volume will be set
to -95.25dB.
Direct mode is enabled by setting bit 7 in the Volume Knob Cntrl verb (F0F). The volume is reflected
in the Volume Knob Cntrl bits 6:0 and the step size is 0.75dB. In direct mode, software can read or
write the volume in the Volume Knob widget.
•
INDIRECT MODE
In indirect mode, the Volume Knob widget does not directly control the DAC amplifier gains. An
event on the volume Up/Down pins will increment/decrement the value in the Volume Knob Cntrl
verb (F0F) volume bits (bits 6:0) just as in Direct mode. However, instead of adjusting the DAC
amplifier gain, an unsolicited response is generated (if enabled) and the control software must read
the volume in the Volume Knob widget and take appropriate action. Indirect mode is particularly use-
ful when it is undesirable to control all of the DAC amplifier volumes at the same time, or when imple-
menting ADC volume control.
In indirect mode, there are only 128 volume levels in the Volume Knob Cntrl volume bits, the value
will not go beyond the lower and upper limits (0x0 or 0x7F), and an unsolicited response will be gen-
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erated if an input event tries to go beyond these limits. Therefore, it is the responsibility of the con-
trolling software to monitor the volume in the Volume Knob Widget and take appropriate action.
Indirect mode is enabled by clearing bit 7 in the Volume Knob Cntrl verb (F0F). The volume is
reflected in the Volume Knob Cntrl bits 6:0 and the step size is 0.75dB. In direct mode, software can
read or write the volume in the Volume Knob widget.
1.3.17.3. Hardware Implementation
The Volume Knob interface is comprised of two input pins, CODEC pins 2 and 4. Both pins have
internal pull-up resistors, so only two push button switches are required for most implementations.
Typically, a series resistor and shunt capacitor are used to help reduce noise and prevent damage
from ESD and other potential faults. An example circuit is shown below in below.
Figure 7: External Volume Control Circuit
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2. CHARACTERISTICS
2.1. Electrical Specifications
2.1.1.
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the 92HD73E. These rat-
ings, which are standard values for IDT commercially rated parts, are stress ratings only. Functional
operation of the device at these or any other conditions above those indicated in the operational sec-
tions of the specifications is not implied. Exposure to absolute maximum rating conditions for
extended periods can affect product reliability. Electrical parameters are guaranteed only over the
recommended operating temperature range.
Item
Pin
Maximum Rating
Analog maximum supply voltage
Digital maximum supply voltage
VREFOUT output current
AVdd
DVdd
6 Volts
5.5 Volts
5 mA
Voltage on any pin relative to ground
Vss - 0.3 V to Vdd + 0.3 V
0 oC to +70 oC
Operating temperature
Storage temperature
Soldering temperature
-40 oC to +85oC (INDUSTRIAL TEMP for 92HD73E1T only)
-55 oC to +125 oC
Soldering temperature information for all available in the package
section of this datasheet.
Table 14. Electrical Specification: Maximum Ratings
2.1.2.
Recommended Operating Conditions
Parameter
Min.
3.135
4.75
0
Typ.
3.3
5
Max.
3.465
5.25
+70
Units
V
Power Supply Voltage
Digital - 3.3 V
Analog - 5 V
V
Ambient Operating Temperature
Case Temperature
°C
°C
°C
°C
Tcase (48-QFP)
Tcase (40-QFN)
Tcase Industrial
+90
+95
+110
Table 15. Recommended Operating Conditions
ESD: The 92HD73E is an ESD (electrostatic discharge) sensitive device. The human body and test equipment can
accumulate and discharge electrostatic charges up to 4000 Volts without detection. Even though the 92HD73E implements
internal ESD protection circuitry, proper ESD precautions should be followed to avoid damaging the functionality or
performance.
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2.2. 92HD73E Analog Performance Characteristics
(Tambient = 25 ºC, AVdd = Supply ± 5%, DVdd = 3.3V ± 5%, AVss=DVss=0V; 20Hz to 20KHz swept
sinusoidal input; Sample Frequency = 48 kHz; 0 dB = 1 VRMS, 10KΩ//50pF load, Testbench Char-
acterization BW: 20 Hz – 20 kHz, 0 dB settings on all gain stages)
Conditions
AVdd
Parameter
Digital to Analog Converters
Resolution
Min
Typ
Max
Unit
All
5V
5V
5V
24
94
97
83
Bits
dB
Dynamic Range1: PCM to All Analog
Outputs
-60dB FS signal level
90
90
80
SNR2 - DAC to All Line-Out Ports
THD+N3 - DAC to All Line-Out Ports
Analog Mixer Disabled, PCM data
dB
Analog Mixer Disabled, 0dB FS
Signal, PCM data
dBr
THD+N3 - DAC to All Line-Out Ports
SNR2 - DAC to All Headphone Ports
THD+N3 - DAC to All Headphone Ports
THD+N3 - DAC to All Headphone Ports
SNR2 - DAC to All Headphone Ports
THD+N3 - DAC to All Headphone Ports
Analog Mixer Disabled,-1dB FS
Signal, PCM data
5V
5V
5V
5V
5V
5V
5V
80
90
80
80
90
65
65
83
97
83
83
97
70
70
dBr
dB
Analog Mixer Disabled, 10KΩ load,
PCM data
Analog Mixer Disabled, 0dB FS
Signal, 10KΩ load, PCM data
dBr
dBr
dB
Analog Mixer Disabled, -1dB FS
Signal, 10KΩ load, PCM data
Analog Mixer Disabled, 32Ω load,
PCM data
Analog Mixer Disabled, 0dB FS
Signal, 32Ω load, PCM data
dBr
dBr
THD+N3 - DAC to All Headphone Ports
Any Analog Input (ADC) to DAC Crosstalk
Analog Mixer Disabled, -1dB FS
Signal, 32Ω load, PCM data
10KHz Signal Frequency. 0dBV
signal applied to ADC, DACs idle,
ports enabled as output.
All
-
-
-80
-85
-
-
dB
Any Analog Input (ADC) to DAC Crosstalk
DAC L/R crosstalk
1KHz Signal Frequency
see above
All
All
dB
dB
DAC to LO or HP 20-15KHz into
65
65
70
70
10KΩ load
DAC L/R crosstalk
Gain Error
DAC to HP 20-15KHz into 32Ω load
Analog Mixer Disabled
All
All
All
All
All
All
All
dB
dB
dB
Hz
Hz
Hz
dB
0.5
Interchannel Gain Mismatch
Analog Mixer Disabled
0.5
D/A Digital Filter Pass Band4
D/A Digital Filter Transition Band
D/A Digital Filter Stop Band
20
-
-
-
-
21,000
21,000
31,000
-100
31,000
-
-
D/A Digital Filter Stop Band Rejection5
D/A Out-of-Band Rejection6
All
All
-55
-
-
-
-
dB
ms
Group Delay (48KHz sample rate)
1
Table 16. 92HD73E Analog Performance Characteristics
23
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©2011 INTEGRATED DEVICE TECHNOLOGY, INC.
92HD73E
92HD73E
Ten Channel HD Audio Codec
Conditions
AVdd
All
Parameter
Attenuation, Gain Step Size DIGITAL
DAC Offset Voltage
Min
Typ
0.75
10
Max
-
Unit
dB
-
-
-
All
20
10
mV
Deviation from Linear Phase
Analog Outputs
All
1
deg.
Full Scale All Line-Outs
DAC PCM Data
DAC PCM Data
5V
5V
1.00
2.83
1.07
3.03
-
-
Vrms
Vp-p
Full Scale All Line-Outs
All Headphone Capable Outputs
mW
(peak)
32Ω load
5V
All
40
60
-
Amplifier output impedance
Line Outputs
Headphone Outputs
150
0.1
Ohms
Analog inputs
Full Scale Input Voltage
0dB Boost @4.75V
(input voltage required for 0dB FS
output)
5V
1.05
1.10
-
Vrms
All Analog Inputs with boost
All Analog Inputs with boost
All Analog Inputs with boost
Input Impedance
10dB Boost
20dB Boost
30dB Boost
5V
5V
5V
All
All
0.31
0.10
0.03
-
-
-
-
-
-
-
-
Vrms
Vrms
Vrms
KΩ
-
50
15
Input Capacitance
-
pF
Analog Mixer
SNR2 - All Line-Inputs or DACs to A, B,
and D headphone capable outputs
Analog Mixer Enabled, 10KΩ load.
DAC playing silence, line inputs
driven by ATE. Gain set to 0dB
5V
5V
5V
5V
5V
5V
85
70
85
60
85
70
90
75
90
70
90
75
dB
dBr
dB
THD+N3 - All Line-Inputs or DACs to A, B,
and D headphone capable outputs
Analog Mixer Enabled, 0dB FS
Signal, 10KΩ load
SNR2 - All Line-Inputs or DACs to A, B,
and D headphone capable outputs
Analog Mixer Enabled, 32Ω load.
DAC playing silence, Line inputs
driven by ATE.
THD+N3 - All Line-Inputs or DACs to A, B,
and D headphone capable outputs
Analog Mixer Enabled, 0dB FS
dBr
dB
Signal, 32Ω load
SNR2 - DAC to All Line-Out Ports (C, E, F,
G, and H)
Analog Mixer Enabled, DACs playing
silence, line inputs driven by ATE.
Gain set to 0dB
THD+N3 - DAC to All Line-Out Ports (C, E,
F, G, and H)
Analog Mixer Enabled, 0dB FS
dBr
Signal, , 10KΩ load
Attenuation, Gain Step Size ANALOG
All
All
-
-
1.5
-
-
dB
Gain Drift7
100
ppm/ºC
Analog to Digital Converter
Resolution
All
5V
5V
24
90
90
Bits
dB
Dynamic Range1, All Analog Inputs to A/D
High Pass Filer Enabled, -60dB FS,
No boost
86
86
SNR2- All Analog Inputs to A/D
High Pass Filter enabled
dB
Table 16. 92HD73E Analog Performance Characteristics
24
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©2011 INTEGRATED DEVICE TECHNOLOGY, INC.
92HD73E
92HD73E
Ten Channel HD Audio Codec
Conditions
AVdd
Parameter
Min
Typ
Max
Unit
THD+N3 All Analog Inputs to A/D
High Pass Filter enabled, -1dB FS
signal level
5V
75
85
dBr
THD+N3 All Analog Inputs to A/D
High Pass Filter enabled, -3dB FS
signal level
5V
All
75
10
85
-
dBr
Hz
Analog Frequency Response8
30,000
A/D Digital Filter Pass Band4
A/D Digital Filter Transition Band
A/D Digital Filter Stop Band
All
All
All
All
All
20
21,000
31,000
-100
-
-
21,000
Hz
Hz
Hz
dB
ms
-
-
31,000
-
-
A/D Digital Filter Stop Band Rejection5
Group Delay
-90
-
48 KHz sample rate
1
Any unselected analog Input to ADC
Crosstalk
10KHz Signal Frequency
All
-65
-80
-85
-
-
dB
Any unselected analog Input to ADC
Crosstalk
1KHz Signal Frequency
All
All
All
All
All
-65
-65
-55
-
dB
dB
dB
dB
dB
ADC L/R crosstalk
Any selected input to ADC 20-15Khz
DAC to ADC crosstalk
DAC output 0dBFS. All outputs
loaded. Input to ADC open. 20-15Khz
Spurious Tone Rejection9
-100
1.5
-
-
Attenuation, Gain Step Size
(analog)
-
Gain Drift
All
All
-
-
100
-
-
ppm/ºC
dB
Interchannel Gain Mismatch ADC
Power Supply
0.5
Power Supply Rejection Ratio
Power Supply Rejection Ratio
10kHz
All
All
-
-
-60
-70
-
-
dB
dB
1kHz
10
Single 7.1 stream. No ADC or SPDIF
D0 (7.1 Playback)
Didd
Aidd
3.3V
5.0V
68
50
mA
mA
10
Single 2 channel stream. No ADC or
SPDIF
D0 (Stereo Playback)
Didd
Aidd
3.3V
5.0V
38
37
mA
mA
10
All converters enabled but no streams
playing
D0 (idle)
Didd
Aidd
3.3V
5.0V
55
72
mA
mA
10
Analog mixer active, all converters
and ports off
D1
D1 Didd
D1 Aidd
3.3V
5.0V
14
35
mA
mA
10
All converters, ports and mixer off
D2
Table 16. 92HD73E Analog Performance Characteristics
25
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©2011 INTEGRATED DEVICE TECHNOLOGY, INC.
92HD73E
92HD73E
Ten Channel HD Audio Codec
Conditions
AVdd
Parameter
D2 Didd
Min
Typ
14
Max
Unit
mA
3.3V
D2 Aidd
5.0V
28
mA
10
Anti-pop enabled
D3
D3 Didd
D3 Aidd
3.3V
3
mA
mA
5.0V
14
10
Per converter power consumption
Differential Power
One Stereo ADC Didd
One Stereo ADC Aidd
3.3V
5.0V
3.3V
5.0V
11
3
mA
mA
mA
mA
One Stereo DAC Didd
10
4
One Stereo DAC Aidd
Voltage Reference Outputs
VREFOut10
0.5 X
AVdd
All
All
-
-
V
V
VREFILT (VAG)
0.45 X
AVdd
Phased Locked Loop
PLL lock time
All
All
96
200
500
usec
psec
PLL (or HD Audio Bit CLK) 24MHz clock
jitter
150
ESD / Latchup
Latch-up
As described in JESD78A Class II
As described in JESD22-A114-B
As described in JESD22-C101
All
All
All
70
3K
1K
degC
ESD - Human Body Model
Charged Device Model
2K
V
V
500
Table 16. 92HD73E Analog Performance Characteristics
1.Dynamic Range is the ratio of the full scale signal to the noise output with a -60dBFS signal as defined in AES17 as SNR in the
presence of signal and outlined in AES6id, measured “A weighted” over 20 Hz to 20 kHz bandwidth
2.Ratio of Full Scale signal to idle channel noise output is measured “A weighted” over a 20 Hz to a 20 kHz bandwidth.
(AES17-1991 Idle Channel Noise or EIAJ CP-307 Signal-to-noise Ratio).
3.THD+N ratio as defined in AES17 and outlined in AES6id,non-weighted, over 20 Hz to 20 kHz bandwidth.Results at the jack
are dependent on external components and will likely be 1 - 2dB worse.
4.Peak-to-Peak Ripple over Passband meets ± 0.125dB limits, 48 kHz or 44.1 kHz Sample Frequency. 1dB limit.
5.Stop Band rejection determines filter requirements. Out-of-Band rejection determines audible noise.
6.The integrated Out-of-Band noise generated by the DAC process, during normal PCM audio playback, over a bandwidth 28.8
to 100 kHz, with respect to a 1 Vrms DAC output.
7.Gain drift is the change in analog volume control gain for each step across the supported 0 oC TO 70 oC temperature range
referenced to the 25 oC gain value and specified in ppm per oC
8.± 1dB limits for Line Output & 0 dB gain, at -20dBV
9.Spurious tone rejection is tested with ADC dither enabled and compared to ADC performance without dither.
10.Can be set to 0.5 or 0.8 AVdd.
26
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92HD73E
©2011 INTEGRATED DEVICE TECHNOLOGY, INC.
92HD73E
Ten Channel HD Audio Codec
3. PORT CONFIGURATIONS
Entertainment PC
Front
Rear
ADC1
LI,MIC
DAC 0
HP
DAC 0
VOLUME
C
D
E
A
B
G
F
CTR/LFE
5
4
3
2
1
0
6
7
8
9
10
11
DAC 2
DAC 1
MIC,LI
ADC0
REAR SURR
FRONT
SPDIF_OUT
MIC,LI
ADC1
ADC1
I
Video IN
HDMI
SPDIF_IN
Consumer Desktop
Front
Rear
5-Stack Option
ADC1/DAC0
DAC0 / ADC0
HP / MIC,LI
DAC 0
C
D
E
LI,MIC / CTR-LFE
A
B
G
F
CTR/LFE
DAC 2
DAC 1
ADC0 / DAC0
MIC,LI / HP
REAR SURR
FRONT
SPDIF_OUT
ADC1/DAC2
MIC,LI / REAR SURR
SPDIF_IN
HDMI/Display Port
Mobile
Side
Dock
DAC 0
HP
DAC 0
A
B
C
D
HP
ADC 0
MIC,LI
ADC 1
E
MIC,LI
ADC 0
LI,MIC
DAC 2
G
CTR/LFE
DAC 1
F
HDMI/Display Port
REAR SURR
SPDIF_OUT
Internal
DAC 0
A
M
P
H
OR
I
EAPD
Digital Mic
Array
Mic Array
Figure 8. Port Configuration
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92HD73E
92HD73E
Ten Channel HD Audio Codec
4. FUNCTIONAL BLOCK DIAGRAMS
4.1. 48QFP
Stream &
Digital
Mute
Select
EAPD/SPDIF_IN
Pin 47
Channel
SPDIF IN to PCM
PCM to
ADC0
ADC1
SPDIF OUT1
Pin 40
SPDIF OUT
Stream &
Channel
Select
Digital
Mute
To all ports enabled as output
mute
vol
Analog PC_BEEP
(Vendor Specific)
-6,-12,-18, -24 dB
ADC0
ADC1
PCM to
SPDIF OUT
SPDIF OUT0
Pin 48
Stream &
Channel
Select
Digital
Mute
Digital PC Beep
Analog Beep
MixerOutVol
DAC0
DAC1
DAC2
DAC3
DAC4
HP
Σ
Σ
Σ
Σ
Σ
Σ
Σ
Σ
No Bias
Stream &
Channel
Select
Digital
Mute
vol
vol
DAC0
DAC1
DAC 0
Boost
+0/+10/+20/+30 dB
Port D
PORT D
Pin Complex
Pins 35/36
Digital PC Beep
Analog Beep
MixerOutVol
DAC0
DAC1
DAC2
DAC3
DAC4
Stream &
Channel
Select
Digital
Mute
HP
DAC 1
Mic Bias
Boost
+0/+10/+20/+30 dB
Port A
PORT A
Pin Complex
Pins 39/41
Stream &
Channel
Select
Digital
Mute
Digital PC Beep
Analog Beep
vol
vol
DAC2
DAC3
DAC 2
DAC 3
MixerOutVol
DAC0
DAC1
DAC2
DAC3
DAC4
HP
Mic Bias
Stream &
Channel
Select
Digital
Mute
Boost
+0/+10/+20/+30 dB
Port B
PORT B
Pin Complex
Pins 21/22
Digital PC Beep
Analog Beep
MixerOutVol
DAC0
DAC1
DAC2
DAC3
DAC4
LO
Mic Bias
Stream &
Channel
Select
Digital
Mute
Boost
+0/+10/+20/+30 dB
vol
DAC4
Port C
DAC 4
PORT C
Pin Complex
Pins 23/24
Digital PC Beep
Analog Beep
MixerOutVol
DAC0
DAC1
DAC2
DAC3
DAC4
Mixer
Port A
Port B
Port C
Port D
Port E
Port F
Port G
Port H
CD
LO
Mic Bias
Boost
+0/+10/+20/+30 dB
Port E
PORT E
Pin Complex
Pins 14/15
+0 to +22.5 dB
In 1.5 dB steps
Digital PC Beep
Analog Beep
MixerOutVol
DAC0
DAC1
DAC2
DAC3
DAC4
Stream &
Channel
Select
LO
mute
vol
Gain
ADC0
No Bias
Boost
+0/+10/+20/+30 dB
Port F
PORT F
Pin Complex
Pins 16/17
Mixer
Port A
Port B
Port C
Port D
Port E
Port F
Port G
Port H
CD
Digital PC Beep
Analog Beep
MixerOutVol
DAC0
DAC1
DAC2
DAC3
DAC4
DMIC0
DMIC1
LO
No Bias
Boost
+0/+10/+20/+30 dB
Port G
+0 to +22.5 dB
In 1.5 dB steps
PORT G
Pin Complex
Pins 43/44
Stream &
Channel
Select
Digital PC Beep
Analog Beep
mute
vol
Gain
ADC1
MixerOutVol
DAC0
DAC1
DAC2
DAC3
DAC4
LO
No Bias
Boost
+0/+10/+20/+30 dB
Port H
PORT H
Pin Complex
Pins 45/46
DMIC0
DMIC1
CD
CD (Port I)
mute
mute
mute
mute
mute
vol
vol
vol
vol
vol
InMUX0
Mixer
Pin Complex
Pins 18/19/20
InMUX1
InMUX2
InMUX3
CD
+0/+10/+20/+30 dB
Digital Microphone
MixerOutVol
mute
volume and mute is
done after the ADC
but shown here and
in widget list as
same as analog
path.
Boost
DMIC_0
DMIC_1
DMIC
DMIC
DMIC_0
Vol
Pin 2
Σ
Boost
DMIC_1
-46.5 to 0 dB
In 1.5 dB steps
Pin 3
+0/+10/+20/+30 dB
-34.5 to +12 dB
In 1.5 dB steps
Port A
Port B
Port D
Port F
Port A
Port E
Port G
Port H
Port B
DAC0
DAC1
DAC2
DAC3
Port C
Port G
Port H
InMUX0
InMUX1
InMUX2
InMUX3
Figure 9. 48QFP Functional Block Diagram
28
V 1.3 08/11
92HD73E
©2011 INTEGRATED DEVICE TECHNOLOGY, INC.
92HD73E
Ten Channel HD Audio Codec
4.2. 40QFN
Digital PC Beep
MixerOutVol
Analog Beep
DAC0
DAC1
DAC2
DAC3
DAC4
HP
Σ
Σ
Σ
Σ
Σ
Σ
Σ
Σ
No Bias
EAPD/
SPDIF_IN
Boost
+0/+10/+20/+30 dB
Port D
PORT D
Pin Complex
Pins 29/30
Stream &
Digital
Mute
Select
SPDIF IN to
PCM
Channel
Pin 40
Digital PC Beep
Analog Beep
MixerOutVol
DAC0
DAC1
DAC2
DAC3
DAC4
HP
ADC0
ADC1
PCM to
Mic Bias
Stream &
Channel
Select
SPDIF OUT0
Pin 1
Digital
Mute
SPDIF OUT
Boost
+0/+10/+20/+30 dB
Port A
PORT A
Pin Complex
Pins 33/34
Digital PC Beep
Analog Beep
Stream &
Channel
Select
Digital
Mute
vol
vol
vol
vol
vol
DAC0
DAC1
DAC2
DAC3
DAC4
DAC 0
DAC 1
DAC 2
DAC 3
DAC 4
MixerOutVol
DAC0
DAC1
DAC2
DAC3
DAC4
HP
Mic Bias
Boost
+0/+10/+20/+30 dB
Port B
PORT B
Pin Complex
Pins 18/19
Stream &
Channel
Select
Digital
Mute
Digital PC Beep
Analog Beep
MixerOutVol
DAC0
DAC1
DAC2
DAC3
DAC4
LO
Stream &
Channel
Select
No Bias
Digital
Mute
Boost
+0/+10/+20/+30 dB
Port C
PORT C
Pin Complex
Pins 20/21
Digital PC Beep
Analog Beep
Stream &
Channel
Select
Digital
Mute
MixerOutVol
DAC0
DAC1
DAC2
DAC3
DAC4
LO
Mic Bias
Boost
+0/+10/+20/+30 dB
Port E
PORT E
Pin Complex
Pins 11/12
Stream &
Channel
Select
Digital
Mute
Digital PC Beep
Analog Beep
MixerOutVol
DAC0
DAC1
DAC2
DAC3
DAC4
Mixer
Port A
Port B
Port C
Port D
Port E
Port F
Port G
Port H
CD
LO
No Bias
+0 to +22.5 dB
In 1.5 dB steps
Boost
+0/+10/+20/+30 dB
Port F
PORT F
Pin Complex
Pins 13/14
Stream &
Channel
Select
mute
vol
Gain
ADC0
Digital PC Beep
Analog Beep
MixerOutVol
DAC0
DAC1
DAC2
DAC3
DAC4
LO
No Bias
Mixer
mute
mute
mute
mute
mute
vol
InMUX0
Boost
+0/+10/+20/+30 dB
Port G
PORT G
Pin Complex
Pins 36/37
MixerOut
Vol
vol
vol
vol
vol
InMUX1
InMUX2
InMUX3
CD
Digital PC Beep
Analog Beep
mute
Vol
Σ
MixerOutVol
DAC0
DAC1
DAC2
DAC3
DAC4
LO
-46.5 to 0 dB
In 1.5 dB steps
No Bias
-34.5 to +12 dB
In 1.5 dB steps
Boost
+0/+10/+20/+30 dB
Port H
PORT H
Pin Complex
Pins 38/39
Mixer
Port A
Port B
Port C
Port D
Port E
Port F
Port G
Port H
CD
To all ports
enabled as
output
mute
vol
Analog PC_BEEP
(Vendor Specific)
CD
CD
Pin Complex
Pins 15/16/17
-6,-12,-18, -24 dB
Port A
Port B
Port D
Port F
Port A
Port E
Port G
Port H
+0 to +22.5 dB
In 1.5 dB steps
InMUX0
InMUX2
InMUX1
Stream &
Channel
Select
mute
vol
Gain
ADC1
Port B
Port C
Port G
Port H
DAC0
DAC1
DAC2
DAC3
InMUX3
Figure 10. 40QFN Functional Block Diagram
29
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©2011 INTEGRATED DEVICE TECHNOLOGY, INC.
92HD73E
92HD73E
Ten Channel HD Audio Codec
4.3. Widget Information and Supported Command Verbs
-95.25 to 0dB
NID = 15h 0.75dB step
VOLUME KNOB
NID = 0Ah
DAC0
HP
NID = 1Fh
DAC0
DAC1
DAC2
DAC3
DAC4
DAC1
DAC2
DAC3
DAC4
MIXER
DAC0
Port A
IN VOL
BIAS
10/20/30
Port A
NID = 0Bh
-95.25 to 0dB
NID = 16h 0.75dB step
NID = 1Ch
DAC0
DAC1
DAC2
DAC3
DAC4
MIXER
HP
Digital
PC_BEEP
Port B
IN VOL
BIAS
DAC1
10/20/30
Port B
NID = 0Ch
DAC0
DAC1
LO
-95.25 to 0dB
NID = 17h 0.75dB step
DAC2
Port C
DAC3
IN VOL
BIAS
DAC4
MixerOutVol
10/20/30
Port C
DAC2
NID = 0Dh
DAC0
DAC1
HP
DAC2
Port D
IN VOL
10/20/30
DAC3
-95.25 to 0dB
DAC4
NID = 18h 0.75dB step
MixerOutVol
Port D
DAC3
NID = 0Eh
DAC0
DAC1
LO
DAC2
Port E
DAC3
IN VOL
BIAS
DAC4
MixerOutVol
10/20/30
-95.25 to 0dB
Port E
NID = 19h 0.75dB step
NID = 0Fh
DAC0
DAC1
LO
DAC4
DAC2
Port F
IN VOL
10/20/30
DAC3
DAC4
MixerOutVol
Port F
NID = 20h
NID = 10h
Port A
Port B
Port C
Port D
Port E
Port F
Port G
Port H
CD
DAC0
DAC1
LO
NID = 1Ah
ADC0
DAC2
Port G
IN VOL
10/20/30
DAC3
DAC4
ADC0
MUX
MixerOutVol
Port G
HDA
Link
NID = 11h
0 to 22.5dB
1.5dB step
DMIC0
DMIC1
Mixer
DAC0
DAC1
LO
DAC2
Port H
IN VOL
10/20/30
DAC3
ADC0 MUX
NID = 21h
DAC4
MixerOutVol
Port H
To all
Port A
Port B
Port C
Port D
Port E
Port F
Port G
Port H
CD
output
enabled
ports
Mute Volume
-6,-12,-18, -24 dB
PC_BEEP (Pin 12)
NID = 1Bh
ADC1
VSV
ADC1
MUX
NID = 28h
0 to 22.5dB
1.5dB step
DMIC0
DMIC1
Mixer
NID = 12h
Port A
INPORT0
MUX
Port B
Port D
Port F
ADC1 MUX
CD
NID = 1Dh
(Port I)
NID = 29h
Mute Volume
NID = 1Eh
Mixer
Port A
Port E
Port G
Port H
Mute Volume
Mute Volume
Mute Volume
INPORT1
MUX
NID = 13h
MixerOutVol
MixerOutVol
Mute Volume
Σ
DMIC0
10/20/30
Mute Volume
-34.5 to +12dB
in 1.5dB steps
CD
NID = 2Ah
-46.5 to 0dB
in 1.5dB steps
Port B
Port C
Port G
Port H
INPORT2
MUX
NID = 14h
Mixer
DMIC1
10/20/30
NID = 2Bh
NID = 25h
DAC 0
DAC 1
DAC 2
DAC 3
NID = 22h
Dig0Pin
INPORT3
MUX
SPDIF
OUT0
ADC0 MUX
ADC1 MUX
NID = 26h
NID = 23h
Dig1Pin
ADC0 MUX
ADC1 MUX
SPDIF
OUT1
NID = 24h
Dig2Pin
NID = 27h
SPDIF
IN
Figure 11. Widget Diagram
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4.4. Widget List
ID
Widget Name
Root
Description
Root Node
00h
01h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
20h
21h
22h
23h
24h
25h
26h
27h
28h
29h
2Ah
AFG
Audio Function Group
Port A
Port A Pin Widget (Configurable as HP, Line Out, Line In, Mic)
Port B Pin Widget (Configurable as HP, Line Out, Line In, Mic)
Port C Pin Widget (Configurable as Line In, Mic, Line Out)
Port D Pin Widget (Configurable as HP, Line Out, Line In, Mic)
Port E Pin Widget (Configurable as Line In, Mic, Line Out)
Port F Pin Widget (Configurable as Line In, Mic, Line Out)
Port G Pin Widget (Configurable as Line In, Mic, Line Out)
Port H Pin Widget (Configurable as Line In, Mic, Line Out)
CD Pin Widget (Configurable as Line In)
Digital Microphone 0 Pin Widget
Port B
Port C
Port D
Port E
Port F
Port G
Port H
CD (Port I)
DigMic0
DigMic1
DAC0
Digital Microphone 1 Pin Widget
Stereo Output Converter to DAC
DAC1
Stereo Output Converter to DAC
DAC2
Stereo Output Converter to DAC
DAC3
Stereo Output Converter to DAC (or Vendor Specific Widget)
Stereo Output Converter to DAC (or Vendor Specific Widget)
Stereo Input Converter to ADC
DAC4
ADC0
ADC1
Stereo Input Converter to ADC
PCBeep
Mixer
Digital PC Beep
Mixer (Input Ports, DACs, Analog PC_Beep)
Mixer Out Volume
MixerOutVol
VolumeKnob
ADC0Mux
ADC1Mux
Dig0Pin
Dig1Pin
Dig2Pin
SPDIFOut0
SPDIFOut1
SPDIFIn
InPort0Mux
InPort1Mux
InPort2Mux
External Volume Control
ADC0 Mux with volume and mute
ADC1 Mux with volume and mute
Digital Output Pin (pin48)
Secondary Digital Output Pin (pin 40)
EAPD and Digital Input Pin (Pin 47)
Stereo Output for SPDIF_Out
Second Stereo Output for SPDIF_Out
Stereo converter widget for SPDIF_In
Input port pre-select for mixer
input port pre-select for mixer
input port pre-select for mixer
Table 17. High Definition Audio Widget
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ID
Widget Name
Description
2Bh
InPort3Mux
input port pre-select for mixer
Table 17. High Definition Audio Widget
4.5. Pin Configuration Default Register Settings
The configuration default registers are 32-bit registers required for each pin widget. These registers are normally used
by the CODEC driver to determine the configuration of jacks and devices attached to the CODEC. When the CODEC is
powered on, these registers are loaded with the default values provided by IDT for typical system usage, and are
loaded in a way that is compatible with the Microsoft Universal Audio Architecture (UAA) driver. The values can be
overridden by IDT customers according to their system configuration. Table shows the Pin Widget Configuration
Default settings.
The settings reflect the Consumer Desktop use model with:
•Independent Front Headphone and Microphone for real time communication
•7.1 audio output at the rear
•Rear Microphone and Line Input jacks
•Optical SPDIF input and output jacks at the rear
•HDMI
•Digital Microphones are connected as a 4-mic array (Volume Knob Widget is visible, but inactive)
•Analog CD input is connected to an internal ATAPI connector.
Pin Name
Port
Location
Device
HP Out
Connection
Color
Green
Misc
Assoc. Seq
Mainboard
Front
2h
Connect to Jack
00b
1/8 inch Jack
1h
Jack Detect
Override=0
PortAPin
3h
4h
2h
1h
2h
0h
0h
0h
0h
Eh
2h
4h
Mainboard
Front
2h
Connect to Jack
00b
Mic In
Ah
1/8 inch Jack
1h
Pink
9h
Jack Detect
Override=0
PortBPin
PortCPin
PortDPin
PortEPin
Mainboard
Rear
1h
Connect to Jack
00b
Mic In
Ah
1/8 inch Jack
1h
Pink
9h
Jack Detect
Override=0
Mainboard
Rear
1h
Connect to Jack
00b
Line Out
0h
1/8 inch Jack
1h
Green
4h
Jack Detect
Override=0
Mainboard
Rear
1h
Connect to Jack
00b
Line In
8h
1/8 inch Jack
1h
Blue
3h
Jack Detect
Override=0
Not Connected
01b
NA
000000b
Other
Fh
Unknown
0h
Unknown Jack Detect
0h Override=0
Unknown Jack Detect
PortFPin
Fh
Fh
0h
0h
Not Connected
01b
NA
000000b
Other
Fh
Unknown
0h
MonoOutPin
0h
Override=0
Mainboard
Rear
000001b
Connect to Jack
00b
SPDIF Out optical
Gray
2h
Jack Detect
Override=0
DigOutPin0
DigOutPin1
5h
6h
0h
0h
4h
5h
Digital
Other Out
5h
Connect to Jack
10b
Internal
011000b
Other Digital
6h
Unknown Jack Detect
0h Override=0
Table 18. Pin Configuration Default Settings
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Pin Name
Port
Location
NA
000000b
Device
Other
Fh
Connection
Color
Unknown Jack Detect
0h Override=0
Unknown Jack Detect
0h Override=0
Unknown Jack Detect
0h Override=0
Misc
Assoc. Seq
Not Connected
01b
Unknown
0h
DigOutPin2
Fh
Fh
Fh
0h
0h
0h
Not Connected
01b
NA
000000b
Other
Fh
Unknown
0h
DigMic0Pin
DigMic1Pin
Not Connected
01b
NA
000000b
Other
Fh
Unknown
0h
Analog
PC_BEEP
Pin
Not Connected
01b
NA
000000b
Other
Fh
Unknown
0h
Unknown Jack Detect
0h Override=0
Fh
0h
Table 18. Pin Configuration Default Settings
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5. WIDGET INFORMATION
Bits [39:32]
Bits [31:28]
CODEC Address
BITS [27:20]
BITS[19:16]
BITS [15:0]
Reserved
NID
Verb ID (4-bit)
Payload Data (16-bit)
Table 19. Command Format for Verb with 4-bit Identifier
Bits [39:32]
Bits [31:28]
BITS [27:20]
BITS[19:8]
BITS [7:0]
Payload Data (8-bit)
Reserved
CODEC Address
NID
Verb ID (12-bit)
Table 20. Command Format for Verb with 12-bit Identifier
There are two types of responses: Solicited and Unsolicited. Solicited responses are provided as a
direct response to an issued command and will be provided in the frame immediately following the
command. Unsolicited responses are provided by the CODEC independent of any command. Unso-
licited responses are the result of CODEC events such as a jack insertion detection. The formats for
Solicited Responses and Unsolicited Responses are shown in the tables below. The “Tag” field in
bits [31:28] of the Unsolicited Response identify the event.
Bit [35]
Bit [34]
BITS [33:32]
Reserved
BITS[31:0]
Valid (Valid = 1)
UnSol = 0
Response
Table 21. Solicited Response Format
Bit [35]
Bit [34]
BITS [33:32]
BITS[31:28]
Tag
BITS [27:0]
Response
Valid (Valid = 1)
UnSol = 1
Reserved
Table 22. Unsolicited Response Format
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5.1. Root Node (NID = 00))
5.1.1.
Root VendorID
Verb ID
Payload
Response
F00
00
See bitfield table.
Get
5.1.1.1.
Root VendorID
Bit
Bitfield Name
RW
R
Reset
111D
Description
[31.:16]
[15.:8]
[7.:0]
Vendor
Vendor ID.
Device ID.
Device ID.
DeviceFix
R
xx
xx
DeviceProg
R
DEVICE ID
CODEC
92HD73E1X 48QFP
7676h
92HD73E1T 48QFP i-temp
92HD73E1X 40QFN
5.1.2.
Root RevID
Verb ID
Payload
Response
F00
02
See bitfield table.
Get
5.1.2.1.
Root RevID
Bit
Bitfield Name
RW
Reset
00
Description
[31.:24]
[23.:20]
Rsvd
Major
R
Reserved.
R
1
Compliant HDAudio spec major revi-
sion.
[19.:16]
[15.:12]
[11.:8]
[7.:4]
Minor
R
R
R
R
R
0
x
x
x
x
Compliant HDAudio spec minor revision
Contact IDT for revision information.
Contact IDT for revision information.
Contact IDT for revision information.
Contact IDT for revision information.
RevisionFix
RevisionProg
SteppingFix
SteppingProg
[3.:0]
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5.1.2.2.
Root NodeInfo
Bit
Bitfield Name
RW
Reset
00
Description
[31.:24]
[23.:16]
Rsvd2
R
Reserved.
StartNID
R
01
Starting node number (NID) of first func-
tion group
[15.:8]
[7.:0]
Rsvd1
R
R
00
01
Reserved.
TotalNodes
Total number of nodes
5.2. AFG Node (NID = 01
)
5.2.1.
AFG Reset
Verb ID
Payload
Response
See bitfield table.
Get
5.2.1.1.
Bit
AFG Reset
Bitfield Name
Rsvd1
Execute
RW
R
Reset
Description
[31.:8]
[7.:0]
000000
00
Reserved.
W
Function Reset.
5.2.2.
AFG NodeInfo
Verb ID
Payload
Response
F00
04
See bitfield table.
Get
5.2.2.1.
AFG NodeInfo
Bit
Bitfield Name
RW
R
Reset
00
Description
[31.:24]
[23.:16]
Rsvd2
Reserved.
StartNID
R
0A
Starting node number for function group
subordinate nodes.
[15.:8]
[7.:0]
Rsvd1
R
R
00
22
Reserved.
TotalNodes
Total number of nodes.
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5.2.3.
AFG FGType
Verb ID
Payload
Response
F00
05
See bitfield table.
Get
5.2.3.1.
AFG FGType
Bit
Bitfield Name
Rsvd
RW
R
Reset
Description
[31.:9]
[8]
000000
1
Reserved.
UnSol
R
Unsolicited response supported:
1 = yes 0 = no.
[7.:0]
NodeType
R
1
Function group type: 00h = Reserved;
01h = Audio Function Group; 02h = Ven-
dor Defined Modem Function Group;
03h-7Fh = Reserved; 80h-FFh = Vendor
Defined Function Group
5.2.4.
AFG AFGCap
Verb ID
Payload
Response
F00
08
See bitfield table.
Get
5.2.4.1.
AFG AFGCap
Bit
Bitfield Name
Rsvd3
RW
R
Reset
00
Description
[31.:17]
[16]
Reserved.
BeepGen
Rsvd2
R
1
0
D
Beep generator present: 1 = yes 0 = no.
Reserved.
[15.:12]
[11.:8]
R
InputDelay
R
Typical latency in frames. Number of
samples between when the sample is
received as an analog signal at the pin
and when the digital representation is
transmitted on the HD Audio link.
[7.:4]
[3.:0]
Rsvd1
R
R
0
Reserved.
OutputDelay
D
Typical latency in frames. Number of
samples between when the signal is re-
ceived from the HD Audio link and when
it appears as an analog signal at the pin.
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5.2.5.
AFG PCMCap
Verb ID
Payload
Response
F00
0A
See bitfield table.
Get
5.2.5.1.
AFG PCMCap
Bit
Bitfield Name
Rsvd2
RW
R
Reset
000
Description
[31.:21]
[20]
Reserved.
B32
B24
B20
B16
B8
R
0
1
1
1
0
32 bit audio format support:
1 = yes 0 = no.
[19]
[18]
[17]
[16]
R
R
R
R
24 bit audio format support:
1 = yes 0 = no.
20 bit audio format support:
1 = yes 0 = no.
16 bit audio format support:
1 = yes 0 = no.
8 bit audio format support:
1 = yes 0 = no.
[15.:12]
[11]
[10]
[9]
Rsvd1
R12
R11
R10
R9
R
R
R
R
R
R
R
R
R
R
R
R
R
0
0
1
1
1
1
1
1
0
0
0
0
0
Reserved.
384kHz rate support: 1 = yes 0 = no.
192kHz rate support: 1 = yes 0 = no.
176.4kHz rate support: 1 = yes 0 = no.
96kHz rate support: 1 = yes 0 = no.
88.2kHz rate support: 1 = yes 0 = no.
48kHz rate support: 1 = yes 0 = no.
44.1kHz rate support: 1 = yes 0 = no.
32kHz rate support: 1 = yes 0 = no.
22.05kHz rate support: 1 = yes 0 = no.
16kHz rate support: 1 = yes 0 = no.
11.025kHz rate support: 1 = yes 0 = no.
8kHz rate support: 1 = yes 0 = no.
[8]
[7]
R8
[6]
R7
[5]
R6
[4]
R5
[3]
R4
[2]
R3
[1]
R2
[0]
R1
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5.2.6.
AFG StreamCap
Verb ID
Payload
Response
F00
0B
See bitfield table.
Get
5.2.6.1.
AFG StreamCap
Bit
Bitfield Name
Rsvd
RW
R
Reset
00000000 Reserved.
Description
[31.:3]
[2]
AC3
R
0
0
1
AC-3 formatted data support:
1 = yes 0 = no.
[1]
[0]
Float32
PCM
R
R
Float32 formatted data support:
1 = yes 0 = no.
PCM-formatted data support:
1 = yes 0 = no.
5.2.7.
AFG InAmpCap
Verb ID
Payload
Response
F00
0D
See bitfield table.
Get
5.2.7.1.
AFG InAmpCap
Bit
Bitfield Name
RW
R
Reset
Description
[31]
Mute
0
Mute support: 1 = yes 0 = no.
Reserved.
[30.:23]
[22.:16]
Rsvd3
R
00
27
StepSize
R
Size of each step in the gain range: 0 to
127 = .25dB to 32dB in .25dB steps.
[15]
Rsvd2
R
R
0
Reserved.
[14.:8]
NumSteps
03
Number of gains steps (number of pos-
sible settings - 1).
[7]
Rsvd1
Offset
R
R
0
Reserved.
[6.:0]
00
Indicates which step is 0dB
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5.2.8.
AFG PwrStateCap
Verb ID
Payload
Response
F00
0F
See bitfield table.
Get
5.2.8.1.
AFG PwrStateCap
Bitfield Name
Rsvd
Bit
RW
R
Reset
Description
[31.:4]
[3]
0000000
Reserved.
D3Sup
R
1
1
1
1
D3 power state support: 1 = yes 0 = no.
D2 power state support: 1 = yes 0 = no.
D1 power state support: 1 = yes 0 = no.
D0 power state support: 1 = yes 0 = no.
[2]
D2Sup
R
[1]
D1Sup
R
[0]
D0Sup
R
5.2.9.
AFG GPIOCnt
Verb ID
Payload
Response
F00
11
See bitfield table.
Get
5.2.9.1.
AFG GPIOCnt
Bit
Bitfield Name
RW
Reset
Description
[31]
GPIWake
R
1
Wake capability. Assuming the Wake
Enable Mask controls are enabled
GPIOs configured as inputs can cause a
wake (generate a Status Change event
on the link) when there is a change in
level on the pin.
[30]
GPIUnsol
R
1
GPIO unsolicited response support: 1 =
yes 0 = no.
[29.:24]
[23.:16]
Rsvd
R
R
00
00
Reserved.
NumGPIs
Number of GPI pins supported by func-
tion group.
[15.:8]
[7.:0]
NumGPOs
NumGPIOs
R
R
00
08
Number of GPO pins supported by func-
tion group.
Number of GPIO pins supported by
function group.
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5.2.10. AFG OutAmpCap
Verb ID
Payload
Response
F00
12
See bitfield table.
Get
5.2.10.1. AFG OutAmpCap
Bit
Bitfield Name
Mute
RW
R
Reset
Description
[31]
1
Mute support: 1 = yes 0 = no.
Reserved.
[30.:23]
[22.:16]
Rsvd3
R
00
02
StepSize
R
Size of each step in the gain range: 0 to
127 = .25dB to 32dB in .25dB steps.
[15]
Rsvd2
R
R
0
Reserved.
[14.:8]
NumSteps
7F
Number of gains steps (number of pos-
sible settings - 1).
[7]
Rsvd1
Offset
R
R
0
Reserved.
[6.:0]
7F
Indicates which step is 0dB
5.2.11. AFG PwrState
Verb ID
Payload
Response
F05
00
See bitfield table.
Get
5.2.11.1. AFG PwrState
Bit
[31.:6]
[5.:4]
Bitfield Name
Rsvd2
RW
R
Reset
Description
0000000
Reserved.
Act
R
3
0
3
Actual power state of this widget.
Reserved.
[3.:2]
Rsvd1
Set
R
[1.:0]
RW
Current power state setting for this wid-
get.
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5.2.12. AFG UnsolResp
Verb ID
Payload
Response
F08
00
See bitfield table.
Get
5.2.12.1. AFG UnsolResp
Bit
[31.:8]
[7]
Bitfield Name
Rsvd2
RW
R
Reset
Description
000000
0
Reserved.
En
RW
Unsolicited response enable:
1 = enabled 0 = disabled.
[6]
Rsvd1
Tag
R
0
Reserved.
[5.:0]
RW
00
Software programmable field returned
in top six bits (31:26) of every Unsolicit-
ed Response generated by this node.
5.2.13. AFG GPIO
Verb ID
Payload
Response
F15
00
See bitfield table.
Get
5.2.13.1. AFG GPIO
Bit
[31.:8]
[7]
Bitfield Name
Rsvd
RW
R
Reset
000000
0
Description
Reserved.
Data7
Data6
Data5
RW
Data for GPIO7. If this GPIO bit is con-
figured as Sticky (edge-sensitive) input
it can be cleared by writing "0". For de-
tails of read back value refer to HD Au-
dio spec. section 7.3.3.22
[6]
[5]
RW
RW
0
0
Data for GPIO6. If this GPIO bit is con-
figured as Sticky (edge-sensitive) input
it can be cleared by writing "0". For de-
tails of read back value refer to HD Au-
dio spec. section 7.3.3.22
Data for GPIO5. If this GPIO bit is con-
figured as Sticky (edge-sensitive) input
it can be cleared by writing "0". For de-
tails of read back value refer to HD Au-
dio spec. section 7.3.3.22
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5.2.13.1. AFG GPIO
Bit
Bitfield Name
Data4
RW
Reset
Description
[4]
[3]
[2]
[1]
[0]
RW
0
0
0
0
0
Data for GPIO4. If this GPIO bit is con-
figured as Sticky (edge-sensitive) input
it can be cleared by writing "0". For de-
tails of read back value refer to HD Au-
dio spec. section 7.3.3.22
Data3
Data2
Data1
Data0
RW
RW
RW
RW
Data for GPIO3. If this GPIO bit is con-
figured as Sticky (edge-sensitive) input
it can be cleared by writing "0". For de-
tails of read back value refer to HD Au-
dio spec. section 7.3.3.22
Data for GPIO2. If this GPIO bit is con-
figured as Sticky (edge-sensitive) input
it can be cleared by writing "0". For de-
tails of read back value refer to HD Au-
dio spec. section 7.3.3.22
Data for GPIO1. If this GPIO bit is con-
figured as Sticky (edge-sensitive) input
it can be cleared by writing "0". For de-
tails of read back value refer to HD Au-
dio spec. section 7.3.3.22
Data for GPIO0. If this GPIO bit is con-
figured as Sticky (edge-sensitive) input
it can be cleared by writing "0". For de-
tails of read back value refer to HD Au-
dio spec. section 7.3.3.22
5.2.14. AFG GPIOEn
Verb ID
Payload
Response
F16
00
See bitfield table.
Get
5.2.14.1. AFG GPIOEn
Bit
[31.:8]
[7]
Bitfield Name
Rsvd
Mask7
RW
R
Reset
Description
000000
0
Reserved.
RW
Enable for GPIO7: 0 = pin is disabled
(Hi-Z state); 1 = pin is enabled; behavior
determined by GPIO Direction control
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5.2.14.1. AFG GPIOEn
Bit
Bitfield Name
Mask6
RW
Reset
Description
[6]
[5]
[4]
[3]
[2]
[1]
[0]
RW
0
0
0
0
0
0
0
Enable for GPIO6: 0 = pin is disabled
(Hi-Z state); 1 = pin is enabled; behavior
determined by GPIO Direction control
Mask5
Mask4
Mask3
Mask2
Mask1
Mask0
RW
RW
RW
RW
RW
RW
Enable for GPIO5: 0 = pin is disabled
(Hi-Z state); 1 = pin is enabled; behavior
determined by GPIO Direction control
Enable for GPIO4: 0 = pin is disabled
(Hi-Z state); 1 = pin is enabled; behavior
determined by GPIO Direction control
Enable for GPIO3: 0 = pin is disabled
(Hi-Z state); 1 = pin is enabled; behavior
determined by GPIO Direction control
Enable for GPIO2: 0 = pin is disabled
(Hi-Z state); 1 = pin is enabled; behavior
determined by GPIO Direction control
Enable for GPIO1: 0 = pin is disabled
(Hi-Z state); 1 = pin is enabled; behavior
determined by GPIO Direction control
Enable for GPIO0: 0 = pin is disabled
(Hi-Z state); 1 = pin is enabled; behavior
determined by GPIO Direction control
5.2.15. AFG GPIODir
Verb ID
Payload
Response
F17
00
See bitfield table.
Get
5.2.15.1. AFG GPIODir
Bit
[31.:8]
[7]
Bitfield Name
Rsvd
RW
R
Reset
Description
000000
0
Reserved.
Control7
RW
Direction control for GPIO7: 0 = GPIO is
configured as input; 1 = GPIO is config-
ured as output
[6]
Control6
RW
0
Direction control for GPIO6: 0 = GPIO is
configured as input; 1 = GPIO is config-
ured as output
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Ten Channel HD Audio Codec
5.2.15.1. AFG GPIODir
Bit
Bitfield Name
Control5
RW
Reset
Description
[5]
[4]
[3]
[2]
[1]
[0]
RW
0
0
0
0
0
0
Direction control for GPIO5: 0 = GPIO is
configured as input; 1 = GPIO is config-
ured as output
Control4
Control3
Control2
Control1
Control0
RW
RW
RW
RW
RW
Direction control for GPIO4: 0 = GPIO is
configured as input; 1 = GPIO is config-
ured as output
Direction control for GPIO3: 0 = GPIO is
configured as input; 1 = GPIO is config-
ured as output
Direction control for GPIO2: 0 = GPIO is
configured as input; 1 = GPIO is config-
ured as output
Direction control for GPIO1: 0 = GPIO is
configured as input; 1 = GPIO is config-
ured as output
Direction control for GPIO0: 0 = GPIO is
configured as input; 1 = GPIO is config-
ured as output
5.2.16. AFG GPIOWakeEn
Verb ID
Payload
Response
F18
00
See bitfield table.
Get
5.2.16.1. AFG GPIOWakeEn
Bit
[31.:8]
[7]
Bitfield Name
Rsvd
RW
R
Reset
Description
000000
0
Reserved.
W7
W6
RW
Wake enable for GPIO7: 0 = wake-up
event is disabled; 1 = When HD Audio
linkispowereddown(RST#is asserted)
a wake-up event will trigger a Status
Change Request event on the link.
[6]
RW
0
Wake enable for GPIO6: 0 = wake-up
event is disabled; 1 = When HD Audio
linkispowereddown(RST#is asserted)
a wake-up event will trigger a Status
Change Request event on the link.
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Ten Channel HD Audio Codec
5.2.16.1. AFG GPIOWakeEn
Bit
Bitfield Name
W5
RW
Reset
Description
[5]
[4]
[3]
[2]
[1]
[0]
RW
0
0
0
0
0
0
Wake enable for GPIO5: 0 = wake-up
event is disabled; 1 = When HD Audio
linkispowereddown(RST#is asserted)
a wake-up event will trigger a Status
Change Request event on the link.
W4
W3
W2
W1
W0
RW
RW
RW
RW
RW
Wake enable for GPIO4: 0 = wake-up
event is disabled; 1 = When HD Audio
linkispowereddown(RST#is asserted)
a wake-up event will trigger a Status
Change Request event on the link.
Wake enable for GPIO3: 0 = wake-up
event is disabled; 1 = When HD Audio
linkispowereddown(RST#is asserted)
a wake-up event will trigger a Status
Change Request event on the link.
Wake enable for GPIO2: 0 = wake-up
event is disabled; 1 = When HD Audio
linkispowereddown(RST#is asserted)
a wake-up event will trigger a Status
Change Request event on the link.
Wake enable for GPIO1: 0 = wake-up
event is disabled; 1 = When HD Audio
linkispowereddown(RST#is asserted)
a wake-up event will trigger a Status
Change Request event on the link.
Wake enable for GPIO0: 0 = wake-up
event is disabled; 1 = When HD Audio
linkispowereddown(RST#is asserted)
a wake-up event will trigger a Status
Change Request event on the link.
5.2.17. AFG GPIOUnsol
Verb ID
Payload
Response
F19
00
See bitfield table.
Get
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Ten Channel HD Audio Codec
5.2.17.1. AFG GPIOUnsol
Bit
Bitfield Name
Rsvd
RW
Reset
000000
0
Description
[31.:8]
[7]
R
Reserved.
EnMask7
EnMask6
EnMask5
EnMask4
EnMask3
EnMask2
RW
RW
RW
RW
RW
RW
Unsolicited enable mask for GPIO7. If
set and the Unsolicited Response con-
trol for this widget has been enabled an
unsolicited response will be sent when
GPIO2 is configured as input and
changes state.
[6]
[5]
[4]
[3]
[2]
0
0
0
0
0
Unsolicited enable mask for GPIO6. If
set and the Unsolicited Response con-
trol for this widget has been enabled an
unsolicited response will be sent when
GPIO2 is configured as input and
changes state.
Unsolicited enable mask for GPIO5. If
set and the Unsolicited Response con-
trol for this widget has been enabled an
unsolicited response will be sent when
GPIO2 is configured as input and
changes state.
Unsolicited enable mask for GPIO4. If
set and the Unsolicited Response con-
trol for this widget has been enabled an
unsolicited response will be sent when
GPIO2 is configured as input and
changes state.
Unsolicited enable mask for GPIO3. If
set and the Unsolicited Response con-
trol for this widget has been enabled an
unsolicited response will be sent when
GPIO2 is configured as input and
changes state.
Unsolicited enable mask for GPIO2. If
set and the Unsolicited Response con-
trol for this widget has been enabled an
unsolicited response will be sent when
GPIO2 is configured as input and
changes state.
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5.2.17.1. AFG GPIOUnsol
Bit
Bitfield Name
EnMask1
RW
Reset
Description
[1]
[0]
RW
0
0
Unsolicited enable mask for GPIO1. If
set and the Unsolicited Response con-
trol for this widget has been enabled an
unsolicited response will be sent when
GPIO1 is configured as input and
changes state.
EnMask0
RW
Unsolicited enable mask for GPIO0. If
set and the Unsolicited Response con-
trol for this widget has been enabled an
unsolicited response will be sent when
GPIO0 is configured as input and
changes state.
5.2.18. AFG GPIOSticky
Verb ID
Payload
Response
F1A
00
See bitfield table.
Get
5.2.18.1. AFG GPIOSticky
Bit
[31.:8]
[7]
Bitfield Name
RW
R
Reset
Description
Rsvd
000000
0
Reserved.
Mask7
Mask6
Mask5
Mask4
Mask3
RW
GPIO7 input type (when configured as
input): 0 = Non-Sticky (level-sensitive);
1 = Sticky (edge-sensitive).
[6]
[5]
[4]
[3]
RW
RW
RW
RW
0
0
0
0
GPIO6 input type (when configured as
input): 0 = Non-Sticky (level-sensitive);
1 = Sticky (edge-sensitive).
GPIO5 input type (when configured as
input): 0 = Non-Sticky (level-sensitive);
1 = Sticky (edge-sensitive).
GPIO4 input type (when configured as
input): 0 = Non-Sticky (level-sensitive);
1 = Sticky (edge-sensitive).
GPIO3 input type (when configured as
input): 0 = Non-Sticky (level-sensitive);
1 = Sticky (edge-sensitive).
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Ten Channel HD Audio Codec
5.2.18.1. AFG GPIOSticky
Bit
Bitfield Name
Mask2
RW
Reset
Description
[2]
[1]
[0]
RW
0
0
0
GPIO2 input type (when configured as
input): 0 = Non-Sticky (level-sensitive);
1 = Sticky (edge-sensitive).
Mask1
Mask0
RW
RW
GPIO1 input type (when configured as
input): 0 = Non-Sticky (level-sensitive);
1 = Sticky (edge-sensitive).
GPIO0 input type (when configured as
input): 0 = Non-Sticky (level-sensitive);
1 = Sticky (edge-sensitive).
5.2.19. AFG SubID
Verb ID
Payload
Response
F20
00
See bitfield table.
Get
5.2.19.1. AFG SubID
Bit
[31.:24]
[23.:16]
[15.:8]
[7.:0]
Bitfield Name
Subsys3
RW
RW
RW
RW
RW
Reset
Description
00
00
01
00
Subsystem ID (byte 3)
Subsystem ID (byte 2)
Subsystem ID (byte 1)
Subsys2
Subsys1
Assembly
Assembly ID
(Not applicable to codec vendors).
5.2.20. AFG GPIOPlrty
Verb ID
Payload
Response
F70
00
See bitfield table.
Get
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92HD73E
Ten Channel HD Audio Codec
5.2.20.1. AFG GPIOPlrty
Bit
Bitfield Name
Rsvd
RW
Reset
000000
1
Description
[31.:8]
[7]
R
Reserved.
GP7
GP6
GP5
GP4
GP3
GP2
GP1
GP0
RW
RW
RW
RW
RW
RW
RW
RW
GPIO7 Polarity: If configured as output
or non-sticky input: 0 = inverting; 1 =
non-inverting. If configured as sticky in-
put: 0 = falling edges will be detected; 1
= rising edges will be detected
[6]
[5]
[4]
[3]
[2]
[1]
[0]
1
1
1
1
1
1
1
GPIO6 Polarity: If configured as output
or non-sticky input: 0 = inverting; 1 =
non-inverting. If configured as sticky in-
put: 0 = falling edges will be detected; 1
= rising edges will be detected
GPIO5 Polarity: If configured as output
or non-sticky input: 0 = inverting; 1 =
non-inverting. If configured as sticky in-
put: 0 = falling edges will be detected; 1
= rising edges will be detected
GPIO4 Polarity: If configured as output
or non-sticky input: 0 = inverting; 1 =
non-inverting. If configured as sticky in-
put: 0 = falling edges will be detected; 1
= rising edges will be detected
GPIO3 Polarity: If configured as output
or non-sticky input: 0 = inverting; 1 =
non-inverting. If configured as sticky in-
put: 0 = falling edges will be detected; 1
= rising edges will be detected
GPIO2 Polarity: If configured as output
or non-sticky input: 0 = inverting; 1 =
non-inverting. If configured as sticky in-
put: 0 = falling edges will be detected; 1
= rising edges will be detected
GPIO1 Polarity: If configured as output
or non-sticky input: 0 = inverting; 1 =
non-inverting. If configured as sticky in-
put: 0 = falling edges will be detected; 1
= rising edges will be detected
GPIO0 Polarity: If configured as output
or non-sticky input: 0 = inverting; 1 =
non-inverting. If configured as sticky in-
put: 0 = falling edges will be detected; 1
= rising edges will be detected
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Ten Channel HD Audio Codec
5.2.21. AFG GPIODrive
Verb ID
Payload
Response
F71
00
See bitfield table.
Get
5.2.21.1. AFG GPIODrive
Bit
[31.:8]
[7]
Bitfield Name
Rsvd
RW
R
Reset
Description
000000
0
Reserved.
OD7
OD6
OD5
OD4
OD3
OD2
OD1
OD0
RW
GPIO7 Drive Mode: 0 = push-pull (drive
0 and 1); 1 = open drain (drive 0 float for
1).
[6]
[5]
[4]
[3]
[2]
[1]
[0]
RW
RW
RW
RW
RW
RW
RW
0
0
0
0
0
0
0
GPIO6 Drive Mode: 0 = push-pull (drive
0 and 1); 1 = open drain (drive 0 float for
1).
GPIO5 Drive Mode: 0 = push-pull (drive
0 and 1); 1 = open drain (drive 0 float for
1).
GPIO4 Drive Mode: 0 = push-pull (drive
0 and 1); 1 = open drain (drive 0 float for
1).
GPIO3 Drive Mode: 0 = push-pull (drive
0 and 1); 1 = open drain (drive 0 float for
1).
GPIO2 Drive Mode: 0 = push-pull (drive
0 and 1); 1 = open drain (drive 0 float for
1).
GPIO1 Drive Mode: 0 = push-pull (drive
0 and 1); 1 = open drain (drive 0 float for
1).
GPIO0 Drive Mode: 0 = push-pull (drive
0 and 1); 1 = open-drain (drive 0 float for
1).
5.2.22. AFG DMic
Verb ID
Payload
Response
F78
00
See bitfield table.
Get
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Ten Channel HD Audio Codec
5.2.22.1. AFG DMic
Bit
[31.:6]
[5]
Bitfield Name
Rsvd
RW
Reset
0000000
0
Description
R
Reserved.
DMic1 mono select: 0 = stereo operation,
1 = mono operation (left channel duplicated
to the right channel).
Mono1
Mono0
PhAdj
RW
RW
RW
DMic0 mono select: 0 = stereo operation,
1 = mono operation (left channel duplicated
to the right channel).
[4]
0
0
[3.:2]
Selects what phase of the DMic clock
the data should be latched: 0h = left
data rising edge/right data falling edge;
1h = left data center of high/right data
center of low; 2h = left data falling
edge/right data rising edge; 3h = left
data center of low/right data center of
high
[1.:0]
Rate
RW
2
Selects the DMic clock rate:
0h = 4.704MHz; 1h = 3.528MHz;
2h = 2.352MHz; 3h = 1.176MHz.
5.2.23. AFG AnaBeep
Verb ID
Payload
Response
FEE
00
See bitfield table.
Get
5.2.23.1. AFG AnaBeep
Bit
[31.:3]
[2:1]
Bitfield Name
RW
R
Reset
0000000
3
Description
Rsvd
Gain
Reserved.
Analog PCBeep Gain
0h=-18dB
RW
1h=-12dB
2h=-6dB
3h=0dB
Analog PCBeep enable
1=Analog PC Beep enabled
0=disabled
[0]
Enable
RW
0
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Ten Channel HD Audio Codec
5.3. Port A Node (NID = 0A)
5.3.1.
PortA WCap
Verb ID
Payload
Response
F00
09
See bitfield table.
Get
5.3.1.1.
PortA WCap
Bit
Bitfield Name
RW
R
Reset
00
Description
[31.:24]
[23.:20]
Rsvd2
Reserved.
Type
R
4
Widget type: 0h = Out Converter; 1h = In
Converter; 2h = Summing (Mixer); 3h =
Selector (Mux); 4h = Pin Complex; 5h =
Power; 6h = Volume Knob; 7h = Beep
Generator; 8h-Eh = Reserved; Fh =
Vendor Defined
[19.:16]
Delay
R
0
Number of sample delays through wid-
get.
[15.:12]
[11]
Rsvd1
R
R
R
R
0
0
0
0
Reserved.
SwapCap
PwrCntrl
Dig
Left/right swap support: 1 = yes 0 = no.
Power state support: 1 = yes 0 = no.
[10]
[9]
Digital stream support: 1 = yes (digital)
0 = no (analog).
[8]
[7]
ConnList
R
R
1
1
Connection list present: 1 = yes 0 = no.
UnSolCap
Unsolicited response support: 1 = yes 0
= no.
[6]
ProcWidget
R
0
Processing state support: 1 = yes 0 =
no.
[5]
[4]
[3]
Stripe
R
R
R
0
0
0
Striping support: 1 = yes 0 = no.
FormatOvrd
AmpParOvrd
Stream format override: 1 = yes 0 = no.
Amplifier capabilities override: 1 = yes
no.
[2]
OutAmpPrsnt
R
0
Output amp present: 1 = yes 0 = no.
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Ten Channel HD Audio Codec
5.3.1.1.
PortA WCap
Bit
Bitfield Name
RW
Reset
Description
[1]
[0]
InAmpPrsnt
Stereo
R
1
1
Input amp present: 1 = yes 0 = no.
R
Stereo stream support: 1 = yes (stereo)
0 = no (mono).
5.3.2.
PortA PinCap
Verb ID
Payload
Response
F00
0C
See bitfield table.
Get
5.3.2.1.
PortA PinCap
Bit
Bitfield Name
RW
R
Reset
Description
[31.:17]
[16]
Rsvd2
0000
0
Reserved.
EapdCap
VrefCntrl
R
EAPD support: 1 = yes 0 = no.
[15.:8]
R
00
Vref support: bit 7 = Reserved; bit 6 =
Reserved; bit 5 = 100% support (1 = yes
0 = no); bit 4 = 80% support (1 = yes 0
= no); bit 3 = Reserved; bit 2 = GND sup-
port (1 = yes 0 = no); bit 1 = 50% sup-
port (1 = yes 0 = no); bit 0 = Hi-Z
support (1 = yes 0 = no)
[7]
[6]
[5]
[4]
[3]
Rsvd1
R
R
R
R
R
0
0
1
1
1
Reserved.
BalancedIO
InCap
Balanced I/O support: 1 = yes 0 = no.
Input support: 1 = yes 0 = no.
Output support: 1 = yes 0 = no.
OutCap
HdphDrvCap
Headphone amp present: 1 = yes 0 =
no.
[2]
[1]
[0]
PresDtctCap
TrigRqd
R
R
R
1
0
0
Presence detection support: 1 = yes 0 =
no.
Trigger required for impedance sense: 1
= yes 0 = no.
ImpSenseCap
Impedance sense support: 1 = yes 0 =
no.
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Ten Channel HD Audio Codec
5.3.3.
PortA ConLst
Verb ID
Payload
Response
F00
0E
See bitfield table.
Get
5.3.3.1.
PortA ConLst
Bit
Bitfield Name
Rsvd
RW
R
Reset
Description
[31.:8]
[7]
000000
0
Reserved.
LForm
R
Connection list format: 1 = long-form
(15-bit) NID entries 0 = short-form
(7-bit) NID entries.
[6.:0]
ConL
R
03
Number of NID entries in connection list.
5.3.4.
PortA ConLstEntry0
Verb ID
Payload
Response
F02
00
See bitfield table.
Get
5.3.4.1.
PortA ConLstEntry0
Bitfield Name
ConL3
Bit
RW
R
Reset
00
Description
Unused list entry.
[31.:24]
[23.:16]
[15]
ConL2
R
1E
1
InputMixer Summing widget (0x1E)
1 = ConL0..ConL1 defines a range of select-
able inputs.
ConL1Range
R
[14.:8]
[7.:0]
ConL1
ConL0
R
R
19
15
DAC1 Converter widget (0x19)
DAC0 Converter widget (0x15)
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5.3.5.
PortA ConSelectCtrl
Verb ID
Payload
Response
F01
00
See bitfield table.
Get
5.3.5.1.
PortA ConSelectCtrl
Bitfield Name
Rsvd
Bit
RW
R
Reset
00000000 Reserved.
0 Connection select control index.
Description
[31.:2]
[1.:0]
Index
RW
5.3.6.
PortA PinWCntrl
Verb ID
Payload
Response
F07
00
See bitfield table.
Get
5.3.6.1.
PortA PinWCntrl
Bit
Bitfield Name
RW
R
Reset
Description
[31.:8]
[7]
Rsvd2
000000
0
Reserved.
HPhnEn
RW
Headphone amp enable:
1 = enabled 0 = disabled.
[6]
OutEn
RW
0
Output enable:
1 = enabled 0 = disabled.
[4.:3]
[2.:0]
Rsvd1
R
0
0
Reserved.
Vref selection (See VrefCntrl field of PinCap
parameter for supported selections):
000b= HI-Z, 001b= 50%
VRefEn
RW
010b= GND, 011b= Reserved
100b= 80%, 101b= 100%
110b= Reserved, 111b= Reserved
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Ten Channel HD Audio Codec
5.3.7.
PortA UnsolResp
Verb ID
Payload
Response
F08
00
See bitfield table.
Get
5.3.7.1.
PortA UnsolResp
Bitfield Name
Rsvd2
Bit
RW
R
Reset
Description
[31.:8]
[7]
000000
0
Reserved.
En
RW
Unsolicited response enable: 1 = en-
abled 0 = disabled.
[6]
Rsvd1
Tag
R
0
Reserved.
[5.:0]
RW
00
Software programmable field returned
in top six bits (31:26) of every Unsolicit-
ed Response generated by this node.
5.3.8.
PortA ChSense
Verb ID
Payload
Response
F09
00
See bitfield table.
Get
5.3.8.1.
Bit
PortA ChSense
Bitfield Name
RW
Reset
Description
[31]
PresDtct
R
0
Presence detection indicator:
1 = presence detected;
0 = presence not detected.
Impedance Sense Value (Bits 30:1): Mea-
sured impedence of the widget. An all ones
value indicates an invalid sense reading
[30.:1]
[0]
Impedence
Execute
R
3FFFFFFF
1
Impedance Sense Value (Bit 0)/Trigger:
Read = Impedance value bit 0
Write 0 = Impedance sense occurs using left
channel
RW
Write 1 = Impedance sense occurs using
right channel
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Ten Channel HD Audio Codec
5.3.9.
PortA InAmpLeft
Verb ID
Payload
Response
B20
00
See bitfield table.
Get
5.3.9.1.
PortA InAmpLeft
Bit
Bitfield Name
Rsvd1
Gain
RW
R
Reset
00000000 Reserved.
Description
[31.:2]
[1.:0]
Amp gain step number (see InAmpCap pa-
rameter pertaining to this widget).
RW
0
5.3.10. PortA InAmpRight
Verb ID
Payload
Response
B00
00
See bitfield table.
Get
5.3.10.1. PortA InAmpRight
Bit
[31.:2]
[1.:0]
Bitfield Name
Rsvd1
Gain
RW
R
Reset
00000000 Reserved.
Description
Amp gain step number (see InAmpCap pa-
rameter pertaining to this widget).
RW
0
5.3.11. PortA ConfigDefault
Verb ID
Payload
Response
F1C
00
See bitfield table.
Get
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Ten Channel HD Audio Codec
5.3.11.1. PortA ConfigDefault
Bit
Bitfield Name
RW
Reset
Description
[31.:30]
PortConnectivity
RW
0
Port connectivity: 0h = Port complex is
connected to a jack; 1h = No physical
connection for port; 2h = Fixed function
device is attached; 3h = Both jack and
internal device attached (info in all other
fields refers to integrated device any
presence detection refers to jack)
[29.:24]
[23.:20]
Location
Device
RW
RW
02
Location. Bits [5..4]: 0h = External on
primary chassis; 1h = Internal; 2h = Sep-
arate chassis; 3h = Other. Bits [3..0]: 0h
= N/A; 1h = Rear; 2h = Front; 3h = Left;
4h = Right; 5h = Top; 6h = Bottom;
7h-9h = Special; Ah-Fh = Reserved
2
Default device: 0h = Line out; 1h =
Speaker; 2h = HP out; 3h = CD; 4h =
SPDIF Out; 5h = Digital other out; 6h =
Modem line side; 7h = Modem handset
side; 8h = Line in; 9h = Aux; Ah = Mic in;
Bh = Telephony; Ch = SPDIF In; Dh =
Digital other in; Eh = Reserved; Fh =
Other
[19.:16]
Connection Type
RW
1
Connection type: 0h = Unknown; 1h =
1/8" stereo/mono; 2h = 1/4" stereo/mo-
no; 3h = ATAPI internal; 4h = RCA; 5h =
Optical; 6h = Other digital; 7h = Other
analog; 8h = Multichannel analog (DIN);
9h = XLR/Professional; Ah = RJ-11 (mo-
dem); Bh = Combination; Ch-Eh = Re-
served; Fh = Other
[15.:12]
[11.:8]
Color
Misc
RW
RW
4
0
Color: 0h = Unknown; 1h = Black; 2h =
Grey; 3h = Blue; 4h = Green; 5h = Red;
6h = Orange; 7h = Yellow; 8h = Purple;
9h = Pink; Ah-Dh = Reserved; Eh =
White; Fh = Other
Miscellaneous: Bits [3..1] = Reserved;
Bit 0 = Jack detect override
[7.:4]
[3.:0]
Association
Sequence
RW
RW
3
0
Default assocation.
Sequence.
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Ten Channel HD Audio Codec
5.4. PortB Node (NID = 0B)
5.4.1.
PortB WCap
Verb ID
Payload
Response
F00
09
See bitfield table.
Get
5.4.1.1.
PortB WCap
Bit
Bitfield Name
RW
R
Reset
00
Description
[31.:24]
[23.:20]
Rsvd2
Reserved.
Type
R
4
Widget type: 0h = Out Converter; 1h = In
Converter; 2h = Summing (Mixer); 3h =
Selector (Mux); 4h = Pin Complex; 5h =
Power; 6h = Volume Knob; 7h = Beep
Generator; 8h-Eh = Reserved; Fh =
Vendor Defined
[19.:16]
Delay
R
0
Number of sample delays through wid-
get.
[15.:12]
[11]
Rsvd1
R
R
R
R
0
0
0
0
Reserved.
SwapCap
PwrCntrl
Dig
Left/right swap support: 1 = yes 0 = no.
Power state support: 1 = yes 0 = no.
[10]
[9]
Digital stream support: 1 = yes (digital)
0 = no (analog).
[8]
[7]
ConnList
R
R
1
1
Connection list present: 1 = yes 0 = no.
UnSolCap
Unsolicited response support: 1 = yes 0
= no.
[6]
ProcWidget
R
0
Processing state support: 1 = yes 0 =
no.
[5]
[4]
[3]
Stripe
R
R
R
0
0
0
Striping support: 1 = yes 0 = no.
FormatOvrd
AmpParOvrd
Stream format override: 1 = yes 0 = no.
Amplifier capabilities override: 1 = yes
no.
[2]
OutAmpPrsnt
R
0
Output amp present: 1 = yes 0 = no.
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Ten Channel HD Audio Codec
5.4.1.1.
PortB WCap
Bit
Bitfield Name
RW
Reset
Description
[1]
[0]
InAmpPrsnt
Stereo
R
1
1
Input amp present: 1 = yes 0 = no.
R
Stereo stream support: 1 = yes (stereo)
0 = no (mono).
5.4.2.
PortB PinCap
Verb ID
Payload
Response
F00
0C
See bitfield table.
Get
5.4.2.1.
PortB PinCap
Bit
Bitfield Name
RW
R
Reset
Description
[31.:17]
[16]
Rsvd2
0000
0
Reserved.
EapdCap
VrefCntrl
R
EAPD support: 1 = yes 0 = no.
[15.:8]
R
17
Vref support: bit 7 = Reserved; bit 6 =
Reserved; bit 5 = 100% support (1 = yes
0 = no); bit 4 = 80% support (1 = yes 0
= no); bit 3 = Reserved; bit 2 = GND sup-
port (1 = yes 0 = no); bit 1 = 50% sup-
port (1 = yes 0 = no); bit 0 = Hi-Z
support (1 = yes 0 = no)
[7]
[6]
[5]
[4]
[3]
Rsvd1
R
R
R
R
R
0
0
1
1
1
Reserved.
BalancedIO
InCap
Balanced I/O support: 1 = yes 0 = no.
Input support: 1 = yes 0 = no.
Output support: 1 = yes 0 = no.
OutCap
HdphDrvCap
Headphone amp present:
1 = yes 0 = no.
[2]
[1]
[0]
PresDtctCap
TrigRqd
R
R
R
1
1
1
Presence detection support:
1 = yes 0 = no.
Trigger required for impedance sense:
1 = yes 0 = no.
ImpSenseCap
Impedance sense support:
1 = yes 0 = no.
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Ten Channel HD Audio Codec
5.4.3.
PortB ConLstEntry0
Verb ID
Payload
Response
F00
0E
See bitfield table.
Get
5.4.3.1.
PortB ConLst
Bit
Bitfield Name
Rsvd
RW
R
Reset
Description
[31.:8]
[7]
000000
0
Reserved.
LForm
R
Connection list format: 1 = long-form
(15-bit) NID entries 0 = short-form
(7-bit) NID entries.
[6.:0]
ConL
R
03
Number of NID entries in connection list.
5.4.4.
PortB ConLstEntry0
Verb ID
Payload
Response
F02
00
See bitfield table.
Get
5.4.4.1.
PortB ConLstEntry0
Bitfield Name
ConL3
Bit
RW
R
Reset
00
Description
Unused list entry.
[31.:24]
[23.:16]
[15]
ConL2
R
1E
1
MixerOutVol Selector widget (0x1E)
1 = ConL0..ConL1 defines a range of select-
able inputs.
ConL1Range
R
[14.:8]
[7.:0]
ConL1
ConL0
R
R
19
15
DAC4 Converter widget (0x19)
DAC0 Converter widget (0x15)
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Ten Channel HD Audio Codec
5.4.5.
PortB ConSelectCtrl
Verb ID
Payload
Response
F01
00
See bitfield table.
Get
5.4.5.1.
PortB ConSelectCtrl
Bitfield Name
Rsvd
Bit
RW
R
Reset
00000000 Reserved.
0 Connection select control index.
Description
[31.:2]
[1.:0]
Index
RW
5.4.6.
PortB PinWCntrl
Verb ID
Payload
Response
F07
00
See bitfield table.
Get
5.4.6.1.
PortB PinWCntrl
Bit
Bitfield Name
RW
R
Reset
Description
[31.:8]
[7]
Rsvd2
0000000
0
Reserved.
Headphone amp enable: 1 = enabled, 0 =
disabled.
HPhnEn
RW
Output enable: 1 = enabled, 0 = disabled.
Input enable: 1 = enabled 0 = disabled.
Reserved.
[6]
OutEn
InEn
RW
RW
R
0
0
0
0
[5]
[4.:3]
[2.:0]
Rsvd1
VRefEn
RW
Vref selection (See VrefCntrl field of
PinCap parameter for supported selec-
tions): 000b= HI-Z; 001b= 50%; 010b=
GND; 011b= Reserved; 100b= 80%;
101b= 100%; 110b= Reserved; 111b=
Reserved
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Ten Channel HD Audio Codec
5.4.7.
PortB UnsolResp
Verb ID
Payload
Response
F08
00
See bitfield table.
Get
5.4.7.1.
PortB UnsolResp
Bitfield Name
Rsvd2
Bit
RW
R
Reset
Description
[31.:8]
[7]
000000
0
Reserved.
En
RW
Unsolicited response enable:
1 = enabled 0 = disabled.
[6]
Rsvd1
Tag
R
0
Reserved.
[5.:0]
RW
00
Software programmable field returned
in top six bits (31:26) of every Unsolicit-
ed Response generated by this node.
5.4.8.
PortB ChSense
Verb ID
Payload
Response
F09
00
See bitfield table.
Get
5.4.8.1.
Bit
PortB ChSense
Bitfield Name
RW
Reset
Description
[31]
PresDtct
R
0
Presence detection indicator: 1 = pres-
ence detected; 0 = presence not detect-
ed.
Impedance Sense Value (Bits 30:1): Mea-
sured impedence of the widget. An all ones
value indicates an invalid sense reading
[30.:1]
[0]
Impedence
Execute
R
3FFFFFFF
1
Impedance Sense Value (Bit 0)/Trigger:
Read = Impedance value bit 0
Write 0 = Impedance sense occurs using left
channel
RW
Write 1 = Impedance sense occurs using
right channel
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Ten Channel HD Audio Codec
5.4.9.
PortB InAmpLeft
Verb ID
Payload
Response
B20
00
See bitfield table.
Get
5.4.9.1.
PortB InAmpLeft
Bit
Bitfield Name
Rsvd1
Gain
RW
R
Reset
Description
[31.:2]
[1.:0]
000000
0
Reserved.
Amp gain step number (see InAmpCap pa-
rameter pertaining to this widget).
RW
5.4.10. PortD InAmpRight
Verb ID
Payload
Response
B00
00
See bitfield table.
Get
5.4.10.1. PortD InAmpRight
Bit
[31.:2]
[1.:0]
Bitfield Name
Rsvd1
Gain
RW
R
Reset
000000
0
Description
Reserved.
Amp gain step number (see InAmpCap pa-
rameter pertaining to this widget).
RW
5.4.11. PortB ConfigDefault
Verb ID
Payload
Response
F1C
00
See bitfield table.
Get
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92HD73E
Ten Channel HD Audio Codec
5.4.11.1. PortB ConfigDefault
Bit
Bitfield Name
RW
Reset
Description
[31.:30]
PortConnectivity
RW
0
Port connectivity: 0h = Port complex is
connected to a jack; 1h = No physical
connection for port; 2h = Fixed function
device is attached; 3h = Both jack and
internal device attached (info in all other
fields refers to integrated device any
presence detection refers to jack)
[29.:24]
[23.:20]
Location
Device
RW
RW
02
Location. Bits [5..4]: 0h = External on
primary chassis; 1h = Internal; 2h = Sep-
arate chassis; 3h = Other. Bits [3..0]: 0h
= N/A; 1h = Rear; 2h = Front; 3h = Left;
4h = Right; 5h = Top; 6h = Bottom;
7h-9h = Special; Ah-Fh = Reserved
A
Default device: 0h = Line out; 1h =
Speaker; 2h = HP out; 3h = CD; 4h =
SPDIF Out; 5h = Digital other out; 6h =
Modem line side; 7h = Modem handset
side; 8h = Line in; 9h = Aux; Ah = Mic in;
Bh = Telephony; Ch = SPDIF In; Dh =
Digital other in; Eh = Reserved; Fh =
Other
[19.:16]
ConnectionType
RW
1
Connection type: 0h = Unknown; 1h =
1/8" stereo/mono; 2h = 1/4" stereo/mo-
no; 3h = ATAPI internal; 4h = RCA; 5h =
Optical; 6h = Other digital; 7h = Other
analog; 8h = Multichannel analog (DIN);
9h = XLR/Professional; Ah = RJ-11 (mo-
dem); Bh = Combination; Ch-Eh = Re-
served; Fh = Other
[15.:12]
[11.:8]
Color
Misc
RW
RW
9
0
Color: 0h = Unknown; 1h = Black; 2h =
Grey; 3h = Blue; 4h = Green; 5h = Red;
6h = Orange; 7h = Yellow; 8h = Purple;
9h = Pink; Ah-Dh = Reserved; Eh =
White; Fh = Other
Miscellaneous: Bits [3..1] = Reserved;
Bit 0 = Jack detect override
[7.:4]
[3.:0]
Association
Sequence
RW
RW
4
0
Default assocation.
Sequence.
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Ten Channel HD Audio Codec
5.5. Port C Node (NID = 0C)
5.5.1.
PortC WCap
Verb ID
Payload
Response
F00
09
See bitfield table.
Get
5.5.1.1.
PortC WCap
Bit
Bitfield Name
RW
R
Reset
00
Description
[31.:24]
[23.:20]
Rsvd2
Reserved.
Type
R
4
Widget type: 0h = Out Converter; 1h = In
Converter; 2h = Summing (Mixer); 3h =
Selector (Mux); 4h = Pin Complex; 5h =
Power; 6h = Volume Knob; 7h = Beep
Generator; 8h-Eh = Reserved; Fh =
Vendor Defined
[19.:16]
Delay
R
0
Number of sample delays through wid-
get.
[15.:12]
[11]
Rsvd1
R
R
R
R
0
0
0
0
Reserved.
SwapCap
PwrCntrl
Dig
Left/right swap support: 1 = yes 0 = no.
Power state support: 1 = yes 0 = no.
[10]
[9]
Digital stream support: 1 = yes (digital)
0 = no (analog).
[8]
[7]
ConnList
R
R
1
1
Connection list present: 1 = yes 0 = no.
UnSolCap
Unsolicited response support:
1 = yes 0 = no.
[6]
ProcWidget
R
0
Processing state support:
1 = yes 0 = no.
[5]
[4]
[3]
Stripe
R
R
R
0
0
0
Striping support: 1 = yes 0 = no.
FormatOvrd
AmpParOvrd
Stream format override: 1 = yes 0 = no.
Amplifier capabilities override:
1 = yes no.
[2]
OutAmpPrsnt
R
0
Output amp present: 1 = yes 0 = no.
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Ten Channel HD Audio Codec
5.5.1.1.
PortC WCap
Bit
Bitfield Name
RW
Reset
Description
[1]
[0]
InAmpPrsnt
Stereo
R
1
1
Input amp present: 1 = yes 0 = no.
R
Stereo stream support: 1 = yes (stereo)
0 = no (mono).
5.5.2.
PortC PinCap
Verb ID
Payload
Response
F00
0C
See bitfield table.
Get
5.5.2.1.
PortC PinCap
Bit
Bitfield Name
RW
R
Reset
Description
[31.:17]
[16]
Rsvd2
0000
0
Reserved.
EapdCap
VrefCntrl
R
EAPD support: 1 = yes 0 = no.
[15.:8]
R
17
Vref support: bit 7 = Reserved; bit 6 =
Reserved; bit 5 = 100% support (1 = yes
0 = no); bit 4 = 80% support (1 = yes 0
= no); bit 3 = Reserved; bit 2 = GND sup-
port (1 = yes 0 = no); bit 1 = 50% sup-
port (1 = yes 0 = no); bit 0 = Hi-Z
support (1 = yes 0 = no)
[7]
[6]
[5]
[4]
[3]
Rsvd1
R
R
R
R
R
0
0
1
1
0
Reserved.
BalancedIO
InCap
Balanced I/O support: 1 = yes 0 = no.
Input support: 1 = yes 0 = no.
Output support: 1 = yes 0 = no.
OutCap
HdphDrvCap
Headphone amp present:
1 = yes 0 = no.
[2]
[1]
[0]
PresDtctCap
TrigRqd
R
R
R
1
1
1
Presence detection support:
1 = yes 0 = no.
Trigger required for impedance sense:
1 = yes 0 = no.
ImpSenseCap
Impedance sense support:
1 = yes 0 = no.
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Ten Channel HD Audio Codec
5.5.3.
PortC ConLst
Verb ID
Payload
Response
F00
0E
See bitfield table.
Get
5.5.3.1.
PortC ConLst
Bit
Bitfield Name
Rsvd
RW
R
Reset
Description
[31.:8]
[7]
000000
0
Reserved.
LForm
R
Connection list format: 1 = long-form
(15-bit) NID entries 0 = short-form
(7-bit) NID entries.
[6.:0]
ConL
R
03
Number of NID entries in connection list.
5.5.4.
PortC ConLstEntry0
Verb ID
Payload
Response
F02
00
See bitfield table.
Get
5.5.4.1.
PortC ConLstEntry0
Bitfield Name
ConL3
Bit
RW
R
Reset
00
Description
Unused list entry.
[31.:24]
[23.:16]
[15]
ConL2
R
17
1
InputMixer Summing widget (0x1E)
1 = ConL0..ConL1 defines a range of select-
able inputs.
ConL1Range
R
[14.:8]
[7.:0]
ConL1
ConL0
R
R
19
15
DAC4 Converter widget (0x19)
DAC0 Converter widget (0x15)
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Ten Channel HD Audio Codec
5.5.5.
PortC ConSelectCtrl
Verb ID
Payload
Response
F01
00
See bitfield table.
Get
5.5.5.1.
PortC ConSelectCtrl
Bitfield Name
Rsvd
Bit
RW
R
Reset
00000000 Reserved.
0 Connection select control index.
Description
[31.:2]
[1.:0]
Index
RW
5.5.6.
PortC PinWCntrl
Verb ID
Payload
Response
F07
00
See bitfield table.
Get
5.5.6.1.
PortC PinWCntrl
Bit
Bitfield Name
RW
R
Reset
Description
[31.:6]
[5]
Rsvd2
0000000
Reserved.
InEn
RW
R
0
0
0
Input enable: 1 = enabled 0 = disabled.
Reserved.
[4.:3]
[2.:0]
Rsvd1
VRefEn
RW
Vref selection (See VrefCntrl field of
PinCap parameter for supported selec-
tions): 000b= HI-Z; 001b= 50%; 010b=
GND; 011b= Reserved; 100b= 80%;
101b= 100%; 110b= Reserved; 111b=
Reserved
5.5.7.
PortC UnsolResp
Verb ID
Payload
Response
F08
00
See bitfield table.
Get
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92HD73E
Ten Channel HD Audio Codec
5.5.7.1.
PortC UnsolResp
Bitfield Name
Rsvd2
Bit
RW
Reset
000000
0
Description
[31.:8]
[7]
R
Reserved.
En
RW
Unsolicited response enable: 1 = en-
abled 0 = disabled.
[6]
Rsvd1
Tag
R
0
Reserved.
[5.:0]
RW
00
Software programmable field returned
in top six bits (31:26) of every Unsolicit-
ed Response generated by this node.
5.5.8.
PortC ChSense
Verb ID
Payload
Response
F09
00
See bitfield table.
Get
5.5.8.1.
Bit
PortC ChSense
Bitfield Name
RW
Reset
Description
[31]
PresDtct
R
0
Presence detection indicator: 1 = pres-
ence detected; 0 = presence not detect-
ed.
Impedance Sense Value (Bits 30:1): Mea-
sured impedence of the widget. An all ones
value indicates an invalid sense reading
[30.:1]
[0]
Impedence
Execute
R
3FFFFFFF
1
Impedance Sense Value (Bit 0)/Trigger:
Read = Impedance value bit 0
Write 0 = Impedance sense occurs using left
channel
RW
Write 1 = Impedance sense occurs using
right channel
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Ten Channel HD Audio Codec
5.5.9.
PortC InAmpLeft
Verb ID
Payload
Response
B20
00
See bitfield table.
Get
5.5.9.1.
PortC InAmpLeft
Bit
Bitfield Name
Rsvd1
Gain
RW
R
Reset
00000000 Reserved.
Description
[31.:2]
[1.:0]
Amp gain step number (see InAmpCap pa-
rameter pertaining to this widget).
RW
0
5.5.10. PortC InAmpRight
Verb ID
Payload
Response
B00
00
See bitfield table.
Get
5.5.10.1. PortC InAmpRight
Bit
[31.:2]
[1.:0]
Bitfield Name
Rsvd1
Gain
RW
R
Reset
00000000 Reserved.
Description
Amp gain step number (see InAmpCap pa-
rameter pertaining to this widget).
RW
0
5.5.11. PortC ConfigDefault
Verb ID
Payload
Response
F1C
00
See bitfield table.
Get
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Ten Channel HD Audio Codec
5.5.11.1. PortC ConfigDefault
Bit
Bitfield Name
RW
Reset
Description
[31.:30]
PortConnectivity
RW
0
Port connectivity: 0h = Port complex is
connected to a jack; 1h = No physical
connection for port; 2h = Fixed function
device is attached; 3h = Both jack and
internal device attached (info in all other
fields refers to integrated device any
presence detection refers to jack)
[29.:24]
[23.:20]
Location
Device
RW
RW
1
8
Location. Bits [5..4]: 0h = External on
primary chassis; 1h = Internal; 2h = Sep-
arate chassis; 3h = Other. Bits [3..0]: 0h
= N/A; 1h = Rear; 2h = Front; 3h = Left;
4h = Right; 5h = Top; 6h = Bottom;
7h-9h = Special; Ah-Fh = Reserved
Default device: 0h = Line out; 1h =
Speaker; 2h = HP out; 3h = CD; 4h =
SPDIF Out; 5h = Digital other out; 6h =
Modem line side; 7h = Modem handset
side; 8h = Line in; 9h = Aux; Ah = Mic in;
Bh = Telephony; Ch = SPDIF In; Dh =
Digital other in; Eh = Reserved; Fh =
Other
[19.:16]
ConnectionType
RW
1
Connection type: 0h = Unknown; 1h =
1/8" stereo/mono; 2h = 1/4" stereo/mo-
no; 3h = ATAPI internal; 4h = RCA; 5h =
Optical; 6h = Other digital; 7h = Other
analog; 8h = Multichannel analog (DIN);
9h = XLR/Professional; Ah = RJ-11 (mo-
dem); Bh = Combination; Ch-Eh = Re-
served; Fh = Other
[15.:12]
[11.:8]
Color
Misc
RW
RW
3
0
Color: 0h = Unknown; 1h = Black; 2h =
Grey; 3h = Blue; 4h = Green; 5h = Red;
6h = Orange; 7h = Yellow; 8h = Purple;
9h = Pink; Ah-Dh = Reserved; Eh =
White; Fh = Other
Miscellaneous: Bits [3..1] = Reserved;
Bit 0 = Jack detect override
[7.:4]
[3.:0]
Association
Sequence
RW
RW
2
1
Default assocation.
Sequence.
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Ten Channel HD Audio Codec
5.6. Port D Node (NID = 0D)
5.6.1.
PortD WCap
Verb ID
Payload
Response
F00
09
See bitfield table.
Get
5.6.1.1.
PortD WCap
Bit
Bitfield Name
RW
R
Reset
00
Description
[31.:24]
[23.:20]
Rsvd2
Reserved.
Type
R
4
Widget type: 0h = Out Converter; 1h = In
Converter; 2h = Summing (Mixer); 3h =
Selector (Mux); 4h = Pin Complex; 5h =
Power; 6h = Volume Knob; 7h = Beep
Generator; 8h-Eh = Reserved; Fh =
Vendor Defined
[19.:16]
Delay
R
0
Number of sample delays through wid-
get.
[15.:12]
[11]
Rsvd1
R
R
R
R
0
0
0
0
Reserved.
SwapCap
PwrCntrl
Dig
Left/right swap support: 1 = yes 0 = no.
Power state support: 1 = yes 0 = no.
[10]
[9]
Digital stream support: 1 = yes (digital)
0 = no (analog).
[8]
[7]
ConnList
R
R
1
1
Connection list present: 1 = yes 0 = no.
UnSolCap
Unsolicited response support:
1 = yes 0 = no.
[6]
ProcWidget
R
0
Processing state support:
1 = yes 0 = no.
[5]
[4]
[3]
Stripe
R
R
R
0
0
1
Striping support: 1 = yes 0 = no.
FormatOvrd
AmpParOvrd
Stream format override: 1 = yes 0 = no.
Amplifier capabilities override:
1 = yes no.
[2]
OutAmpPrsnt
R
1
Output amp present: 1 = yes 0 = no.
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5.6.1.1.
PortD WCap
Bit
Bitfield Name
RW
Reset
Description
[1]
[0]
InAmpPrsnt
Stereo
R
1
1
Input amp present: 1 = yes 0 = no.
R
Stereo stream support: 1 = yes (stereo)
0 = no (mono).
5.6.2.
PortD PinCap
Verb ID
Payload
Response
F00
0C
See bitfield table.
Get
5.6.2.1.
PortD PinCap
Bit
Bitfield Name
RW
R
Reset
Description
[31.:17]
[16]
Rsvd2
0000
0
Reserved.
EapdCap
VrefCntrl
R
EAPD support: 1 = yes 0 = no.
[15.:8]
R
00
Vref support: bit 7 = Reserved; bit 6 =
Reserved; bit 5 = 100% support (1 = yes
0 = no); bit 4 = 80% support (1 = yes 0
= no); bit 3 = Reserved; bit 2 = GND sup-
port (1 = yes 0 = no); bit 1 = 50% sup-
port (1 = yes 0 = no); bit 0 = Hi-Z
support (1 = yes 0 = no)
[7]
[6]
[5]
[4]
[3]
Rsvd1
R
R
R
R
R
0
0
1
1
1
Reserved.
BalancedIO
InCap
Balanced I/O support: 1 = yes 0 = no.
Input support: 1 = yes 0 = no.
Output support: 1 = yes 0 = no.
OutCap
HdphDrvCap
Headphone amp present:
1 = yes 0 = no.
[2]
[1]
[0]
PresDtctCap
TrigRqd
R
R
R
1
0
0
Presence detection support:
1 = yes 0 = no.
Trigger required for impedance sense:
1 = yes 0 = no.
ImpSenseCap
Impedance sense support:
1 = yes 0 = no.
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Ten Channel HD Audio Codec
5.6.3.
PortD ConLst
Verb ID
Payload
Response
F00
0E
See bitfield table.
Get
5.6.3.1.
PortD ConLst
Bit
Bitfield Name
Rsvd
RW
R
Reset
Description
[31.:8]
[7]
000000
0
Reserved.
LForm
R
Connection list format: 1 = long-form
(15-bit) NID entries 0 = short-form
(7-bit) NID entries.
[6.:0]
ConL
R
03
Number of NID entries in connection list.
5.6.4.
PortD ConLstEntry0
Verb ID
Payload
Response
F02
00
See bitfield table.
Get
5.6.4.1.
PortD ConLstEntry0
Bitfield Name
ConL3
Bit
RW
R
Reset
00
Description
Unused list entry.
[31.:24]
[23.:16]
[15]
ConL2
R
1E
1
MixerOutVol Summing widget (0x1E)
1 = ConL0..ConL1 defines a range of select-
able inputs.
ConL1Range
R
[15.:8]
[7.:0]
ConL1
ConL0
R
R
19
15
DAC4 Converter widget (0x19)
DAC0 Converter widget (0x15)
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Ten Channel HD Audio Codec
5.6.5.
PortD ConSelectCtrl
Verb ID
Payload
Response
F01
00
See bitfield table.
Get
5.6.5.1.
PortD ConSelectCtrl
Bitfield Name
Rsvd
Bit
RW
R
Reset
00000000 Reserved.
0 Connection select control index.
Description
[31.:2]
[1.:0]
Index
RW
5.6.6.
PortD PinWCntrl
Verb ID
Payload
Response
F07
00
See bitfield table.
Get
5.6.6.1.
PortD PinWCntrl
Bit
Bitfield Name
RW
R
Reset
Description
[31.:8]
[7]
Rsvd2
000000
0
Reserved.
Headphone amp enable:
1 = enabled, 0 = disabled.
HPhnEn
OutEn
RW
[6]
RW
RW
R
0
0
0
Output enable:
1 = enabled 0 = disabled.
[5]
InEn
Input enable:
1 = enabled 0 = disabled.
[4.:0]
Rsvd1
Reserved.
5.6.7.
PortD UnsolResp
Verb ID
Payload
Response
See bitfield table.
F08
00
Get
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Ten Channel HD Audio Codec
5.6.7.1.
PortD UnsolResp
Bitfield Name
Rsvd2
Bit
RW
Reset
000000
0
Description
[31.:8]
[7]
R
Reserved.
En
RW
Unsolicited response enable: 1 = en-
abled 0 = disabled.
[6]
Rsvd1
Tag
R
0
Reserved.
[5.:0]
RW
00
Software programmable field returned
in top six bits (31:26) of every Unsolicit-
ed Response generated by this node.
5.6.8.
PortD ChSense
Verb ID
Payload
Response
F09
00
See bitfield table.
Get
5.6.8.1.
PortD ChSense
Bit
Bitfield Name
RW
Reset
Description
[31]
PresDtct
R
0
Presence detection indicator: 1 = pres-
ence detected; 0 = presence not detect-
ed.
3FFFFFFFh Impedance Sense Value (Bits 30:1): Mea-
sured impedence of the widget. An all ones
value indicates an invalid sense reading
[30.:1]
[0]
Impedence
Execute
R
Impedance Sense Value (Bit 0)/Trigger:
Read = Impedance value bit 0
Write 0 = Impedance sense occurs using left
channel
RW
1
Write 1 = Impedance sense occurs using
right channel
5.6.9.
PortD InAmpLeft
Verb ID
Payload
Response
B20
00
See bitfield table.
Get
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Ten Channel HD Audio Codec
5.6.9.1.
PortD InAmpLeft
Bitfield Name
Rsvd1
Bit
RW
Reset
000000
0
Description
[31.:2]
[1.:0]
R
Reserved.
Amp gain step number (see InAmpCap pa-
rameter pertaining to this widget).
Gain
RW
5.6.10. PortD InAmpRight
Verb ID
Payload
Response
B00
00
See bitfield table.
Get
5.6.10.1. PortD InAmpRight
Bit
[31.:2]
[1.:0]
Bitfield Name
Rsvd1
Gain
RW
R
Reset
000000
0
Description
Reserved.
Amp gain step number (see InAmpCap pa-
rameter pertaining to this widget).
RW
5.6.11. PortD ConfigDefault
Verb ID
Payload
Response
F1C
00
See bitfield table.
Get
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Ten Channel HD Audio Codec
5.6.11.1. PortD ConfigDefault
Bit
Bitfield Name
RW
Reset
Description
[31.:30]
PortConnectivity
RW
0
Port connectivity: 0h = Port complex is
connected to a jack; 1h = No physical
connection for port; 2h = Fixed function
device is attached; 3h = Both jack and
internal device attached (info in all other
fields refers to integrated device any
presence detection refers to jack)
[29.:24]
[23.:20]
Location
Device
RW
RW
1
0
Location. Bits [5..4]: 0h = External on
primary chassis; 1h = Internal; 2h = Sep-
arate chassis; 3h = Other. Bits [3..0]: 0h
= N/A; 1h = Rear; 2h = Front; 3h = Left;
4h = Right; 5h = Top; 6h = Bottom;
7h-9h = Special; Ah-Fh = Reserved
Default device: 0h = Line out; 1h =
Speaker; 2h = HP out; 3h = CD; 4h =
SPDIF Out; 5h = Digital other out; 6h =
Modem line side; 7h = Modem handset
side; 8h = Line in; 9h = Aux; Ah = Mic in;
Bh = Telephony; Ch = SPDIF In; Dh =
Digital other in; Eh = Reserved; Fh =
Other
[19.:16]
ConnectionType
RW
1
Connection type: 0h = Unknown; 1h =
1/8" stereo/mono; 2h = 1/4" stereo/mo-
no; 3h = ATAPI internal; 4h = RCA; 5h =
Optical; 6h = Other digital; 7h = Other
analog; 8h = Multichannel analog (DIN);
9h = XLR/Professional; Ah = RJ-11 (mo-
dem); Bh = Combination; Ch-Eh = Re-
served; Fh = Other
[15.:12]
[11.:8]
Color
Misc
RW
RW
4
0
Color: 0h = Unknown; 1h = Black; 2h =
Grey; 3h = Blue; 4h = Green; 5h = Red;
6h = Orange; 7h = Yellow; 8h = Purple;
9h = Pink; Ah-Dh = Reserved; Eh =
White; Fh = Other
Miscellaneous: Bits [3..1] = Reserved;
Bit 0 = Jack detect override
[7.:4]
[3.:0]
Association
Sequence
RW
RW
1
0
Default assocation.
Sequence.
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Ten Channel HD Audio Codec
5.7. PortE Node (NID = 0E)
5.7.1.
PortE WCap
Verb ID
Payload
Response
F00
09
See bitfield table.
Get
5.7.1.1.
PortE WCap
Bit
Bitfield Name
RW
R
Reset
00
Description
[31.:24]
[23.:20]
Rsvd2
Reserved.
Type
R
4
Widget type: 0h = Out Converter; 1h = In
Converter; 2h = Summing (Mixer); 3h =
Selector (Mux); 4h = Pin Complex; 5h =
Power; 6h = Volume Knob; 7h = Beep
Generator; 8h-Eh = Reserved; Fh =
Vendor Defined
[19.:16]
Delay
R
0
Number of sample delays through wid-
get.
[15.:12]
[11]
Rsvd1
R
R
R
R
0
0
0
0
Reserved.
SwapCap
PwrCntrl
Dig
Left/right swap support: 1 = yes 0 = no.
Power state support: 1 = yes 0 = no.
[10]
[9]
Digital stream support: 1 = yes (digital)
0 = no (analog).
[8]
[7]
ConnList
R
R
1
1
Connection list present: 1 = yes 0 = no.
UnSolCap
Unsolicited response support:
1 = yes 0 = no.
[6]
ProcWidget
R
0
Processing state support:
1 = yes 0 = no.
[5]
[4]
[3]
Stripe
R
R
R
0
0
0
Striping support: 1 = yes 0 = no.
FormatOvrd
AmpParOvrd
Stream format override: 1 = yes 0 = no.
Amplifier capabilities override:
1 = yes no.
[2]
OutAmpPrsnt
R
0
Output amp present: 1 = yes 0 = no.
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Ten Channel HD Audio Codec
5.7.1.1.
PortE WCap
Bit
Bitfield Name
RW
Reset
Description
[1]
[0]
InAmpPrsnt
Stereo
R
1
1
Input amp present: 1 = yes 0 = no.
R
Stereo stream support: 1 = yes (stereo)
0 = no (mono).
5.7.2.
PortE PinCap
Verb ID
Payload
Response
F00
0C
See bitfield table.
Get
5.7.2.1.
PortE PinCap
Bit
Bitfield Name
RW
R
Reset
Description
[31.:17]
[16]
Rsvd2
0000
0
Reserved.
EapdCap
VrefCntrl
R
EAPD support: 1 = yes 0 = no.
[15.:8]
R
17
Vref support: bit 7 = Reserved; bit 6 =
Reserved; bit 5 = 100% support (1 = yes
0 = no); bit 4 = 80% support (1 = yes 0
= no); bit 3 = Reserved; bit 2 = GND sup-
port (1 = yes 0 = no); bit 1 = 50% sup-
port (1 = yes 0 = no); bit 0 = Hi-Z
support (1 = yes 0 = no)
[7]
[6]
[5]
[4]
[3]
Rsvd1
R
R
R
R
R
0
0
1
1
0
Reserved.
BalancedIO
InCap
Balanced I/O support: 1 = yes 0 = no.
Input support: 1 = yes 0 = no.
Output support: 1 = yes 0 = no.
OutCap
HdphDrvCap
Headphone amp present:
1 = yes 0 = no.
[2]
[1]
[0]
PresDtctCap
TrigRqd
R
R
R
1
1
0
Presence detection support:
1 = yes 0 = no.
Trigger required for impedance sense:
1 = yes 0 = no.
ImpSenseCap
Impedance sense support:
1 = yes 0 = no.
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Ten Channel HD Audio Codec
5.7.3.
PortE ConLst
Verb ID
Payload
Response
F00
0E
See bitfield table.
Get
5.7.3.1.
PortE ConLst
Bit
Bitfield Name
Rsvd
RW
R
Reset
Description
[31.:8]
[7]
000000
0
Reserved.
LForm
R
Connection list format: 1 = long-form
(15-bit) NID entries 0 = short-form
(7-bit) NID entries.
[6.:0]
ConL
R
03
Number of NID entries in connection list.
5.7.4.
PortE ConLstEntry0
Verb ID
Payload
Response
F02
00
See bitfield table.
Get
5.7.4.1.
PortE ConLstEntry0
Bitfield Name
ConL3
Bit
RW
R
Reset
00
Description
Unused list entry.
[31.:24]
[23.:16]
[15]
ConL2
R
1E
1
MixerOutVol Summing widget (0x1E)
1 = ConL0..ConL1 defines a range of select-
able inputs.
ConL1Range
R
[15.:8]
[7.:0]
ConL1
ConL0
R
R
19
15
DAC4 Converter widget (0x19)
DAC0 Converter widget (0x15)
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Ten Channel HD Audio Codec
5.7.5.
PortE ConSelectCtrl
Verb ID
Payload
Response
F01
00
See bitfield table.
Get
5.7.5.1.
PortE ConSelectCtrl
Bitfield Name
Rsvd
Bit
RW
R
Reset
00000000 Reserved.
0 Connection select control index.
Description
[31.:2]
[1.:0]
Index
RW
5.7.6.
PortE PinWCntrl
Verb ID
Payload
Response
F07
00
See bitfield table.
Get
5.7.6.1.
PortE PinWCntrl
Bit
Bitfield Name
RW
R
Reset
Description
[31.:6]
[5]
Rsvd2
0000000
Reserved.
InEn
RW
R
0
0
0
Input enable: 1 = enabled 0 = disabled.
Reserved.
[4.:3]
[2.:0]
Rsvd1
VRefEn
RW
Vref selection (See VrefCntrl field of
PinCap parameter for supported selec-
tions): 000b= HI-Z; 001b= 50%; 010b=
GND; 011b= Reserved; 100b= 80%;
101b= 100%; 110b= Reserved; 111b=
Reserved
5.7.7.
PortE UnsolResp
Verb ID
Payload
Response
F08
00
See bitfield table.
Get
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Ten Channel HD Audio Codec
5.7.7.1.
PortE UnsolResp
Bitfield Name
Rsvd2
Bit
RW
Reset
000000
0
Description
[31.:8]
[7]
R
Reserved.
En
RW
Unsolicited response enable: 1 = en-
abled 0 = disabled.
[6]
Rsvd1
Tag
R
0
Reserved.
[5.:0]
RW
00
Software programmable field returned
in top six bits (31:26) of every Unsolicit-
ed Response generated by this node.
5.7.8.
PortE ChSense
Verb ID
Payload
Response
F09
00
See bitfield table.
Get
5.7.8.1.
PortD ChSense
Bit
Bitfield Name
RW
Reset
Description
[31]
PresDtct
R
0
Presence detection indicator: 1 = pres-
ence detected; 0 = presence not detect-
ed.
3FFFFFFFh Impedance Sense Value (Bits 30:1): Mea-
sured impedence of the widget. An all ones
value indicates an invalid sense reading
[30.:1]
[0]
Impedence
Execute
R
Impedance Sense Value (Bit 0)/Trigger:
Read = Impedance value bit 0
Write 0 = Impedance sense occurs using left
channel
RW
1
Write 1 = Impedance sense occurs using
right channel
5.7.9.
PortE InAmpLeft
Verb ID
Payload
Response
B20
00
See bitfield table.
Get
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Ten Channel HD Audio Codec
5.7.9.1.
PortE InAmpLeft
Bitfield Name
Rsvd1
Bit
RW
Reset
000000
0
Description
[31.:2]
[1.:0]
R
Reserved.
Amp gain step number (see InAmpCap pa-
rameter pertaining to this widget).
Gain
RW
5.7.10. PortE InAmpRight
Verb ID
Payload
Response
B00
00
See bitfield table.
Get
5.7.10.1. PortE InAmpRight
Bit
[31.:2]
[1.:0]
Bitfield Name
Rsvd1
Gain
RW
R
Reset
000000
0
Description
Reserved.
Amp gain step number (see InAmpCap pa-
rameter pertaining to this widget).
RW
5.7.11. PortE ConfigDefault
Verb ID
Payload
Response
F1C
00
See bitfield table.
Get
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Ten Channel HD Audio Codec
5.7.11.1. PortE ConfigDefault
Bit
Bitfield Name
RW
Reset
Description
[31.:30]
PortConnectivity
RW
0
Port connectivity: 0h = Port complex is
connected to a jack; 1h = No physical
connection for port; 2h = Fixed function
device is attached; 3h = Both jack and
internal device attached (info in all other
fields refers to integrated device any
presence detection refers to jack)
[29.:24]
[23.:20]
Location
Device
RW
RW
1
Location. Bits [5..4]: 0h = External on
primary chassis; 1h = Internal; 2h = Sep-
arate chassis; 3h = Other. Bits [3..0]: 0h
= N/A; 1h = Rear; 2h = Front; 3h = Left;
4h = Right; 5h = Top; 6h = Bottom;
7h-9h = Special; Ah-Fh = Reserved
A
Default device: 0h = Line out; 1h =
Speaker; 2h = HP out; 3h = CD; 4h =
SPDIF Out; 5h = Digital other out; 6h =
Modem line side; 7h = Modem handset
side; 8h = Line in; 9h = Aux; Ah = Mic in;
Bh = Telephony; Ch = SPDIF In; Dh =
Digital other in; Eh = Reserved; Fh =
Other
[19.:16]
ConnectionType
RW
1
Connection type: 0h = Unknown; 1h =
1/8" stereo/mono; 2h = 1/4" stereo/mo-
no; 3h = ATAPI internal; 4h = RCA; 5h =
Optical; 6h = Other digital; 7h = Other
analog; 8h = Multichannel analog (DIN);
9h = XLR/Professional; Ah = RJ-11 (mo-
dem); Bh = Combination; Ch-Eh = Re-
served; Fh = Other
[15.:12]
[11.:8]
Color
Misc
RW
RW
9
0
Color: 0h = Unknown; 1h = Black; 2h =
Grey; 3h = Blue; 4h = Green; 5h = Red;
6h = Orange; 7h = Yellow; 8h = Purple;
9h = Pink; Ah-Dh = Reserved; Eh =
White; Fh = Other
Miscellaneous: Bits [3..1] = Reserved;
Bit 0 = Jack detect override
[7.:4]
[3.:0]
Association
Sequence
RW
RW
2
0
Default assocation.
Sequence.
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Ten Channel HD Audio Codec
5.8. PortF Node (NID = 0F)
5.8.1.
PortF WCap
Verb ID
Payload
Response
F00
09
See bitfield table.
Get
5.8.1.1.
PortF WCap
Bit
Bitfield Name
RW
R
Reset
00
Description
[31.:24]
[23.:20]
Rsvd2
Reserved.
Type
R
4
Widget type: 0h = Out Converter; 1h = In
Converter; 2h = Summing (Mixer); 3h =
Selector (Mux); 4h = Pin Complex; 5h =
Power; 6h = Volume Knob; 7h = Beep
Generator; 8h-Eh = Reserved; Fh =
Vendor Defined
[19.:16]
Delay
R
0
Number of sample delays through wid-
get.
[15.:12]
[11]
Rsvd1
R
R
R
R
0
0
0
0
Reserved.
SwapCap
PwrCntrl
Dig
Left/right swap support: 1 = yes 0 = no.
Power state support: 1 = yes 0 = no.
[10]
[9]
Digital stream support: 1 = yes (digital)
0 = no (analog).
[8]
[7]
ConnList
R
R
1
1
Connection list present: 1 = yes 0 = no.
UnSolCap
Unsolicited response support:
1 = yes 0 = no.
[6]
ProcWidget
R
0
Processing state support:
1 = yes 0 = no.
[5]
[4]
[3]
Stripe
R
R
R
0
0
0
Striping support: 1 = yes 0 = no.
FormatOvrd
AmpParOvrd
Stream format override: 1 = yes 0 = no.
Amplifier capabilities override:
1 = yes no.
[2]
OutAmpPrsnt
R
0
Output amp present: 1 = yes 0 = no.
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Ten Channel HD Audio Codec
5.8.1.1.
PortF WCap
Bit
Bitfield Name
RW
Reset
Description
[1]
[0]
InAmpPrsnt
Stereo
R
1
1
Input amp present: 1 = yes 0 = no.
R
Stereo stream support: 1 = yes (stereo)
0 = no (mono).
5.8.2.
PortF PinCap
Verb ID
Payload
Response
F00
0C
See bitfield table.
Get
5.8.2.1.
PortF PinCap
Bit
Bitfield Name
RW
R
Reset
Description
[31.:17]
[16]
Rsvd2
0000
0
Reserved.
EapdCap
VrefCntrl
R
EAPD support: 1 = yes 0 = no.
[15.:8]
R
00
Vref support: bit 7 = Reserved; bit 6 =
Reserved; bit 5 = 100% support (1 = yes
0 = no); bit 4 = 80% support (1 = yes 0
= no); bit 3 = Reserved; bit 2 = GND sup-
port (1 = yes 0 = no); bit 1 = 50% sup-
port (1 = yes 0 = no); bit 0 = Hi-Z
support (1 = yes 0 = no)
[7]
[6]
[5]
[4]
[3]
Rsvd1
R
R
R
R
R
0
0
1
1
0
Reserved.
BalancedIO
InCap
Balanced I/O support: 1 = yes 0 = no.
Input support: 1 = yes 0 = no.
Output support: 1 = yes 0 = no.
OutCap
HdphDrvCap
Headphone amp present:
1 = yes 0 = no.
[2]
[1]
[0]
PresDtctCap
TrigRqd
R
R
R
1
1
1
Presence detection support:
1 = yes 0 = no.
Trigger required for impedance sense:
1 = yes 0 = no.
ImpSenseCap
Impedance sense support:
1 = yes 0 = no.
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Ten Channel HD Audio Codec
5.8.3.
PortF ConLst
Verb ID
Payload
Response
F00
0E
See bitfield table.
Get
5.8.3.1.
PortF ConLst
Bit
Bitfield Name
Rsvd
RW
R
Reset
Description
[31.:8]
[7]
000000
0
Reserved.
LForm
R
Connection list format: 1 = long-form
(15-bit) NID entries 0 = short-form
(7-bit) NID entries.
[6.:0]
ConL
R
03
Number of NID entries in connection list.
5.8.4.
PortF ConLstEntry0
Verb ID
Payload
Response
F02
00
See bitfield table.
Get
5.8.4.1.
PortF ConLstEntry0
Bitfield Name
ConL3
Bit
RW
R
Reset
00
Description
Unused list entry.
[31.:24]
[23.:16]
[15]
ConL2
R
17
1
InputMixer Summing widget (0x17)
1 = ConL0..ConL1 defines a range of select-
able inputs.
ConL1Range
R
[14.:8]
[7.:0]
ConL1
ConL0
R
R
11
10
DAC1 Converter widget (0x11)
DAC0 Converter widget (0x10)
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Ten Channel HD Audio Codec
5.8.5.
PortF ConSelectCtrl
Verb ID
Payload
Response
F01
00
See bitfield table.
Get
5.8.5.1.
PortF ConSelectCtrl
Bitfield Name
Rsvd
Bit
RW
R
Reset
00000000 Reserved.
0 Connection select control index.
Description
[31.:2]
[1.:0]
Index
RW
5.8.6.
PortF PinWCntrl
Verb ID
Payload
Response
F07
00
See bitfield table.
Get
5.8.6.1.
PortF PinWCntrl
Bit
Bitfield Name
RW
R
Reset
Description
[31.:7]
[6]
Rsvd2
000000
0
Reserved.
OutEn
RW
Output enable:
1 = enabled 0 = disabled.
input enable: 1 = enabled 0 = disabled.
Reserved.
[5]
InEn
RW
R
0
0
[4.:0]
Rsvd1
5.8.7.
PortF UnsolResp
Verb ID
Payload
Response
F08
00
See bitfield table.
Get
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Ten Channel HD Audio Codec
5.8.7.1.
PortF UnsolResp
Bitfield Name
Rsvd2
Bit
RW
Reset
000000
0
Description
[31.:8]
[7]
R
Reserved.
En
RW
Unsolicited response enable: 1 = en-
abled 0 = disabled.
[6]
Rsvd1
Tag
R
0
Reserved.
[5.:0]
RW
00
Software programmable field returned
in top six bits (31:26) of every Unsolicit-
ed Response generated by this node.
5.8.8.
PortF ChSense
Verb ID
Payload
Response
F09
00
See bitfield table.
Get
5.8.8.1.
PortF ChSense
Bit
Bitfield Name
RW
Reset
Description
[31]
PresDtct
R
0
Presence detection indicator: 1 = pres-
ence detected; 0 = presence not detect-
ed.
3FFFFFFF
h
Impedance Sense Value (Bits 30:1): Mea-
sured impedence of the widget. An all ones
value indicates an invalid sense reading
[30.:1]
[0]
Impedence
Execute
R
Impedance Sense Value (Bit 0)/Trigger:
Read = Impedance value bit 0
Write 0 = Impedance sense occurs using left
channel
RW
1
Write 1 = Impedance sense occurs using
right channel
5.8.9.
PortF InAmpLeft
Verb ID
Payload
Response
B20
00
See bitfield table.
Get
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Ten Channel HD Audio Codec
5.8.9.1.
PortF InAmpLeft
Bitfield Name
Rsvd1
Bit
RW
Reset
000000
0
Description
[31.:2]
[1.:0]
R
Reserved.
Amp gain step number (see InAmpCap pa-
rameter pertaining to this widget).
Gain
RW
5.8.10. PortF InAmpRight
Verb ID
Payload
Response
B00
00
See bitfield table.
Get
5.8.10.1. PortF InAmpRight
Bit
[31.:2]
[1.:0]
Bitfield Name
Rsvd1
Gain
RW
R
Reset
000000
0
Description
Reserved.
Amp gain step number (see InAmpCap pa-
rameter pertaining to this widget).
RW
5.9. PortG Node (NID = 10)
5.9.1.
PortG WCap
Verb ID
Payload
Response
F00
09
See bitfield table.
Get
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Ten Channel HD Audio Codec
5.9.1.1.
PortG WCap
Bit
Bitfield Name
RW
Reset
00
Description
[31.:24]
[23.:20]
Rsvd2
Type
R
Reserved.
R
4
Widget type: 0h = Out Converter; 1h = In
Converter; 2h = Summing (Mixer); 3h =
Selector (Mux); 4h = Pin Complex; 5h =
Power; 6h = Volume Knob; 7h = Beep
Generator; 8h-Eh = Reserved; Fh =
Vendor Defined
[19.:16]
Delay
R
0
Number of sample delays through wid-
get.
[15.:12]
[11]
Rsvd1
R
R
R
R
0
0
0
0
Reserved.
SwapCap
PwrCntrl
Dig
Left/right swap support: 1 = yes 0 = no.
Power state support: 1 = yes 0 = no.
[10]
[9]
Digital stream support: 1 = yes (digital)
0 = no (analog).
[8]
[7]
ConnList
R
R
1
1
Connection list present: 1 = yes 0 = no.
UnSolCap
Unsolicited response support:
1 = yes 0 = no.
[6]
ProcWidget
R
0
Processing state support:
1 = yes 0 = no.
[5]
[4]
[3]
Stripe
R
R
R
0
0
0
Striping support: 1 = yes 0 = no.
FormatOvrd
AmpParOvrd
Stream format override: 1 = yes 0 = no.
Amplifier capabilities override:
1 = yes no.
[2]
[1]
[0]
OutAmpPrsnt
InAmpPrsnt
Stereo
R
R
R
0
1
1
Output amp present: 1 = yes 0 = no.
Input amp present: 1 = yes 0 = no.
Stereo stream support: 1 = yes (stereo)
0 = no (mono).
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Ten Channel HD Audio Codec
5.9.2.
PortG PinCap
Verb ID
Payload
Response
F00
0C
See bitfield table.
Get
5.9.2.1.
PortG PinCap
Bit
Bitfield Name
Rsvd2
RW
R
Reset
0000
Description
[31.:17]
[16]
Reserved.
EapdCap
VrefCntrl
R
0
EAPD support: 1 = yes 0 = no.
[15.:8]
R
00
Vref support: bit 7 = Reserved; bit 6 =
Reserved; bit 5 = 100% support (1 = yes
0 = no); bit 4 = 80% support (1 = yes 0
= no); bit 3 = Reserved; bit 2 = GND sup-
port (1 = yes 0 = no); bit 1 = 50% sup-
port (1 = yes 0 = no); bit 0 = Hi-Z
support (1 = yes 0 = no)
[7]
[6]
[5]
[4]
[3]
Rsvd1
R
R
R
R
R
0
0
1
1
0
Reserved.
BalancedIO
InCap
Balanced I/O support: 1 = yes 0 = no.
Input support: 1 = yes 0 = no.
Output support: 1 = yes 0 = no.
OutCap
HdphDrvCap
Headphone amp present:
1 = yes 0 = no.
[2]
[1]
[0]
PresDtctCap
TrigRqd
R
R
R
1
1
1
Presence detection support:
1 = yes 0 = no.
Trigger required for impedance sense:
1 = yes 0 = no.
ImpSenseCap
Impedance sense support:
1 = yes 0 = no.
5.9.3.
PortG ConLst
Verb ID
Payload
Response
F00
0E
See bitfield table.
Get
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Ten Channel HD Audio Codec
5.9.3.1.
PortG ConLst
Bit
Bitfield Name
RW
Reset
000000
0
Description
[31.:8]
[7]
Rsvd
R
Reserved.
LForm
R
Connection list format: 1 = long-form
(15-bit) NID entries 0 = short-form
(7-bit) NID entries.
[6.:0]
ConL
R
03
Number of NID entries in connection list.
5.9.4.
PortG ConLstEntry0
Verb ID
Payload
Response
F02
00
See bitfield table.
Get
5.9.4.1.
PortG ConLstEntry0
Bitfield Name
ConL3
Bit
RW
R
Reset
00
Description
Unused list entry.
[31.:24]
[23.:16]
[15]
ConL2
R
1E
1
MixerOutVol Selector widget (0x1E)
1 = ConL0..ConL1 defines a range of select-
able inputs.
ConL1Range
R
[14.:8]
[7.:0]
ConL1
ConL0
R
R
19
15
DAC4 Converter widget (0x19)
DAC0 Converter widget (0x15)
5.9.5.
PortG ConSelectCtrl
Verb ID
Payload
Response
F01
00
See bitfield table.
Get
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Ten Channel HD Audio Codec
5.9.5.1.
PortG ConSelectCtrl
Bitfield Name
Rsvd
Bit
RW
Reset
Description
[31.:2]
[1.:0]
R
00000000 Reserved.
Index
RW
0
Connection select control index.
5.9.6.
PortG PinWCntrl
Verb ID
Payload
Response
F07
00
See bitfield table.
Get
5.9.6.1.
PortG PinWCntrl
Bit
Bitfield Name
RW
R
Reset
Description
[31.:7]
[6]
Rsvd2
000000
0
Reserved.
OutEn
RW
Output enable:
1 = enabled 0 = disabled.
input enable: 1 = enabled 0 = disabled.
Reserved.
[5]
InEn
RW
R
0
0
[4.:0]
Rsvd1
5.9.7.
PortG UnsolResp
Verb ID
Payload
Response
F08
00
See bitfield table.
Get
5.9.7.1.
PortG UnsolResp
Bitfield Name
Rsvd2
Bit
RW
R
Reset
000000
0
Description
[31.:8]
[7]
Reserved.
En
RW
Unsolicited response enable: 1 = en-
abled 0 = disabled.
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Ten Channel HD Audio Codec
5.9.7.1.
PortG UnsolResp
Bitfield Name
Rsvd1
Bit
RW
Reset
Description
[6]
R
0
Reserved.
[5.:0]
Tag
RW
00
Software programmable field returned
in top six bits (31:26) of every Unsolicit-
ed Response generated by this node.
5.9.8.
PortG ChSense
Verb ID
Payload
Response
F09
00
See bitfield table.
Get
5.9.8.1.
PortG ChSense
Bit
Bitfield Name
RW
Reset
Description
[31]
PresDtct
R
0
Presence detection indicator: 1 = pres-
ence detected; 0 = presence not detect-
ed.
3FFFFFFFh Impedance Sense Value (Bits 30:1): Mea-
sured impedence of the widget. An all ones
value indicates an invalid sense reading
[30.:1]
[0]
Impedence
Execute
R
Impedance Sense Value (Bit 0)/Trigger:
Read = Impedance value bit 0
Write 0 = Impedance sense occurs using left
channel
RW
1
Write 1 = Impedance sense occurs using
right channel
5.9.9.
PortG InAmpLeft
Verb ID
Payload
Response
B20
00
See bitfield table.
Get
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Ten Channel HD Audio Codec
5.9.9.1.
PortG InAmpLeft
Bitfield Name
Rsvd1
Bit
RW
Reset
000000
0
Description
[31.:2]
[1.:0]
R
Reserved.
Amp gain step number (see InAmpCap pa-
rameter pertaining to this widget).
Gain
RW
5.9.10. PortG InAmpRight
Verb ID
Payload
Response
B00
00
See bitfield table.
Get
5.9.10.1. PortG InAmpRight
Bit
[31.:2]
[1.:0]
Bitfield Name
Rsvd1
Gain
RW
R
Reset
000000
0
Description
Reserved.
Amp gain step number (see InAmpCap pa-
rameter pertaining to this widget).
RW
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Ten Channel HD Audio Codec
5.9.11. PortG ConfigDefault
Verb ID
Payload
Response
F1C
00
See bitfield table.
Get
5.9.11.1. PortG ConfigDefault
Bit
Bitfield Name
RW
Reset
Description
[31.:30]
PortConnectivity
RW
0
Port connectivity: 0h = Port complex is
connected to a jack; 1h = No physical
connection for port; 2h = Fixed function
device is attached; 3h = Both jack and
internal device attached (info in all other
fields refers to integrated device any
presence detection refers to jack)
[29.:24]
[23.:20]
Location
Device
RW
RW
01
Location. Bits [5..4]: 0h = External on
primary chassis; 1h = Internal; 2h = Sep-
arate chassis; 3h = Other. Bits [3..0]: 0h
= N/A; 1h = Rear; 2h = Front; 3h = Left;
4h = Right; 5h = Top; 6h = Bottom;
7h-9h = Special; Ah-Fh = Reserved
0
Default device: 0h = Line out; 1h =
Speaker; 2h = HP out; 3h = CD; 4h =
SPDIF Out; 5h = Digital other out; 6h =
Modem line side; 7h = Modem handset
side; 8h = Line in; 9h = Aux; Ah = Mic in;
Bh = Telephony; Ch = SPDIF In; Dh =
Digital other in; Eh = Reserved; Fh =
Other
[19.:16]
ConnectionType
RW
1
Connection type: 0h = Unknown; 1h =
1/8" stereo/mono; 2h = 1/4" stereo/mo-
no; 3h = ATAPI internal; 4h = RCA; 5h =
Optical; 6h = Other digital; 7h = Other
analog; 8h = Multichannel analog (DIN);
9h = XLR/Professional; Ah = RJ-11 (mo-
dem); Bh = Combination; Ch-Eh = Re-
served; Fh = Other
[15.:12]
[11.:8]
Color
Misc
RW
RW
100
6
0
Color: 0h = Unknown; 1h = Black; 2h =
Grey; 3h = Blue; 4h = Green; 5h = Red;
6h = Orange; 7h = Yellow; 8h = Purple;
9h = Pink; Ah-Dh = Reserved; Eh =
White; Fh = Other
Miscellaneous: Bits [3..1] = Reserved;
Bit 0 = Jack detect override
V 1.3 08/11
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Ten Channel HD Audio Codec
5.9.11.1. PortG ConfigDefault
Bit
Bitfield Name
Association
Sequence
RW
RW
RW
Reset
Description
Default assocation.
[7.:4]
[3.:0]
1
1
Sequence.
5.10. PortH Node (NID = 11)
5.10.1. PortH WCap
Verb ID
Payload
Response
F00
09
See bitfield table.
Get
5.10.1.1. PortH WCap
Bit
Bitfield Name
RW
R
Reset
Description
[31.:24]
[23.:20]
Rsvd2
00
4
Reserved.
Type
R
Widget type: 0h = Out Converter; 1h = In
Converter; 2h = Summing (Mixer); 3h =
Selector (Mux); 4h = Pin Complex; 5h =
Power; 6h = Volume Knob; 7h = Beep
Generator; 8h-Eh = Reserved; Fh =
Vendor Defined
[19.:16]
Delay
R
0
Number of sample delays through wid-
get.
[15.:12]
[11]
Rsvd1
R
R
R
R
0
0
0
0
Reserved.
SwapCap
PwrCntrl
Dig
Left/right swap support: 1 = yes 0 = no.
Power state support: 1 = yes 0 = no.
[10]
[9]
Digital stream support: 1 = yes (digital)
0 = no (analog).
[8]
[7]
ConnList
R
R
1
1
Connection list present: 1 = yes 0 = no.
UnSolCap
Unsolicited response support:
1 = yes 0 = no.
[6]
ProcWidget
R
0
Processing state support:
1 = yes 0 = no.
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Ten Channel HD Audio Codec
5.10.1.1. PortH WCap
Bit
Bitfield Name
Stripe
RW
Reset
Description
[5]
[4]
[3]
R
0
0
0
Striping support: 1 = yes 0 = no.
Stream format override: 1 = yes 0 = no.
FormatOvrd
AmpParOvrd
R
R
Amplifier capabilities override:
1 = yes no.
[2]
[1]
[0]
OutAmpPrsnt
InAmpPrsnt
Stereo
R
R
R
0
1
1
Output amp present: 1 = yes 0 = no.
Input amp present: 1 = yes 0 = no.
Stereo stream support: 1 = yes (stereo)
0 = no (mono).
5.10.2. PortH PinCap
Verb ID
Payload
Response
F00
0C
See bitfield table.
Get
5.10.2.1. PortH PinCap
Bit
[31.:17]
[16]
Bitfield Name
RW
R
Reset
Description
Rsvd2
0000
0
Reserved.
EapdCap
VrefCntrl
R
EAPD support: 1 = yes 0 = no.
[15.:8]
R
00
Vref support: bit 7 = Reserved; bit 6 =
Reserved; bit 5 = 100% support (1 = yes
0 = no); bit 4 = 80% support (1 = yes 0
= no); bit 3 = Reserved; bit 2 = GND sup-
port (1 = yes 0 = no); bit 1 = 50% sup-
port (1 = yes 0 = no); bit 0 = Hi-Z
support (1 = yes 0 = no)
[7]
[6]
[5]
[4]
[3]
Rsvd1
R
R
R
R
R
0
0
1
1
0
Reserved.
BalancedIO
InCap
Balanced I/O support: 1 = yes 0 = no.
Input support: 1 = yes 0 = no.
Output support: 1 = yes 0 = no.
OutCap
HdphDrvCap
Headphone amp present:
1 = yes 0 = no.
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5.10.2.1. PortH PinCap
Bit
Bitfield Name
RW
Reset
Description
[2]
[1]
[0]
PresDtctCap
R
1
1
1
Presence detection support:
1 = yes 0 = no.
TrigRqd
R
R
Trigger required for impedance sense:
1 = yes 0 = no.
ImpSenseCap
Impedance sense support:
1 = yes 0 = no.
5.10.3. PortH ConLst
Verb ID
Payload
Response
F00
0E
See bitfield table.
Get
5.10.3.1. PortH ConLst
Bit
[31.:8]
[7]
Bitfield Name
Rsvd
RW
R
Reset
Description
000000
0
Reserved.
LForm
R
Connection list format: 1 = long-form
(15-bit) NID entries 0 = short-form
(7-bit) NID entries.
[6.:0]
ConL
R
03
Number of NID entries in connection list.
5.10.4. PortH ConLstEntry0
Verb ID
Payload
Response
F02
00
See bitfield table.
Get
5.10.4.1. PortH ConLstEntry0
Bit
Bitfield Name
ConL3
ConL2
RW
R
Reset
00
1Eh
Description
Unused list entry.
MixerOutVol Selector widget (0x1E)
[31.:24]
[23.:16]
R
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92HD73E
Ten Channel HD Audio Codec
5.10.4.1. PortH ConLstEntry0
Bit
Bitfield Name
RW
Reset
Description
1 = ConL0..ConL1 defines a range of select-
able inputs.
[15]
ConL1Range
R
1
[14.:8]
[7.:0]
ConL1
ConL0
R
R
19
15
DAC4 Converter widget (0x19)
DAC0 Converter widget (0x15)
5.10.5. PortH ConSelectCtrl
Verb ID
Payload
Response
F01
00
See bitfield table.
Get
5.10.5.1. PortH ConSelectCtrl
Bit
[31.:2]
[1.:0]
Bitfield Name
Rsvd
Index
RW
R
Reset
00000000 Reserved.
0 Connection select control index.
Description
RW
5.10.6. PortH PinWCntrl
Verb ID
Payload
Response
F07
00
See bitfield table.
Get
5.10.6.1. PortH PinWCntrl
Bit
[31.:7]
[6]
Bitfield Name
RW
R
Reset
Description
Rsvd2
000000
0
Reserved.
OutEn
RW
Output enable:
1 = enabled 0 = disabled.
input enable: 1 = enabled 0 = disabled.
Reserved.
[5]
InEn
RW
R
0
0
[4.:0]
Rsvd1
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Ten Channel HD Audio Codec
5.10.7. PortH UnsolResp
Verb ID
Payload
Response
F08
00
See bitfield table.
Get
5.10.7.1. PortH UnsolResp
Bit
[31.:8]
[7]
Bitfield Name
Rsvd2
RW
R
Reset
Description
000000
0
Reserved.
En
RW
Unsolicited response enable: 1 = en-
abled 0 = disabled.
[6]
Rsvd1
Tag
R
0
Reserved.
[5.:0]
RW
00
Software programmable field returned
in top six bits (31:26) of every Unsolicit-
ed Response generated by this node.
5.10.8. PortH ChSense
Verb ID
Payload
Response
F09
00
See bitfield table.
Get
5.10.8.1. PortH ChSense
Bit
Bitfield Name
RW
Reset
Description
[31]
PresDtct
R
0
Presence detection indicator: 1 = pres-
ence detected; 0 = presence not detect-
ed.
3FFFFFFFh Impedance Sense Value (Bits 30:1): Mea-
sured impedence of the widget. An all ones
value indicates an invalid sense reading
[30.:1]
[0]
Impedence
Execute
R
Impedance Sense Value (Bit 0)/Trigger:
Read = Impedance value bit 0
Write 0 = Impedance sense occurs using left
channel
RW
1
Write 1 = Impedance sense occurs using
right channel
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Ten Channel HD Audio Codec
5.10.9. PortH InAmpLeft
Verb ID
Payload
Response
B20
00
See bitfield table.
Get
5.10.9.1. PortH InAmpLeft
Bit
[31.:2]
[1.:0]
Bitfield Name
Rsvd1
Gain
RW
R
Reset
Description
000000
0
Reserved.
Amp gain step number (see InAmpCap pa-
rameter pertaining to this widget).
RW
5.10.10. PortH InAmpRight
Verb ID
Payload
Response
B00
00
See bitfield table.
Get
5.10.10.1. PortH InAmpRight
Bit
[31.:2]
[1.:0]
Bitfield Name
Rsvd1
Gain
RW
R
Reset
000000
0
Description
Reserved.
Amp gain step number (see InAmpCap pa-
rameter pertaining to this widget).
RW
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Ten Channel HD Audio Codec
5.10.11. PortH ConfigDefault
Verb ID
Payload
Response
F1C
00
See bitfield table.
Get
5.10.11.1. PortH ConfigDefault
Bit
Bitfield Name
RW
Reset
Description
[31.:30]
PortConnectivity
RW
0
Port connectivity: 0h = Port complex is
connected to a jack; 1h = No physical
connection for port; 2h = Fixed function
device is attached; 3h = Both jack and
internal device attached (info in all other
fields refers to integrated device any
presence detection refers to jack)
[29.:24]
[23.:20]
Location
Device
RW
RW
01
Location. Bits [5..4]: 0h = External on
primary chassis; 1h = Internal; 2h = Sep-
arate chassis; 3h = Other. Bits [3..0]: 0h
= N/A; 1h = Rear; 2h = Front; 3h = Left;
4h = Right; 5h = Top; 6h = Bottom;
7h-9h = Special; Ah-Fh = Reserved
0
Default device: 0h = Line out; 1h =
Speaker; 2h = HP out; 3h = CD; 4h =
SPDIF Out; 5h = Digital other out; 6h =
Modem line side; 7h = Modem handset
side; 8h = Line in; 9h = Aux; Ah = Mic in;
Bh = Telephony; Ch = SPDIF In; Dh =
Digital other in; Eh = Reserved; Fh =
Other
[19.:16]
ConnectionType
RW
1
Connection type: 0h = Unknown; 1h =
1/8" stereo/mono; 2h = 1/4" stereo/mo-
no; 3h = ATAPI internal; 4h = RCA; 5h =
Optical; 6h = Other digital; 7h = Other
analog; 8h = Multichannel analog (DIN);
9h = XLR/Professional; Ah = RJ-11 (mo-
dem); Bh = Combination; Ch-Eh = Re-
served; Fh = Other
[15.:12]
[11.:8]
Color
Misc
RW
RW
107
2
0
Color: 0h = Unknown; 1h = Black; 2h =
Grey; 3h = Blue; 4h = Green; 5h = Red;
6h = Orange; 7h = Yellow; 8h = Purple;
9h = Pink; Ah-Dh = Reserved; Eh =
White; Fh = Other
Miscellaneous: Bits [3..1] = Reserved;
Bit 0 = Jack detect override
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Ten Channel HD Audio Codec
5.10.11.1. PortH ConfigDefault
Bit
Bitfield Name
Association
Sequence
RW
RW
RW
Reset
Description
Default assocation.
[7.:4]
[3.:0]
1
4
Sequence.
5.11. PortI Node (NID = 12)
5.11.1. PortI WCap
Verb ID
Payload
Response
F00
09
See bitfield table.
Get
5.11.1.1. PortI WCap
Bit
Bitfield Name
Rsvd2
Type
RW
R
Reset
Description
[31.:24]
[23.:20]
00
4
Reserved.
R
Widget type: 0h = Out Converter; 1h = In
Converter; 2h = Summing (Mixer); 3h =
Selector (Mux); 4h = Pin Complex; 5h =
Power; 6h = Volume Knob; 7h = Beep
Generator; 8h-Eh = Reserved; Fh =
Vendor Defined
[19.:16]
Delay
R
0
Number of sample delays through wid-
get.
[15.:12]
[11]
Rsvd1
R
R
R
R
0
0
0
0
Reserved.
SwapCap
PwrCntrl
Dig
Left/right swap support: 1 = yes 0 = no.
Power state support: 1 = yes 0 = no.
[10]
[9]
Digital stream support: 1 = yes (digital)
0 = no (analog).
[8]
[7]
ConnList
R
R
0
1
Connection list present: 1 = yes 0 = no.
UnSolCap
Unsolicited response support:
1 = yes 0 = no.
[6]
ProcWidget
R
0
Processing state support:
1 = yes 0 = no.
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5.11.1.1. PortI WCap
Bit
Bitfield Name
Stripe
RW
Reset
Description
[5]
[4]
[3]
R
0
0
0
Striping support: 1 = yes 0 = no.
Stream format override: 1 = yes 0 = no.
FormatOvrd
AmpParOvrd
R
R
Amplifier capabilities override:
1 = yes no.
[2]
[1]
[0]
OutAmpPrsnt
InAmpPrsnt
Stereo
R
R
R
0
0
1
Output amp present: 1 = yes 0 = no.
Input amp present: 1 = yes 0 = no.
Stereo stream support: 1 = yes (stereo)
0 = no (mono).
5.11.2. PortI PinCap
Verb ID
Payload
Response
F00
0C
See bitfield table.
Get
5.11.2.1. PortI PinCap
Bit
[31.:17]
[16]
Bitfield Name
Rsvd2
RW
R
Reset
Description
0000
0
Reserved.
EapdCap
VrefCntrl
R
EAPD support: 1 = yes 0 = no.
[15.:8]
R
00
Vref support: bit 7 = Reserved; bit 6 =
Reserved; bit 5 = 100% support (1 = yes
0 = no); bit 4 = 80% support (1 = yes 0
= no); bit 3 = Reserved; bit 2 = GND sup-
port (1 = yes 0 = no); bit 1 = 50% sup-
port (1 = yes 0 = no); bit 0 = Hi-Z
support (1 = yes 0 = no)
[7]
[6]
[5]
[4]
[3]
Rsvd1
R
R
R
R
R
0
0
1
1
0
Reserved.
BalancedIO
InCap
Balanced I/O support: 1 = yes 0 = no.
Input support: 1 = yes 0 = no.
Output support: 1 = yes 0 = no.
OutCap
HdphDrvCap
Headphone amp present:
1 = yes 0 = no.
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5.11.2.1. PortI PinCap
Bit
Bitfield Name
RW
Reset
Description
[2]
[1]
[0]
PresDtctCap
R
1
1
1
Presence detection support:
1 = yes 0 = no.
TrigRqd
R
R
Trigger required for impedance sense:
1 = yes 0 = no.
ImpSenseCap
Impedance sense support:
1 = yes 0 = no.
5.11.3. PortI PinWCntrl
Verb ID
Payload
Response
F07
00
See bitfield table.
Get
5.11.3.1. PortI PinWCntrl
Bit
[31.:6]
[5]
Bitfield Name
RW
R
Reset
Description
Rsvd2
000000
Reserved.
InEn
RW
R
0
0
input enable: 1 = enabled 0 = disabled.
Reserved.
[4.:0]
Rsvd1
5.11.4. PortI UnsolResp
Verb ID
Payload
Response
F08
00
See bitfield table.
Get
5.11.4.1. PortI UnsolResp
Bit
[31.:8]
[7]
Bitfield Name
RW
R
Reset
000000
0
Description
Rsvd2
En
Reserved.
RW
Unsolicited response enable: 1 = en-
abled 0 = disabled.
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Ten Channel HD Audio Codec
5.11.4.1. PortI UnsolResp
Bit
Bitfield Name
Rsvd1
Tag
RW
Reset
Description
[6]
R
0
Reserved.
[5.:0]
RW
00
Software programmable field returned
in top six bits (31:26) of every Unsolicit-
ed Response generated by this node.
5.11.5. PortI ChSense
Verb ID
Payload
Response
F09
00
See bitfield table.
Get
5.11.5.1. PortI ChSense
Bit
Bitfield Name
RW
Reset
Description
[31]
PresDtct
R
0
Presence detection indicator: 1 = pres-
ence detected; 0 = presence not detect-
ed.
00000000
Reserved
[30.:0]
Rsvd
R
5.11.6. PortI ConfigDefault
Verb ID
Payload
Response
F1C
00
See bitfield table.
Get
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Ten Channel HD Audio Codec
5.11.6.1. PortH ConfigDefault
Bit
Bitfield Name
RW
Reset
Description
[31.:30]
PortConnectivity
RW
2
Port connectivity: 0h = Port complex is
connected to a jack; 1h = No physical
connection for port; 2h = Fixed function
device is attached; 3h = Both jack and
internal device attached (info in all other
fields refers to integrated device any
presence detection refers to jack)
[29.:24]
[23.:20]
Location
Device
RW
RW
19
Location. Bits [5..4]: 0h = External on
primary chassis; 1h = Internal; 2h = Sep-
arate chassis; 3h = Other. Bits [3..0]: 0h
= N/A; 1h = Rear; 2h = Front; 3h = Left;
4h = Right; 5h = Top; 6h = Bottom;
7h-9h = Special; Ah-Fh = Reserved
3
Default device: 0h = Line out; 1h =
Speaker; 2h = HP out; 3h = CD; 4h =
SPDIF Out; 5h = Digital other out; 6h =
Modem line side; 7h = Modem handset
side; 8h = Line in; 9h = Aux; Ah = Mic in;
Bh = Telephony; Ch = SPDIF In; Dh =
Digital other in; Eh = Reserved; Fh =
Other
[19.:16]
ConnectionType
RW
3
Connection type: 0h = Unknown; 1h =
1/8" stereo/mono; 2h = 1/4" stereo/mo-
no; 3h = ATAPI internal; 4h = RCA; 5h =
Optical; 6h = Other digital; 7h = Other
analog; 8h = Multichannel analog (DIN);
9h = XLR/Professional; Ah = RJ-11 (mo-
dem); Bh = Combination; Ch-Eh = Re-
served; Fh = Other
[15.:12]
[11.:8]
Color
Misc
RW
RW
0
1
Color: 0h = Unknown; 1h = Black; 2h =
Grey; 3h = Blue; 4h = Green; 5h = Red;
6h = Orange; 7h = Yellow; 8h = Purple;
9h = Pink; Ah-Dh = Reserved; Eh =
White; Fh = Other
Miscellaneous: Bits [3..1] = Reserved;
Bit 0 = Jack detect override
[7.:4]
[3.:0]
Association
Sequence
RW
RW
2
Default assocation.
Sequence.
E
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Ten Channel HD Audio Codec
5.12. DMic0 Node (NID = 13)
5.12.1. DMic0 WCap
Verb ID
Payload
Response
F00
09
See bitfield table.
Get
5.12.1.1. DMic0 WCap
Bit
Bitfield Name
RW
R
Reset
00
Description
[31.:24]
[23.:20]
Rsvd2
Reserved.
Type
R
4
Widget type: 0h = Out Converter; 1h = In
Converter; 2h = Summing (Mixer); 3h =
Selector (Mux); 4h = Pin Complex; 5h =
Power; 6h = Volume Knob; 7h = Beep
Generator; 8h-Eh = Reserved; Fh =
Vendor Defined
[19.:16]
Delay
R
0
Number of sample delays through wid-
get.
[15.:12]
[11]
Rsvd1
R
R
R
R
0
0
0
0
Reserved.
SwapCap
PwrCntrl
DigitalStrm
Left/right swap support: 1 = yes 0 = no.
Power state support: 1 = yes 0 = no.
[10]
[9]
Digital stream support: 1 = yes (digital)
0 = no (analog).
[8]
[7]
ConnList
R
R
0
0
Connection list present: 1 = yes 0 = no.
UnsolCap
Unsolicited response support: 1 = yes 0
= no.
[6]
ProcWidget
R
0
Processing state support: 1 = yes 0 =
no.
[5]
[4]
[3]
Stripe
R
R
R
0
0
0
Striping support: 1 = yes 0 = no.
FormatOvrd
AmpParOvrd
Stream format override: 1 = yes 0 = no.
Amplifier capabilities override: 1 = yes
no.
[2]
OutAmpPrsnt
R
0
Output amp present: 1 = yes 0 = no.
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5.12.1.1. DMic0 WCap
Bit
Bitfield Name
InAmpPrsnt
Stereo
RW
Reset
Description
[1]
[0]
R
1
1
Input amp present: 1 = yes 0 = no.
R
Stereo stream support: 1 = yes (stereo)
0 = no (mono).
5.12.2. DMic0 PinCap
Verb ID
Payload
Response
F00
0C
See bitfield table.
Get
5.12.2.1. DMic0 PinCap
Bit
[31.:17]
[16]
Bitfield Name
Rsvd2
RW
R
Reset
Description
0000
0
Reserved.
EapdCap
VRefCntrl
R
EAPD support: 1 = yes 0 = no.
[15.:8]
R
00
Vref support: bit 7 = Reserved; bit 6 =
Reserved; bit 5 = 100% support (1 = yes
0 = no); bit 4 = 80% support (1 = yes 0
= no); bit 3 = Reserved; bit 2 = GND sup-
port (1 = yes 0 = no); bit 1 = 50% sup-
port (1 = yes 0 = no); bit 0 = Hi-Z
support (1 = yes 0 = no)
[7]
[6]
[5]
[4]
[3]
Rsvd1
R
R
R
R
R
0
0
1
0
0
Reserved.
BalancedIO
InCap
Balanced I/O support: 1 = yes 0 = no.
Input support: 1 = yes 0 = no.
Output support: 1 = yes 0 = no.
OutCap
HPhnDrvCap
Headphone amp present: 1 = yes 0 =
no.
[2]
[1]
[0]
PresDtctCap
TrigRqd
R
R
R
0
0
0
Presence detection support: 1 = yes 0 =
no.
Trigger required for impedance sense: 1
= yes 0 = no.
ImpSenseCap
Impedance sense support: 1 = yes 0 =
no.
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5.12.3. DMic0 PinWCntrl
Verb ID
Payload
Response
F07
00
See bitfield table.
Get
5.12.3.1. DMic0 PinWCntrl
Bit
[31.:6]
[5]
Bitfield Name
Rsvd2
RW
R
Reset
Description
0000000
Reserved.
InEn
RW
R
0
Input enable: 1 = enabled 0 = disabled.
Reserved.
[4.:0]
Rsvd1
00
5.12.4. DMic0 InAmpLeft
Verb ID
Payload
Response
B20
00
See bitfield table.
Get
5.12.4.1. DMic0 InAmpLeft
Bit
[31.:2]
[1.:0]
Bitfield Name
Rsvd1
Gain
RW
R
Reset
000000
0
Description
Reserved.
Amp gain step number (see InAmpCap pa-
rameter pertaining to this widget).
RW
5.12.5. DMic0 InAmpRight
Verb ID
Payload
Response
B00
00
See bitfield table.
Get
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Ten Channel HD Audio Codec
5.12.5.1. DMic0 InAmpRight
Bit
Bitfield Name
Rsvd1
Gain
RW
Reset
000000
0
Description
[31.:2]
[1.:0]
R
Reserved.
Amp gain step number (see InAmpCap pa-
rameter pertaining to this widget).
RW
5.12.6. DMic0 ConfigDefault
Verb ID
Payload
Response
F1C
00
See bitfield table.
Get
5.12.6.1. DMic0 ConfigDefault
Bit
Bitfield Name
RW
Reset
Description
[31.:30]
PortConnectivity
RW
2
Port connectivity: 0h = Port complex is
connected to a jack; 1h = No physical
connection for port; 2h = Fixed function
device is attached; 3h = Both jack and
internal device attached (info in all other
fields refers to integrated device any
presence detection refers to jack)
[29.:24]
[23.:20]
Location
Device
RW
RW
10
Location. Bits [5..4]: 0h = External on
primary chassis; 1h = Internal; 2h = Sep-
arate chassis; 3h = Other. Bits [3..0]: 0h
= N/A; 1h = Rear; 2h = Front; 3h = Left;
4h = Right; 5h = Top; 6h = Bottom;
7h-9h = Special; Ah-Fh = Reserved
A
Default device: 0h = Line out; 1h =
Speaker; 2h = HP out; 3h = CD; 4h =
SPDIF Out; 5h = Digital other out; 6h =
Modem line side; 7h = Modem handset
side; 8h = Line in; 9h = Aux; Ah = Mic in;
Bh = Telephony; Ch = SPDIF In; Dh =
Digital other in; Eh = Reserved; Fh =
Other
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Ten Channel HD Audio Codec
5.12.6.1. DMic0 ConfigDefault
Bit
Bitfield Name
RW
Reset
Description
[19.:16]
ConnectionType
RW
3
Connection type: 0h = Unknown; 1h =
1/8" stereo/mono; 2h = 1/4" stereo/mo-
no; 3h = ATAPI internal; 4h = RCA; 5h =
Optical; 6h = Other digital; 7h = Other
analog; 8h = Multichannel analog (DIN);
9h = XLR/Professional; Ah = RJ-11 (mo-
dem); Bh = Combination; Ch-Eh = Re-
served; Fh = Other
[15.:12]
[11.:8]
Color
Misc
RW
RW
0
0
Color: 0h = Unknown; 1h = Black; 2h =
Grey; 3h = Blue; 4h = Green; 5h = Red;
6h = Orange; 7h = Yellow; 8h = Purple;
9h = Pink; Ah-Dh = Reserved; Eh =
White; Fh = Other
Miscellaneous: Bits [3..1] = Reserved;
Bit 0 = Jack detect override
[7.:4]
[3.:0]
Association
Sequence
RW
RW
7
0
Default assocation.
Sequence.
5.13. DMic1 Node (NID = 14)
5.13.1. DMic1 WCap
Verb ID
Payload
Response
F00
09
See bitfield table.
Get
5.13.1.1. DMic1 WCap
Bit
Bitfield Name
RW
R
Reset
Description
[31.:24]
[23.:20]
Rsvd2
00
4
Reserved.
Type
R
Widget type: 0h = Out Converter; 1h = In
Converter; 2h = Summing (Mixer); 3h =
Selector (Mux); 4h = Pin Complex; 5h =
Power; 6h = Volume Knob; 7h = Beep
Generator; 8h-Eh = Reserved; Fh =
Vendor Defined
[19.:16]
Delay
R
0
Number of sample delays through wid-
get.
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5.13.1.1. DMic1 WCap
Bit
[15.:12]
[11]
Bitfield Name
Rsvd1
RW
Reset
Description
R
0
0
0
0
Reserved.
SwapCap
PwrCntrl
R
R
R
Left/right swap support: 1 = yes 0 = no.
Power state support: 1 = yes 0 = no.
[10]
[9]
DigitalStrm
Digital stream support: 1 = yes (digital)
0 = no (analog).
[8]
[7]
ConnList
R
R
0
0
Connection list present: 1 = yes 0 = no.
UnsolCap
Unsolicited response support: 1 = yes 0
= no.
[6]
ProcWidget
R
0
Processing state support: 1 = yes 0 =
no.
[5]
[4]
[3]
Stripe
R
R
R
0
0
0
Striping support: 1 = yes 0 = no.
FormatOvrd
AmpParOvrd
Stream format override: 1 = yes 0 = no.
Amplifier capabilities override: 1 = yes
no.
[2]
[1]
[0]
OutAmpPrsnt
InAmpPrsnt
Stereo
R
R
R
0
1
1
Output amp present: 1 = yes 0 = no.
Input amp present: 1 = yes 0 = no.
Stereo stream support: 1 = yes (stereo)
0 = no (mono).
5.13.2. DMic1 PinCap
Verb ID
Payload
Response
F00
0C
See bitfield table.
Get
5.13.2.1. DMic1 PinCap
Bit
[31.:17]
[16]
Bitfield Name
RW
R
Reset
Description
Rsvd2
0000
0
Reserved.
EapdCap
R
EAPD support: 1 = yes 0 = no.
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Ten Channel HD Audio Codec
5.13.2.1. DMic1 PinCap
Bit
Bitfield Name
VRefCntrl
RW
Reset
00
Description
[15.:8]
R
Vref support: bit 7 = Reserved; bit 6 =
Reserved; bit 5 = 100% support (1 = yes
0 = no); bit 4 = 80% support (1 = yes 0
= no); bit 3 = Reserved; bit 2 = GND sup-
port (1 = yes 0 = no); bit 1 = 50% sup-
port (1 = yes 0 = no); bit 0 = Hi-Z
support (1 = yes 0 = no)
[7]
[6]
[5]
[4]
[3]
Rsvd1
R
R
R
R
R
0
0
1
0
0
Reserved.
BalancedIO
InCap
Balanced I/O support: 1 = yes 0 = no.
Input support: 1 = yes 0 = no.
Output support: 1 = yes 0 = no.
OutCap
HPhnDrvCap
Headphone amp present:
1 = yes 0 = no.
[2]
[1]
[0]
PresDtctCap
TrigRqd
R
R
R
0
0
0
Presence detection support:
1 = yes 0 = no.
Trigger required for impedance sense:
1 = yes 0 = no.
ImpSenseCap
Impedance sense support:
1 = yes 0 = no.
5.13.3. DMic1 PinWCntrl
Verb ID
Payload
Response
F07
00
See bitfield table.
Get
5.13.3.1. DMic1 PinWCntrl
Bit
[31.:6]
[5]
Bitfield Name
Rsvd2
RW
R
Reset
Description
0000000
Reserved.
InEn
RW
R
0
Input enable: 1 = enabled 0 = disabled.
Reserved.
[4.:0]
Rsvd1
00
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Ten Channel HD Audio Codec
5.13.4. DMic1 InAmpLeft
Verb ID
Payload
Response
B20
00
See bitfield table.
Get
5.13.4.1. DMic1 InAmpLeft
Bit
[31.:2]
[1.:0]
Bitfield Name
Rsvd1
Gain
RW
R
Reset
Description
000000
0
Reserved.
Amp gain step number (see InAmpCap pa-
rameter pertaining to this widget).
RW
5.13.5. DMic1 InAmpRight
Verb ID
Payload
Response
B00
00
See bitfield table.
Get
5.13.5.1. DMic1 InAmpRight
Bit
[31.:2]
[1.:0]
Bitfield Name
Rsvd1
Gain
RW
R
Reset
000000
0
Description
Reserved.
Amp gain step number (see InAmpCap pa-
rameter pertaining to this widget).
RW
5.13.6. DMic1 ConfigDefault
Verb ID
Payload
Response
F1C
00
See bitfield table.
Get
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Ten Channel HD Audio Codec
5.13.6.1. DMic1 ConfigDefault
Bit
Bitfield Name
RW
Reset
Description
[31.:30]
PortConnectivity
RW
2
Port connectivity: 0h = Port complex is
connected to a jack; 1h = No physical
connection for port; 2h = Fixed function
device is attached; 3h = Both jack and
internal device attached (info in all other
fields refers to integrated device any
presence detection refers to jack)
[29.:24]
[23.:20]
Location
Device
RW
RW
10
Location. Bits [5..4]: 0h = External on
primary chassis; 1h = Internal; 2h = Sep-
arate chassis; 3h = Other. Bits [3..0]: 0h
= N/A; 1h = Rear; 2h = Front; 3h = Left;
4h = Right; 5h = Top; 6h = Bottom;
7h-9h = Special; Ah-Fh = Reserved
A
Default device: 0h = Line out; 1h =
Speaker; 2h = HP out; 3h = CD; 4h =
SPDIF Out; 5h = Digital other out; 6h =
Modem line side; 7h = Modem handset
side; 8h = Line in; 9h = Aux; Ah = Mic in;
Bh = Telephony; Ch = SPDIF In; Dh =
Digital other in; Eh = Reserved; Fh =
Other
[19.:16]
ConnectionType
RW
3
Connection type: 0h = Unknown; 1h =
1/8" stereo/mono; 2h = 1/4" stereo/mo-
no; 3h = ATAPI internal; 4h = RCA; 5h =
Optical; 6h = Other digital; 7h = Other
analog; 8h = Multichannel analog (DIN);
9h = XLR/Professional; Ah = RJ-11 (mo-
dem); Bh = Combination; Ch-Eh = Re-
served; Fh = Other
[15.:12]
[11.:8]
Color
Misc
RW
RW
0
0
Color: 0h = Unknown; 1h = Black; 2h =
Grey; 3h = Blue; 4h = Green; 5h = Red;
6h = Orange; 7h = Yellow; 8h = Purple;
9h = Pink; Ah-Dh = Reserved; Eh =
White; Fh = Other
Miscellaneous: Bits [3..1] = Reserved;
Bit 0 = Jack detect override
[7.:4]
[3.:0]
Association
Sequence
RW
RW
7
Default assocation.
Sequence.
E
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Ten Channel HD Audio Codec
5.14. DAC0 Node (NID = 15)
5.14.1. DAC0 WCap
Verb ID
Payload
Response
F00
09
See bitfield table.
Get
5.14.1.1. DAC0 WCap
Bit
Bitfield Name
RW
R
Reset
00
Description
[31.:24]
[23.:20]
Rsvd2
Reserved.
Type
R
0
Widget type: 0h = Out Converter; 1h = In
Converter; 2h = Summing (Mixer); 3h =
Selector (Mux); 4h = Pin Complex; 5h =
Power; 6h = Volume Knob; 7h = Beep
Generator; 8h-Eh = Reserved; Fh =
Vendor Defined
[19.:16]
Delay
R
D
Number of sample delays through wid-
get.
[15.:12]
[11]
Rsvd1
R
R
R
R
0
1
1
0
Reserved.
SwapCap
PwrCntrl
Dig
Left/right swap support: 1 = yes 0 = no.
Power state support: 1 = yes 0 = no.
[10]
[9]
Digital stream support: 1 = yes (digital)
0 = no (analog).
[8]
[7]
ConnList
R
R
0
0
Connection list present: 1 = yes 0 = no.
UnSolCap
Unsolicited response support: 1 = yes 0
= no.
[6]
ProcWidget
R
0
Processing state support: 1 = yes 0 =
no.
[5]
[4]
[3]
Stripe
R
R
R
0
0
0
Striping support: 1 = yes 0 = no.
FormatOvrd
AmpParOvrd
Stream format override: 1 = yes 0 = no.
Amplifier capabilities override: 1 = yes
no.
[2]
OutAmpPrsnt
R
1
Output amp present: 1 = yes 0 = no.
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Ten Channel HD Audio Codec
5.14.1.1. DAC0 WCap
Bit
Bitfield Name
InAmpPrsnt
Stereo
RW
Reset
Description
[1]
[0]
R
0
1
Input amp present: 1 = yes 0 = no.
R
Stereo stream support: 1 = yes (stereo)
0 = no (mono).
5.14.2. DAC0 Cnvtr
Verb ID
Payload
Response
A
0000
See bitfield table.
Get
5.14.2.1. DAC0 Cnvtr
Bit
[31.:16]
[15]
Bitfield Name
Rsvd2
RW
R
Reset
Description
0000
Reserved.
StrmType
R
0
0
Stream type: 1 = Non-PCM 0 = PCM.
[14]
FrmtSmplRate
RW
Sample base rate: 1 = 44.1kHz 0 =
48kHz.
[13.:11]
SmplRateMultp
SmplRateDiv
RW
RW
0
0
Sample base rate multiple: 000b= x1
(48kHz/44.1kHz or less); 001b= x2
(96kHz/88.2kHz/32kHz); 010b= x3
(144kHz); 011b= x4
(192kHz/176.4kHz); 100b-111b Re-
served
[10.:8]
Sample base rate divider: 000b= Divide
by 1 (48kHz/44.1kHz); 001b= Divide by
2 (24kHz/20.05kHz); 010b= Divide by 3
(16kHz/32kHz); 011b= Divide by 4
(11.025kHz); 100b= Divide by 5
(9.6kHz); 101b= Divide by 6 (8kHz);
110b= Divide by 7; 111b= Divide by 8
(6kHz)
[7]
Rsvd1
R
0
Reserved.
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Ten Channel HD Audio Codec
5.14.2.1. DAC0 Cnvtr
Bit
[6.:4]
Bitfield Name
RW
Reset
Description
BitsPerSmpl
RW
3
1
Bits per sample: 000b= 8 bits; 001b= 16
bits; 010b= 20 bits; 011b= 24 bits;
100b= 32 bits; 101b-111b= Reserved
[3.:0]
NmbrChan
RW
Total number of channels in the stream
assigned to this converter:
0000b-1111b= 1-16 channels.
5.14.3. DAC0 OutAmpLeft
Verb ID
Payload
Response
BA0
00
See bitfield table.
Get
5.14.3.1. DAC0 OutAmpLeft
Bit
[31.:8]
[7]
Bitfield Name
Rsvd
RW
R
Reset
Description
000000
Reserved.
Mute
Gain
RW
RW
1
Amp mute: 1 = muted 0 = not muted.
[6.:0]
7F
Amp gain step number (see OutAmp-
Cap parameter pertaining to this wid-
get).
5.14.4. DAC0 OutAmpRight
Verb ID
Payload
Response
B80
00
See bitfield table.
Get
5.14.4.1. DAC0 OutAmpRight
Bit
Bitfield Name
Rsvd
RW
Reset
Description
[31.:8]
R
000000
Reserved.
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Ten Channel HD Audio Codec
5.14.4.1. DAC0 OutAmpRight
Bit
Bitfield Name
Mute
Gain
RW
RW
RW
Reset
Description
[7]
1
Amp mute: 1 = muted 0 = not muted.
[6.:0]
7F
Amp gain step number (see OutAmp-
Cap parameter pertaining to this wid-
get).
5.14.5. DAC0 PwrState
Verb ID
Payload
Response
F05
00
See bitfield table.
Get
5.14.5.1. DAC0 PwrState
Bit
[31.:6]
[5.:4]
Bitfield Name
RW
R
Reset
Description
Rsvd2
0000000
Reserved.
Act
R
3
0
3
Actual power state of this widget.
Reserved.
[3.:2]
Rsvd1
Set
R
[1.:0]
RW
Current power state setting for this wid-
get.
5.14.6. DAC0 CnvtrID
Verb ID
Payload
Response
F06
00
See bitfield table.
Get
5.14.6.1. DAC0 CnvtrID
Bit
Bitfield Name
Rsvd
RW
Reset
Description
[31.:8]
R
000000
Reserved.
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Ten Channel HD Audio Codec
5.14.6.1. DAC0 CnvtrID
Bit
[7.:4]
Bitfield Name
Strm
RW
Reset
Description
RW
0
0
Stream ID: 0h = Converter "off" 1h-Fh =
valid IDs.
[3.:0]
Ch
RW
Channel assignment ("Ch" and "Ch+1"
assigned as a pair for a stereo convert-
er).
5.14.7. DAC0 LR
Verb ID
Payload
Response
F0C
00
See bitfield table.
Get
5.14.7.1. DAC0 LR
Bit
[31.:3]
[2]
Bitfield Name
Rsvd2
RW
R
Reset
00000000 Reserved.
Description
SwapEn
RW
0
Swap enable: 1 = L/R swap enabled 0
= L/R swap disabled.
[1.:0]
Rsvd1
R
0
Reserved.
5.15. DAC1 Node (NID = 16)
5.15.1. DAC1 WCap
Verb ID
Payload
Response
F00
09
See bitfield table.
Get
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Ten Channel HD Audio Codec
5.15.1.1. DAC1 WCap
Bit
Bitfield Name
Rsvd2
RW
Reset
00
Description
[31.:24]
[23.:20]
R
Reserved.
Type
R
0
Widget type: 0h = Out Converter; 1h = In
Converter; 2h = Summing (Mixer); 3h =
Selector (Mux); 4h = Pin Complex; 5h =
Power; 6h = Volume Knob; 7h = Beep
Generator; 8h-Eh = Reserved; Fh =
Vendor Defined
[19.:16]
Delay
R
D
Number of sample delays through wid-
get.
[15.:12]
[11]
Rsvd1
R
R
R
R
0
1
1
0
Reserved.
SwapCap
PwrCntrl
Dig
Left/right swap support: 1 = yes 0 = no.
Power state support: 1 = yes 0 = no.
[10]
[9]
Digital stream support: 1 = yes (digital)
0 = no (analog).
[8]
[7]
ConnList
R
R
0
0
Connection list present: 1 = yes 0 = no.
UnSolCap
Unsolicited response support: 1 = yes 0
= no.
[6]
ProcWidget
R
0
Processing state support: 1 = yes 0 =
no.
[5]
[4]
[3]
Stripe
R
R
R
0
0
0
Striping support: 1 = yes 0 = no.
FormatOvrd
AmpParOvrd
Stream format override: 1 = yes 0 = no.
Amplifier capabilities override: 1 = yes
no.
[2]
[1]
[0]
OutAmpPrsnt
InAmpPrsnt
Stereo
R
R
R
1
0
1
Output amp present: 1 = yes 0 = no.
Input amp present: 1 = yes 0 = no.
Stereo stream support: 1 = yes (stereo)
0 = no (mono).
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Ten Channel HD Audio Codec
5.15.2. DAC1 Cnvtr
Verb ID
Payload
Response
A00
00
See bitfield table.
Get
5.15.2.1. DAC1 Cnvtr
Bit
[31.:16]
[15]
Bitfield Name
RW
R
Reset
0000
Description
Rsvd2
Reserved.
StrmType
R
0
0
Stream type: 1 = Non-PCM 0 = PCM.
[14]
FrmtSmplRate
RW
Sample base rate: 1 = 44.1kHz 0 =
48kHz.
[13.:11]
SmplRateMultp
SmplRateDiv
RW
RW
0
0
Sample base rate multiple: 000b= x1
(48kHz/44.1kHz or less); 001b= x2
(96kHz/88.2kHz/32kHz); 010b= x3
(144kHz); 011b= x4
(192kHz/176.4kHz); 100b-111b Re-
served
[10.:8]
Sample base rate divider: 000b= Divide
by 1 (48kHz/44.1kHz); 001b= Divide by
2 (24kHz/20.05kHz); 010b= Divide by 3
(16kHz/32kHz); 011b= Divide by 4
(11.025kHz); 100b= Divide by 5
(9.6kHz); 101b= Divide by 6 (8kHz);
110b= Divide by 7; 111b= Divide by 8
(6kHz)
[7]
Rsvd1
R
0
3
Reserved.
[6.:4]
BitsPerSmpl
RW
Bits per sample: 000b= 8 bits; 001b= 16
bits; 010b= 20 bits; 011b= 24 bits;
100b= 32 bits; 101b-111b= Reserved
[3.:0]
NmbrChan
RW
1
Total number of channels in the stream
assigned to this converter:
0000b-1111b= 1-16 channels.
5.15.3. DAC1 OutAmpLeft
Verb ID
Payload
Response
BA0
00
See bitfield table.
Get
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©2011 INTEGRATED DEVICE TECHNOLOGY, INC.
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Ten Channel HD Audio Codec
5.15.3.1. DAC1 OutAmpLeft
Bit
Bitfield Name
Rsvd
RW
Reset
000000
1
Description
[31.:8]
[7]
R
Reserved.
Mute
Gain
RW
RW
Amp mute: 1 = muted 0 = not muted.
[6.:0]
7F
Amp gain step number (see OutAmp-
Cap parameter pertaining to this wid-
get).
5.15.4. DAC1 OutAmpRight
Verb ID
Payload
Response
B80
00
See bitfield table.
Get
5.15.4.1. DAC1 OutAmpRight
Bit
[31.:8]
[7]
Bitfield Name
Rsvd
RW
R
Reset
000000
1
Description
Reserved.
Mute
Gain
RW
RW
Amp mute: 1 = muted 0 = not muted.
[6.:0]
7F
Amp gain step number (see OutAmp-
Cap parameter pertaining to this wid-
get).
5.15.5. DAC1 PwrState
Verb ID
Payload
Response
F05
00
See bitfield table.
Get
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Ten Channel HD Audio Codec
5.15.5.1. DAC1 PwrState
Bit
Bitfield Name
Rsvd2
RW
Reset
Description
[31.:6]
[5.:4]
[3.:2]
[1.:0]
R
0000000
Reserved.
Act
R
3
0
3
Actual power state of this widget.
Reserved.
Rsvd1
Set
R
RW
Current power state setting for this wid-
get.
5.15.6. DAC1 CnvtrID
Verb ID
Payload
Response
F06
00
See bitfield table.
Get
5.15.6.1. DAC1 CnvtrID
Bit
[31.:8]
[7.:4]
Bitfield Name
Rsvd
RW
R
Reset
000000
0
Description
Reserved.
Strm
RW
Stream ID: 0h = Converter "off" 1h-Fh =
valid IDs.
[3.:0]
Ch
RW
0
Channel assignment ("Ch" and "Ch+1"
assigned as a pair for a stereo convert-
er).
5.15.7. DAC1 LR
Verb ID
Payload
Response
F0C
00
See bitfield table.
Get
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Ten Channel HD Audio Codec
5.15.7.1. DAC1 LR
Bit
[31.:3]
[2]
Bitfield Name
Rsvd2
RW
Reset
Description
R
00000000 Reserved.
SwapEn
RW
0
Swap enable: 1 = L/R swap enabled 0
= L/R swap disabled.
[1.:0]
Rsvd1
R
0
Reserved.
5.16. DAC2 Node (NID = 17)
5.16.1. DAC2 WCap
Verb ID
Payload
Response
F00
09
See bitfield table.
Get
5.16.1.1. DAC2 WCap
Bit
Bitfield Name
RW
R
Reset
Description
[31.:24]
[23.:20]
Rsvd2
00
0
Reserved.
Type
R
Widget type: 0h = Out Converter; 1h = In
Converter; 2h = Summing (Mixer); 3h =
Selector (Mux); 4h = Pin Complex; 5h =
Power; 6h = Volume Knob; 7h = Beep
Generator; 8h-Eh = Reserved; Fh =
Vendor Defined
[19.:16]
Delay
R
D
Number of sample delays through wid-
get.
[15.:12]
[11]
Rsvd1
R
R
R
R
0
1
1
0
Reserved.
SwapCap
PwrCntrl
Dig
Left/right swap support: 1 = yes 0 = no.
Power state support: 1 = yes 0 = no.
[10]
[9]
Digital stream support: 1 = yes (digital)
0 = no (analog).
[8]
[7]
ConnList
R
R
0
0
Connection list present: 1 = yes 0 = no.
UnSolCap
Unsolicited response support:
1 = yes 0 = no.
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Ten Channel HD Audio Codec
5.16.1.1. DAC2 WCap
Bit
Bitfield Name
RW
Reset
Description
[6]
ProcWidget
R
0
Processing state support:
1 = yes 0 = no.
[5]
[4]
[3]
Stripe
R
R
R
0
0
0
Striping support: 1 = yes 0 = no.
FormatOvrd
AmpParOvrd
Stream format override: 1 = yes 0 = no.
Amplifier capabilities override:
1 = yes no.
[2]
[1]
[0]
OutAmpPrsnt
InAmpPrsnt
Stereo
R
R
R
1
0
1
Output amp present: 1 = yes 0 = no.
Input amp present: 1 = yes 0 = no.
Stereo stream support: 1 = yes (stereo)
0 = no (mono).
5.16.2. DAC2 Cnvtr
Verb ID
Payload
Response
A00
00
See bitfield table.
Get
5.16.2.1. DAC2 Cnvtr
Bit
[31.:16]
[15]
Bitfield Name
Rsvd2
RW
R
Reset
Description
0000
Reserved.
StrmType
R
0
0
Stream type: 1 = Non-PCM 0 = PCM.
[14]
FrmtSmplRate
RW
Sample base rate: 1 = 44.1kHz 0 =
48kHz.
[13.:11]
SmplRateMultp
RW
0
Sample base rate multiple: 000b= x1
(48kHz/44.1kHz or less); 001b= x2
(96kHz/88.2kHz/32kHz); 010b= x3
(144kHz); 011b= x4
(192kHz/176.4kHz); 100b-111b Re-
served
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Ten Channel HD Audio Codec
5.16.2.1. DAC2 Cnvtr
Bit
Bitfield Name
RW
Reset
Description
[10.:8]
SmplRateDiv
RW
0
Sample base rate divider: 000b= Divide
by 1 (48kHz/44.1kHz); 001b= Divide by
2 (24kHz/20.05kHz); 010b= Divide by 3
(16kHz/32kHz); 011b= Divide by 4
(11.025kHz); 100b= Divide by 5
(9.6kHz); 101b= Divide by 6 (8kHz);
110b= Divide by 7; 111b= Divide by 8
(6kHz)
[7]
Rsvd1
R
0
3
Reserved.
[6.:4]
BitsPerSmpl
RW
Bits per sample: 000b= 8 bits; 001b= 16
bits; 010b= 20 bits; 011b= 24 bits;
100b= 32 bits; 101b-111b= Reserved
[3.:0]
NmbrChan
RW
1
Total number of channels in the stream
assigned to this converter:
0000b-1111b= 1-16 channels.
5.16.3. DAC2 OutAmpLeft
Verb ID
Payload
Response
BA0
00
See bitfield table.
Get
5.16.3.1. DAC2 OutAmpLeft
Bit
[31.:8]
[7]
Bitfield Name
Rsvd
RW
R
Reset
Description
000000
Reserved.
Mute
Gain
RW
RW
1
Amp mute: 1 = muted 0 = not muted.
[6.:0]
7F
Amp gain step number (see OutAmp-
Cap parameter pertaining to this wid-
get).
5.16.4. DAC2 OutAmpRight
Verb ID
Payload
Response
B80
00
See bitfield table.
Get
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©2011 INTEGRATED DEVICE TECHNOLOGY, INC.
92HD73E
Ten Channel HD Audio Codec
5.16.4.1. DAC2 OutAmpRight
Bit
Bitfield Name
Rsvd
RW
Reset
000000
1
Description
[31.:8]
[7]
R
Reserved.
Mute
Gain
RW
RW
Amp mute: 1 = muted 0 = not muted.
[6.:0]
7F
Amp gain step number (see OutAmp-
Cap parameter pertaining to this wid-
get).
5.16.5. DAC2 PwrState
Verb ID
Payload
Response
F05
00
See bitfield table.
Get
5.16.5.1. DAC2 PwrState
Bit
[31.:6]
[5.:4]
Bitfield Name
RW
R
Reset
Description
Rsvd2
0000000
Reserved.
Act
R
3
0
3
Actual power state of this widget.
Reserved.
[3.:2]
Rsvd1
Set
R
[1.:0]
RW
Current power state setting for this wid-
get.
5.16.6. DAC2 CnvtrID
Verb ID
Payload
Response
F06
00
See bitfield table.
Get
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©2011 INTEGRATED DEVICE TECHNOLOGY, INC.
92HD73E
Ten Channel HD Audio Codec
5.16.6.1. DAC2 CnvtrID
Bit
[31.:8]
[7.:4]
Bitfield Name
Rsvd
RW
Reset
000000
0
Description
R
Reserved.
Strm
RW
Stream ID: 0h = Converter "off" 1h-Fh =
valid IDs.
[3.:0]
Ch
RW
0
Channel assignment ("Ch" and "Ch+1"
assigned as a pair for a stereo convert-
er).
5.16.7. DAC2 LR
Verb ID
Payload
Response
F0C
00
See bitfield table.
Get
5.16.7.1. DAC2 LR
Bit
[31.:3]
[2]
Bitfield Name
Rsvd2
RW
R
Reset
00000000 Reserved.
Description
SwapEn
RW
0
Swap enable: 1 = L/R swap enabled 0
= L/R swap disabled.
[1.:0]
Rsvd1
R
0
Reserved.
5.17. DAC3 Node (NID = 18)
5.17.1. DAC3 WCap
Verb ID
Payload
Response
F00
09
See bitfield table.
Get
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©2011 INTEGRATED DEVICE TECHNOLOGY, INC.
92HD73E
Ten Channel HD Audio Codec
5.17.1.1. DAC3 WCap
Bit
Bitfield Name
Rsvd2
RW
Reset
00
Description
[31.:24]
[23.:20]
R
Reserved.
Type
R
0
Widget type: 0h = Out Converter; 1h = In
Converter; 2h = Summing (Mixer); 3h =
Selector (Mux); 4h = Pin Complex; 5h =
Power; 6h = Volume Knob; 7h = Beep
Generator; 8h-Eh = Reserved; Fh =
Vendor Defined
[19.:16]
Delay
R
D
Number of sample delays through wid-
get.
[15.:12]
[11]
Rsvd1
R
R
R
R
0
1
1
0
Reserved.
SwapCap
PwrCntrl
Dig
Left/right swap support: 1 = yes 0 = no.
Power state support: 1 = yes 0 = no.
[10]
[9]
Digital stream support: 1 = yes (digital)
0 = no (analog).
[8]
[7]
ConnList
R
R
0
0
Connection list present: 1 = yes 0 = no.
UnSolCap
Unsolicited response support:
1 = yes 0 = no.
[6]
ProcWidget
R
0
Processing state support:
1 = yes 0 = no.
[5]
[4]
[3]
Stripe
R
R
R
0
0
0
Striping support: 1 = yes 0 = no.
FormatOvrd
AmpParOvrd
Stream format override: 1 = yes 0 = no.
Amplifier capabilities override:
1 = yes no.
[2]
[1]
[0]
OutAmpPrsnt
InAmpPrsnt
Stereo
R
R
R
1
0
1
Output amp present: 1 = yes 0 = no.
Input amp present: 1 = yes 0 = no.
Stereo stream support: 1 = yes (stereo)
0 = no (mono).
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Ten Channel HD Audio Codec
5.17.2. DAC3 Cnvtr
Verb ID
Payload
Response
A00
00
See bitfield table.
Get
5.17.2.1. DAC3 Cnvtr
Bit
[31.:16]
[15]
Bitfield Name
RW
R
Reset
0000
Description
Rsvd2
Reserved.
StrmType
R
0
0
Stream type: 1 = Non-PCM 0 = PCM.
[14]
FrmtSmplRate
RW
Sample base rate: 1 = 44.1kHz 0 =
48kHz.
[13.:11]
SmplRateMultp
SmplRateDiv
RW
RW
0
0
Sample base rate multiple: 000b= x1
(48kHz/44.1kHz or less); 001b= x2
(96kHz/88.2kHz/32kHz); 010b= x3
(144kHz); 011b= x4
(192kHz/176.4kHz); 100b-111b Re-
served
[10.:8]
Sample base rate divider: 000b= Divide
by 1 (48kHz/44.1kHz); 001b= Divide by
2 (24kHz/20.05kHz); 010b= Divide by 3
(16kHz/32kHz); 011b= Divide by 4
(11.025kHz); 100b= Divide by 5
(9.6kHz); 101b= Divide by 6 (8kHz);
110b= Divide by 7; 111b= Divide by 8
(6kHz)
[7]
Rsvd1
R
0
3
Reserved.
[6.:4]
BitsPerSmpl
RW
Bits per sample: 000b= 8 bits; 001b= 16
bits; 010b= 20 bits; 011b= 24 bits;
100b= 32 bits; 101b-111b= Reserved
[3.:0]
NmbrChan
RW
1
Total number of channels in the stream
assigned to this converter:
0000b-1111b= 1-16 channels.
5.17.3. DAC3 OutAmpLeft
Verb ID
Payload
Response
BA0
00
See bitfield table.
Get
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©2011 INTEGRATED DEVICE TECHNOLOGY, INC.
92HD73E
Ten Channel HD Audio Codec
5.17.3.1. DAC3 OutAmpLeft
Bit
Bitfield Name
Rsvd
RW
Reset
000000
1
Description
[31.:8]
[7]
R
Reserved.
Mute
Gain
RW
RW
Amp mute: 1 = muted 0 = not muted.
[6.:0]
7F
Amp gain step number (see OutAmp-
Cap parameter pertaining to this wid-
get).
5.17.4. DAC3 OutAmpRight
Verb ID
Payload
Response
B80
00
See bitfield table.
Get
5.17.4.1. DAC3 OutAmpRight
Bit
[31.:8]
[7]
Bitfield Name
Rsvd
RW
R
Reset
000000
1
Description
Reserved.
Mute
Gain
RW
RW
Amp mute: 1 = muted 0 = not muted.
[6.:0]
7F
Amp gain step number (see OutAmp-
Cap parameter pertaining to this wid-
get).
5.17.5. DAC3 PwrState
Verb ID
Payload
Response
F05
00
See bitfield table.
Get
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©2011 INTEGRATED DEVICE TECHNOLOGY, INC.
92HD73E
Ten Channel HD Audio Codec
5.17.5.1. DAC3 PwrState
Bit
Bitfield Name
Rsvd2
RW
Reset
Description
[31.:6]
[5.:4]
[3.:2]
[1.:0]
R
0000000
Reserved.
Act
R
3
0
3
Actual power state of this widget.
Reserved.
Rsvd1
Set
R
RW
Current power state setting for this wid-
get.
5.17.6. DAC3 CnvtrID
Verb ID
Payload
Response
F06
00
See bitfield table.
Get
5.17.6.1. DAC3 CnvtrID
Bit
[31.:8]
[7.:4]
Bitfield Name
Rsvd
RW
R
Reset
000000
0
Description
Reserved.
Strm
RW
Stream ID: 0h = Converter "off" 1h-Fh =
valid IDs.
[3.:0]
Ch
RW
0
Channel assignment ("Ch" and "Ch+1"
assigned as a pair for a stereo convert-
er).
5.17.7. DAC3 LR
Verb ID
Payload
Response
F0C
00
See bitfield table.
Get
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©2011 INTEGRATED DEVICE TECHNOLOGY, INC.
92HD73E
Ten Channel HD Audio Codec
5.17.7.1. DAC3 LR
Bit
[31.:3]
[2]
Bitfield Name
Rsvd2
RW
Reset
Description
R
00000000 Reserved.
SwapEn
RW
0
Swap enable: 1 = L/R swap enabled 0
= L/R swap disabled.
[1.:0]
Rsvd1
R
0
Reserved.
5.18. DAC4 Node (NID = 19)
5.18.1. DAC4 WCap
Verb ID
Payload
Response
F00
09
See bitfield table.
Get
5.18.1.1. DAC4 WCap
Bit
Bitfield Name
RW
R
Reset
Description
[31.:24]
[23.:20]
Rsvd2
00
0
Reserved.
Type
R
Widget type: 0h = Out Converter; 1h = In
Converter; 2h = Summing (Mixer); 3h =
Selector (Mux); 4h = Pin Complex; 5h =
Power; 6h = Volume Knob; 7h = Beep
Generator; 8h-Eh = Reserved; Fh =
Vendor Defined
[19.:16]
Delay
R
D
Number of sample delays through wid-
get.
[15.:12]
[11]
Rsvd1
R
R
R
R
0
1
1
0
Reserved.
SwapCap
PwrCntrl
Dig
Left/right swap support: 1 = yes 0 = no.
Power state support: 1 = yes 0 = no.
[10]
[9]
Digital stream support: 1 = yes (digital)
0 = no (analog).
[8]
[7]
ConnList
R
R
0
0
Connection list present: 1 = yes 0 = no.
UnSolCap
Unsolicited response support:
1 = yes 0 = no.
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Ten Channel HD Audio Codec
5.18.1.1. DAC4 WCap
Bit
Bitfield Name
RW
Reset
Description
[6]
ProcWidget
R
0
Processing state support:
1 = yes 0 = no.
[5]
[4]
[3]
Stripe
R
R
R
0
0
0
Striping support: 1 = yes 0 = no.
FormatOvrd
AmpParOvrd
Stream format override: 1 = yes 0 = no.
Amplifier capabilities override:
1 = yes no.
[2]
[1]
[0]
OutAmpPrsnt
InAmpPrsnt
Stereo
R
R
R
1
0
1
Output amp present: 1 = yes 0 = no.
Input amp present: 1 = yes 0 = no.
Stereo stream support: 1 = yes (stereo)
0 = no (mono).
5.18.2. DAC4 Cnvtr
Verb ID
Payload
Response
A00
00
See bitfield table.
Get
5.18.2.1. DAC4 Cnvtr
Bit
[31.:16]
[15]
Bitfield Name
Rsvd2
RW
R
Reset
Description
0000
Reserved.
StrmType
R
0
0
Stream type: 1 = Non-PCM 0 = PCM.
[14]
FrmtSmplRate
RW
Sample base rate: 1 = 44.1kHz 0 =
48kHz.
[13.:11]
SmplRateMultp
RW
0
Sample base rate multiple: 000b= x1
(48kHz/44.1kHz or less); 001b= x2
(96kHz/88.2kHz/32kHz); 010b= x3
(144kHz); 011b= x4
(192kHz/176.4kHz); 100b-111b Re-
served
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©2011 INTEGRATED DEVICE TECHNOLOGY, INC.
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Ten Channel HD Audio Codec
5.18.2.1. DAC4 Cnvtr
Bit
Bitfield Name
RW
Reset
Description
[10.:8]
SmplRateDiv
RW
0
Sample base rate divider: 000b= Divide
by 1 (48kHz/44.1kHz); 001b= Divide by
2 (24kHz/20.05kHz); 010b= Divide by 3
(16kHz/32kHz); 011b= Divide by 4
(11.025kHz); 100b= Divide by 5
(9.6kHz); 101b= Divide by 6 (8kHz);
110b= Divide by 7; 111b= Divide by 8
(6kHz)
[7]
Rsvd1
R
0
3
Reserved.
[6.:4]
BitsPerSmpl
RW
Bits per sample: 000b= 8 bits; 001b= 16
bits; 010b= 20 bits; 011b= 24 bits;
100b= 32 bits; 101b-111b= Reserved
[3.:0]
NmbrChan
RW
1
Total number of channels in the stream
assigned to this converter:
0000b-1111b= 1-16 channels.
5.18.3. DAC4 OutAmpLeft
Verb ID
Payload
Response
BA0
00
See bitfield table.
Get
5.18.3.1. DAC4 OutAmpLeft
Bit
[31.:8]
[7]
Bitfield Name
Rsvd
RW
R
Reset
Description
000000
Reserved.
Mute
Gain
RW
RW
1
Amp mute: 1 = muted 0 = not muted.
[6.:0]
7F
Amp gain step number (see OutAmp-
Cap parameter pertaining to this wid-
get).
5.18.4. DAC4 OutAmpRight
Verb ID
Payload
Response
B80
00
See bitfield table.
Get
142
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©2011 INTEGRATED DEVICE TECHNOLOGY, INC.
92HD73E
Ten Channel HD Audio Codec
5.18.4.1. DAC4 OutAmpRight
Bit
Bitfield Name
Rsvd
RW
Reset
000000
1
Description
[31.:8]
[7]
R
Reserved.
Mute
Gain
RW
RW
Amp mute: 1 = muted 0 = not muted.
[6.:0]
7F
Amp gain step number (see OutAmp-
Cap parameter pertaining to this wid-
get).
5.18.5. DAC4 PwrState
Verb ID
Payload
Response
F05
00
See bitfield table.
Get
5.18.5.1. DAC1 PwrState
Bit
[31.:6]
[5.:4]
Bitfield Name
RW
R
Reset
Description
Rsvd2
0000000
Reserved.
Act
R
3
0
3
Actual power state of this widget.
Reserved.
[3.:2]
Rsvd1
Set
R
[1.:0]
RW
Current power state setting for this wid-
get.
5.18.6. DAC4 CnvtrID
Verb ID
Payload
Response
F06
00
See bitfield table.
Get
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©2011 INTEGRATED DEVICE TECHNOLOGY, INC.
92HD73E
Ten Channel HD Audio Codec
5.18.6.1. DAC4 CnvtrID
Bit
[31.:8]
[7.:4]
Bitfield Name
Rsvd
RW
Reset
000000
0
Description
R
Reserved.
Strm
RW
Stream ID: 0h = Converter "off" 1h-Fh =
valid IDs.
[3.:0]
Ch
RW
0
Channel assignment ("Ch" and "Ch+1"
assigned as a pair for a stereo convert-
er).
5.18.7. DAC4 LR
Verb ID
Payload
Response
F0C
00
See bitfield table.
Get
5.18.7.1. DAC4 LR
Bit
[31.:3]
[2]
Bitfield Name
Rsvd2
RW
R
Reset
00000000 Reserved.
Description
SwapEn
RW
0
Swap enable: 1 = L/R swap enabled 0
= L/R swap disabled.
[1.:0]
Rsvd1
R
0
Reserved.
5.19. ADC0 Node (NID = 1A)
5.19.1. ADC0 WCap
Verb ID
Payload
Response
F00
09
See bitfield table.
Get
144
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©2011 INTEGRATED DEVICE TECHNOLOGY, INC.
92HD73E
Ten Channel HD Audio Codec
5.19.1.1. ADC0 WCap
Bit
Bitfield Name
Rsvd2
RW
Reset
00
Description
[31.:24]
[23.:20]
R
Reserved.
Type
R
1
Widget type: 0h = Out Converter; 1h = In
Converter; 2h = Summing (Mixer); 3h =
Selector (Mux); 4h = Pin Complex; 5h =
Power; 6h = Volume Knob; 7h = Beep
Generator; 8h-Eh = Reserved; Fh =
Vendor Defined
[19.:16]
Delay
R
D
Number of sample delays through wid-
get.
[15.:12]
[11]
Rsvd1
R
R
R
R
0
0
1
0
Reserved.
SwapCap
PwrCntrl
Dig
Left/right swap support: 1 = yes 0 = no.
Power state support: 1 = yes 0 = no.
[10]
[9]
Digital stream support: 1 = yes (digital)
0 = no (analog).
[8]
[7]
ConnList
R
R
1
0
Connection list present: 1 = yes 0 = no.
UnSolCap
Unsolicited response support:
1 = yes 0 = no.
[6]
ProcWidget
R
1
Processing state support:
1 = yes 0 = no.
[5]
[4]
[3]
Stripe
R
R
R
0
0
0
Striping support: 1 = yes 0 = no.
FormatOvrd
AmpParOvrd
Stream format override: 1 = yes 0 = no.
Amplifier capabilities override:
1 = yes no.
[2]
[1]
[0]
OutAmpPrsnt
InAmpPrsnt
Stereo
R
R
R
0
0
1
Output amp present: 1 = yes 0 = no.
Input amp present: 1 = yes 0 = no.
Stereo stream support: 1 = yes (stereo)
0 = no (mono).
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Ten Channel HD Audio Codec
5.19.2. ADC0 ConLst
Verb ID
Payload
Response
F00
0E
See bitfield table.
Get
5.19.2.1. ADC0 ConLst
Bit
[31.:8]
[7]
Bitfield Name
Rsvd
RW
R
Reset
Description
000000
0
Reserved.
LForm
R
Connection list format: 1 = long-form
(15-bit) NID entries 0 = short-form
(7-bit) NID entries.
[6.:0]
ConL
R
01
Number of NID entries in connection list.
5.19.3. ADC0 ConLstEntry0
Verb ID
Payload
Response
F02
00
See bitfield table.
Get
5.19.3.1. ADC0 ConLstEntry0
Bit
[31.:24]
[23.:16]
[15.:8]
[7.:0]
Bitfield Name
ConL3
RW
R
Reset
00
Description
Unused list entry.
Unused list entry.
Unused list entry.
ConL2
ConL1
ConL0
R
00
00
20
R
R
ADC0Mux Selector widget (0x20)
5.19.4. ADC0 Cnvtr
Verb ID
Payload
Response
A
0000
See bitfield table.
Get
146
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©2011 INTEGRATED DEVICE TECHNOLOGY, INC.
92HD73E
Ten Channel HD Audio Codec
5.19.4.1. ADC0 Cnvtr
Bit
[31.:16]
[15]
Bitfield Name
Rsvd2
RW
Reset
0000
Description
R
Reserved.
StrmType
R
0
0
Stream type: 1 = Non-PCM 0 = PCM.
[14]
FrmtSmplRate
RW
Sample base rate: 1 = 44.1kHz 0 =
48kHz.
[13.:11]
SmplRateMultp
SmplRateDiv
RW
RW
0
0
Sample base rate multiple: 000b= x1
(48kHz/44.1kHz or less); 001b= x2
(96kHz/88.2kHz/32kHz); 010b= x3
(144kHz); 011b= x4
(192kHz/176.4kHz); 100b-111b Re-
served
[10.:8]
Sample base rate divider: 000b= Divide
by 1 (48kHz/44.1kHz); 001b= Divide by
2 (24kHz/20.05kHz); 010b= Divide by 3
(16kHz/32kHz); 011b= Divide by 4
(11.025kHz); 100b= Divide by 5
(9.6kHz); 101b= Divide by 6 (8kHz);
110b= Divide by 7; 111b= Divide by 8
(6kHz)
[7]
Rsvd1
R
0
3
Reserved.
[6.:4]
BitsPerSmpl
RW
Bits per sample: 000b= 8 bits; 001b= 16
bits; 010b= 20 bits; 011b= 24 bits;
100b= 32 bits; 101b-111b= Reserved
[3.:0]
NmbrChan
RW
1
Total number of channels in the stream
assigned to this converter:
0000b-1111b= 1-16 channels.
5.19.5. ADC0 ProcState
Verb ID
Payload
Response
F03
00
See bitfield table.
Get
147
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©2011 INTEGRATED DEVICE TECHNOLOGY, INC.
92HD73E
Ten Channel HD Audio Codec
5.19.5.1. ADC0 ProcState
Bit
Bitfield Name
Rsvd2
RW
Reset
000000
0
Description
[31.:8]
[7]
R
Reserved.
HPFOCDIS
RW
HPF offset calculation disable. 1 = cal-
culation disabled; 0 = calculation en-
abled.
[6.:2]
[1.:0]
Rsvd1
R
00
1
Reserved.
ADCHPFByp
RW
Processing State: 00b= bypass the ADC
HPF ("off") 01b-11b= ADC HPF is en-
abled ("on" or "benign").
5.19.6. ADC0 PwrState
Verb ID
Payload
Response
F05
00
See bitfield table.
Get
5.19.6.1. ADC0 PwrState
Bit
[31.:6]
[5.:4]
Bitfield Name
RW
R
Reset
Description
Rsvd2
0000000
Reserved.
Act
R
3
0
3
Actual power state of this widget.
Reserved.
[3.:2]
Rsvd1
Set
R
[1.:0]
RW
Current power state setting for this wid-
get.
5.19.7. ADC0 CnvtrID
Verb ID
Payload
Response
F06
00
See bitfield table.
Get
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©2011 INTEGRATED DEVICE TECHNOLOGY, INC.
92HD73E
Ten Channel HD Audio Codec
5.19.7.1. ADC0 CnvtrID
Bit
[31.:8]
[7.:4]
Bitfield Name
Rsvd
RW
Reset
000000
0
Description
R
Reserved.
Strm
RW
Stream ID: 0h = Converter "off" 1h-Fh =
valid IDs.
[3.:0]
Ch
RW
0
Channel assignment ("Ch" and "Ch+1"
assigned as a pair for a stereo convert-
er).
5.20. ADC1 Node (NID = 1B)
5.20.1. ADC1 WCap
Verb ID
Payload
Response
F00
09
See bitfield table.
Get
5.20.1.1. ADC1 WCap
Bit
Bitfield Name
RW
R
Reset
00
Description
[31.:24]
[23.:20]
Rsvd2
Reserved.
Type
R
1
Widget type: 0h = Out Converter; 1h = In
Converter; 2h = Summing (Mixer); 3h =
Selector (Mux); 4h = Pin Complex; 5h =
Power; 6h = Volume Knob; 7h = Beep
Generator; 8h-Eh = Reserved; Fh =
Vendor Defined
[19.:16]
Delay
R
D
Number of sample delays through wid-
get.
[15.:12]
[11]
Rsvd1
R
R
R
R
0
0
1
0
Reserved.
SwapCap
PwrCntrl
Dig
Left/right swap support: 1 = yes 0 = no.
Power state support: 1 = yes 0 = no.
[10]
[9]
Digital stream support: 1 = yes (digital)
0 = no (analog).
[8]
ConnList
R
1
Connection list present: 1 = yes 0 = no.
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5.20.1.1. ADC1 WCap
Bit
Bitfield Name
UnSolCap
RW
Reset
Description
[7]
[6]
R
0
1
Unsolicited response support:
1 = yes 0 = no.
ProcWidget
R
Processing state support:
1 = yes 0 = no.
[5]
[4]
[3]
Stripe
R
R
R
0
0
0
Striping support: 1 = yes 0 = no.
FormatOvrd
AmpParOvrd
Stream format override: 1 = yes 0 = no.
Amplifier capabilities override:
1 = yes no.
[2]
[1]
[0]
OutAmpPrsnt
InAmpPrsnt
Stereo
R
R
R
0
0
1
Output amp present: 1 = yes 0 = no.
Input amp present: 1 = yes 0 = no.
Stereo stream support: 1 = yes (stereo)
0 = no (mono).
5.20.2. ADC1 ConLst
Verb ID
Payload
Response
F00
0E
See bitfield table.
Get
5.20.2.1. ADC1 ConLst
Bit
[31.:8]
[7]
Bitfield Name
RW
R
Reset
Description
Rsvd
000000
0
Reserved.
LForm
R
Connection list format: 1 = long-form
(15-bit) NID entries 0 = short-form
(7-bit) NID entries.
[6.:0]
ConL
R
01
Number of NID entries in connection list.
5.20.3. ADC1 ConLstEntry0
Verb ID
Payload
Response
F02
00
See bitfield table.
Get
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5.20.3.1. ADC1 ConLstEntry0
Bit
Bitfield Name
ConL3
RW
Reset
00
Description
Unused list entry.
[31.:24]
[23.:16]
[15.:8]
[7.:0]
R
ConL2
ConL1
ConL0
R
R
R
00
00
21
Unused list entry.
Unused list entry.
ADC1Mux widget (0x21)
5.20.4. ADC1 Cnvtr
Verb ID
Payload
Response
See bitfield table.
A00
00
Get
5.20.4.1. ADC1 Cnvtr
Bit
[31.:16]
[15]
Bitfield Name
Rsvd2
RW
R
Reset
Description
0000
Reserved.
StrmType
R
0
0
Stream type: 1 = Non-PCM 0 = PCM.
[14]
FrmtSmplRate
RW
Sample base rate: 1 = 44.1kHz 0 =
48kHz.
[13.:11]
SmplRateMultp
SmplRateDiv
RW
RW
0
0
Sample base rate multiple: 000b= x1
(48kHz/44.1kHz or less); 001b= x2
(96kHz/88.2kHz/32kHz); 010b= x3
(144kHz); 011b= x4
(192kHz/176.4kHz); 100b-111b Re-
served
[10.:8]
Sample base rate divider: 000b= Divide
by 1 (48kHz/44.1kHz); 001b= Divide by
2 (24kHz/20.05kHz); 010b= Divide by 3
(16kHz/32kHz); 011b= Divide by 4
(11.025kHz); 100b= Divide by 5
(9.6kHz); 101b= Divide by 6 (8kHz);
110b= Divide by 7; 111b= Divide by 8
(6kHz)
[7]
Rsvd1
R
0
Reserved.
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5.20.4.1. ADC1 Cnvtr
Bit
[6.:4]
Bitfield Name
RW
Reset
Description
BitsPerSmpl
RW
3
1
Bits per sample: 000b= 8 bits; 001b= 16
bits; 010b= 20 bits; 011b= 24 bits;
100b= 32 bits; 101b-111b= Reserved
[3.:0]
NmbrChan
RW
Total number of channels in the stream
assigned to this converter:
0000b-1111b= 1-16 channels.
5.20.5. ADC1 ProcState
Verb ID
Payload
Response
F03
00
See bitfield table.
Get
5.20.5.1. ADC1 ProcState
Bit
[31.:8]
[7]
Bitfield Name
RW
R
Reset
Description
Rsvd2
000000
0
Reserved.
HPFOCDIS
RW
HPF offset calculation disable. 1 = cal-
culation disabled; 0 = calculation en-
abled.
[6.:2]
[1.:0]
Rsvd1
R
00
1
Reserved.
ADCHPFByp
RW
Processing State: 00b= bypass the ADC
HPF ("off") 01b-11b= ADC HPF is en-
abled ("on" or "benign").
5.20.6. ADC1 PwrState
Verb ID
Payload
Response
F05
00
See bitfield table.
Get
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5.20.6.1. ADC1 PwrState
Bit
Bitfield Name
Rsvd2
RW
Reset
Description
[31.:6]
[5.:4]
[3.:2]
[1.:0]
R
0000000
Reserved.
Act
R
3
0
3
Actual power state of this widget.
Reserved.
Rsvd1
Set
R
RW
Current power state setting for this wid-
get.
5.20.7. ADC1 CnvtrID
Verb ID
Payload
Response
F06
00
See bitfield table.
Get
5.20.7.1. ADC1 CnvtrID
Bit
[31.:8]
[7.:4]
Bitfield Name
Rsvd
RW
R
Reset
000000
0
Description
Reserved.
Strm
RW
Stream ID: 0h = Converter "off" 1h-Fh =
valid IDs.
[3.:0]
Ch
RW
0
Channel assignment ("Ch" and "Ch+1"
assigned as a pair for a stereo convert-
er).
5.21. DigBeep Node (NID = 1C)
5.21.1. DigBeep WCap
Verb ID
Payload
Response
F00
09
See bitfield table.
Get
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5.21.1.1. DigBeep WCap
Bit
Bitfield Name
Rsvd3
RW
Reset
00
Description
[31.:24]
[23.:20]
R
Reserved.
Type
R
7
Widget type: 0h = Out Converter; 1h = In
Converter; 2h = Summing (Mixer); 3h =
Selector (Mux); 4h = Pin Complex; 5h =
Power; 6h = Volume Knob; 7h = Beep
Generator; 8h-Eh = Reserved; Fh =
Vendor Defined
[19.:4]
[3]
Rsvd2
R
R
0
1
Reserved.
AmpParOvrd
Amplifier capabilities override: 1 = yes,
no.
[2]
OutAmpPrsnt
Rsvd1
R
R
1
0
Output amp present: 1 = yes, 0 = no.
Reserved.
[1.:0]
5.21.2. DigBeep OutAmpCap
Verb ID
Payload
Response
F00
12
See bitfield table.
Get
5.21.2.1. DigBeep OutAmpCap
Bit
Bitfield Name
Mute
RW
Reset
Description
[31]
R
1
Mute support: 1 = yes, 0 = no.
Reserved.
[30.:23]
[22.:16]
Rsvd3
R
R
00
17
StepSize
Size of each step in the gain range: 0 to
127 = .25dB to 32dB, in .25dB steps.
[15]
Rsvd2
R
R
0
Reserved.
[14.:8]
NumSteps
03
Number of gains steps (number of pos-
sible settings - 1).
[7]
Rsvd1
Offset
R
R
0
Reserved.
[6.:0]
03
Indicates which step is 0dB
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5.21.3. DigBeep OutAmpLeft
Verb ID
Payload
Response
BA0
00
See bitfield table.
Get
5.21.3.1. DigBeep OutAmpLeft
Bit
[31.:8]
[7]
Bitfield Name
Rsvd2
RW
Reset
Description
R
000000
Reserved.
Mute
Rsvd1
Gain
RW
R
0
Amp mute: 1 = muted, 0 = not muted.
Reserved.
[6.:2]
[1.:0]
00
0
RW
Amp gain step number (see OutAmp-
Cap parameter pertaining to this wid-
get).
5.21.4. DigBeep Gen
Verb ID
Payload
Response
F0A
00
See bitfield table.
Get
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5.21.4.1. DigBeep Gen
Bit
[31.:8]
[7.:0]
Bitfield Name
Rsvd
Divider
RW
Reset
000000
00
Description
R
Reserved.
RW
Enable internal PC-Beep generation.
Divider == 00h disables internal PC
Beep generation and enables normal
operation of the codec. Divider != 00h
generates the beep tone on all Pin Com-
plexes that are currently configured as
outputs. The HD Audio spec states that
the beep tone frequency = (48kHz HD
Audio SYNC rate) / (4*Divider), produc-
ing tones from 47 Hz to 12 kHz (logarith-
mic scale). This part can selectively
generate tones with frequency = 48KHz
* (257 - Divider) / 1024, yielding a linear
range from 12kHz to 93.75Hz in steps of
46.875Hz. If the FreqShift bit is set, then
the beep tones generated have frequen-
cy = 48KHz * (513 - Divider) / 1024,
yielding a range of 24kHz to
12093.75Hz in steps of 46.875Hz.
5.22. Mixer Node (NID = 1D)
5.22.1. Mixer WCap
Verb ID
Payload
Response
F00
09
See bitfield table.
Get
5.22.1.1. MonoMixer WCap
Bit
Bitfield Name
Rsvd2
Type
RW
R
Reset
00
Description
[31.:24]
[23.:20]
Reserved.
R
2
Widget type: 0h = Out Converter; 1h = In
Converter; 2h = Summing (Mixer); 3h =
Selector (Mux); 4h = Pin Complex; 5h =
Power; 6h = Volume Knob; 7h = Beep
Generator; 8h-Eh = Reserved; Fh =
Vendor Defined
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5.22.1.1. MonoMixer WCap
Bit
Bitfield Name
Delay
RW
Reset
Description
[19.:16]
R
0
Number of sample delays through wid-
get.
[15.:12]
[11]
Rsvd1
R
R
R
R
0
0
0
0
Reserved.
SwapCap
PwrCntrl
Dig
Left/right swap support: 1 = yes 0 = no.
Power state support: 1 = yes 0 = no.
[10]
[9]
Digital stream support: 1 = yes (digital)
0 = no (analog).
[8]
[7]
ConnList
R
R
1
0
Connection list present: 1 = yes 0 = no.
UnSolCap
Unsolicited response support:
1 = yes 0 = no.
[6]
ProcWidget
R
0
Processing state support:
1 = yes 0 = no.
[5]
[4]
[3]
Stripe
R
R
R
0
0
1
Striping support: 1 = yes 0 = no.
FormatOvrd
AmpParOvrd
Stream format override: 1 = yes 0 = no.
Amplifier capabilities override:
1 = yes no.
[2]
[1]
[0]
OutAmpPrsnt
InAmpPrsnt
Stereo
R
R
R
0
1
1
Output amp present: 1 = yes 0 = no.
Input amp present: 1 = yes 0 = no.
Stereo stream support: 1 = yes (stereo)
0 = no (mono).
5.22.2. Mixer ConLst
Verb ID
Payload
Response
F00
0E
See bitfield table.
Get
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5.22.2.1. Mixer ConLst
Bit
[31.:8]
[7]
Bitfield Name
Rsvd
RW
Reset
000000
0
Description
R
Reserved.
LForm
R
Connection list format: 1 = long-form
(15-bit) NID entries 0 = short-form
(7-bit) NID entries.
[6.:0]
ConL
R
03
Number of NID entries in connection list.
5.22.3. Mixer ConLstEntry0
Verb ID
Payload
Response
F02
00
See bitfield table.
Get
5.22.3.1. Mixer ConLstEntry0
Bit
Bitfield Name
ConL3
RW
R
Reset
00
Description
Unused list entry.
[31.:24]
[23.:16]
Port I Pin Widget (CD In) (0x12),. Uses
InAmpLeft5/InAmpRight5 controls
ConL2
R
12
2B
2B
28
1 = ConL0..ConL1 defines a range of select-
able inputs.
[15]
ConL1Range
ConL1
R
R
R
InPort3Mux Selector widget (0x2B). Uses
InAmpLeft3/InAmpRight3 controls.
[14.:8]
[7.:0]
InPort0Mux Selector widget (0x28). Uses
InAmpLeft0/InAmpRight0 controls.
ConL0
5.22.4. Mixer InAmpCap
Verb ID
Payload
Response
F00
0D
See bitfield table.
Get
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Ten Channel HD Audio Codec
5.22.4.1. Mixer InAmpCap
Bit
Bitfield Name
Mute
RW
Reset
Description
Mute support: 1 = yes 0 = no.
Reserved.
[31]
R
1
[30.:23]
[22.:16]
Rsvd3
R
R
00
05
StepSize
Size of each step in the gain range: 0 to
127 = .25dB to 32dB in .25dB steps.
[15]
Rsvd2
R
R
0
Reserved.
[14.:8]
NumSteps
1F
Number of gains steps (number of pos-
sible settings - 1).
[7]
Rsvd1
Offset
R
R
0
Reserved.
[6.:0]
17
Indicates which step is 0dB
5.22.5. Mixer InAmpLeft0
Verb ID
Payload
Response
B20
00
See bitfield table.
Get
5.22.5.1. Mixer InAmpLeft0
Bit
[31.:8]
[7]
Bitfield Name
Rsvd2
RW
R
Reset
Description
000000
Reserved.
Mute
Rsvd1
Gain
RW
R
1
Amp mute: 1 = muted 0 = not muted.
Reserved.
[6.:5]
[4.:0]
0
RW
17
Amp gain step number (see InAmpCap
parameter pertaining to this widget).
5.22.6. Mixer InAmpRight0
Verb ID
Payload
Response
B00
00
See bitfield table.
Get
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Ten Channel HD Audio Codec
5.22.6.1. Mixer InAmpRight0
Bit
Bitfield Name
Rsvd2
RW
Reset
Description
[31.:8]
[7]
R
000000
Reserved.
Mute
Rsvd1
Gain
RW
R
1
Amp mute: 1 = muted 0 = not muted.
Reserved.
[6.:5]
[4.:0]
0
RW
17
Amp gain step number (see InAmpCap
parameter pertaining to this widget).
5.22.7. Mixer InAmpLeft1
Verb ID
Payload
Response
B20
01
See bitfield table.
Get
5.22.7.1. Mixer InAmpLeft1
Bit
[31.:8]
[7]
Bitfield Name
Rsvd2
RW
R
Reset
Description
000000
Reserved.
Mute
Rsvd1
Gain
RW
R
1
Amp mute: 1 = muted 0 = not muted.
Reserved.
[6.:5]
[4.:0]
0
RW
17
Amp gain step number (see InAmpCap
parameter pertaining to this widget).
5.22.8. Mixer InAmpRight1
Verb ID
Payload
Response
B00
01
See bitfield table.
Get
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Ten Channel HD Audio Codec
5.22.8.1. Mixer InAmpRight1
Bit
Bitfield Name
Rsvd2
RW
Reset
Description
[31.:8]
[7]
R
000000
Reserved.
Mute
Rsvd1
Gain
RW
R
1
Amp mute: 1 = muted 0 = not muted.
Reserved.
[6.:5]
[4.:0]
0
RW
17
Amp gain step number (see InAmpCap
parameter pertaining to this widget).
5.22.9. Mixer InAmpLeft2
Verb ID
Payload
Response
B20
02
See bitfield table.
Get
5.22.9.1. Mixer InAmpLeft2
Bit
[31.:8]
[7]
Bitfield Name
Rsvd2
RW
R
Reset
Description
000000
Reserved.
Mute
Rsvd1
Gain
RW
R
1
Amp mute: 1 = muted 0 = not muted.
Reserved.
[6.:5]
[4.:0]
0
RW
17
Amp gain step number (see InAmpCap
parameter pertaining to this widget).
5.22.10. Mixer InAmpRight2
Verb ID
Payload
Response
B00
02
See bitfield table.
Get
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Ten Channel HD Audio Codec
5.22.10.1. Mixer InAmpRight0
Bit
Bitfield Name
Rsvd2
RW
Reset
Description
[31.:8]
[7]
R
000000
Reserved.
Mute
Rsvd1
Gain
RW
R
1
Amp mute: 1 = muted 0 = not muted.
Reserved.
[6.:5]
[4.:0]
0
RW
17
Amp gain step number (see InAmpCap
parameter pertaining to this widget).
5.22.11. Mixer InAmpLeft3
Verb ID
Payload
Response
B20
03
See bitfield table.
Get
5.22.11.1. Mixer InAmpLeft3
Bit
[31.:8]
[7]
Bitfield Name
Rsvd2
RW
R
Reset
Description
000000
Reserved.
Mute
Rsvd1
Gain
RW
R
1
Amp mute: 1 = muted 0 = not muted.
Reserved.
[6.:5]
[4.:0]
0
RW
17
Amp gain step number (see InAmpCap
parameter pertaining to this widget).
5.22.12. Mixer InAmpRight3
Verb ID
Payload
Response
B00
03
See bitfield table.
Get
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5.22.12.1. Mixer InAmpRight3
Bit
Bitfield Name
Rsvd2
RW
Reset
Description
[31.:8]
[7]
R
000000
Reserved.
Mute
Rsvd1
Gain
RW
R
1
Amp mute: 1 = muted 0 = not muted.
Reserved.
[6.:5]
[4.:0]
0
RW
17
Amp gain step number (see InAmpCap
parameter pertaining to this widget).
5.22.13. Mixer InAmpLeft4
Verb ID
Payload
Response
B20
04
See bitfield table.
Get
5.22.13.1. Mixer InAmpLeft4
Bit
[31.:8]
[7]
Bitfield Name
Rsvd2
RW
R
Reset
Description
000000
Reserved.
Mute
Rsvd1
Gain
RW
R
1
Amp mute: 1 = muted 0 = not muted.
Reserved.
[6.:5]
[4.:0]
0
RW
17
Amp gain step number (see InAmpCap
parameter pertaining to this widget).
5.22.14. Mixer InAmpRight4
Verb ID
Payload
Response
B00
04
See bitfield table.
Get
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Ten Channel HD Audio Codec
5.22.14.1. Mixer InAmpRight0
Bit
Bitfield Name
Rsvd2
RW
Reset
Description
[31.:8]
[7]
R
000000
Reserved.
Mute
Rsvd1
Gain
RW
R
1
Amp mute: 1 = muted 0 = not muted.
Reserved.
[6.:5]
[4.:0]
0
RW
17
Amp gain step number (see InAmpCap
parameter pertaining to this widget).
5.23. MixerOutVol Node (NID = 1E)
5.23.1. MixerOutVol WCap
Verb ID
Payload
Response
F00
09
See bitfield table.
Get
5.23.1.1. MonoMixer WCap
Bit
Bitfield Name
Rsvd2
RW
R
Reset
00
Description
[31.:24]
[23.:20]
Reserved.
Type
R
3
Widget type: 0h = Out Converter; 1h = In
Converter; 2h = Summing (Mixer); 3h =
Selector (Mux); 4h = Pin Complex; 5h =
Power; 6h = Volume Knob; 7h = Beep
Generator; 8h-Eh = Reserved; Fh =
Vendor Defined
[19.:16]
Delay
R
0
Number of sample delays through wid-
get.
[15.:12]
[11]
Rsvd1
R
R
R
R
0
0
0
0
Reserved.
SwapCap
PwrCntrl
Dig
Left/right swap support: 1 = yes 0 = no.
Power state support: 1 = yes 0 = no.
[10]
[9]
Digital stream support: 1 = yes (digital)
0 = no (analog).
[8]
ConnList
R
1
Connection list present: 1 = yes 0 = no.
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5.23.1.1. MonoMixer WCap
Bit
Bitfield Name
UnSolCap
RW
Reset
Description
[7]
[6]
R
0
0
Unsolicited response support:
1 = yes 0 = no.
ProcWidget
R
Processing state support:
1 = yes 0 = no.
[5]
[4]
[3]
Stripe
R
R
R
0
0
1
Striping support: 1 = yes 0 = no.
FormatOvrd
AmpParOvrd
Stream format override: 1 = yes 0 = no.
Amplifier capabilities override:
1 = yes no.
[2]
[1]
[0]
OutAmpPrsnt
InAmpPrsnt
Stereo
R
R
R
1
1
1
Output amp present: 1 = yes 0 = no.
Input amp present: 1 = yes 0 = no.
Stereo stream support: 1 = yes (stereo)
0 = no (mono).
5.23.2. MixerOutVol ConLst
Verb ID
Payload
Response
F00
0E
See bitfield table.
Get
5.23.2.1. MixerOutVol ConLst
Bit
[31.:8]
[7]
Bitfield Name
Rsvd
RW
R
Reset
Description
000000
0
Reserved.
LForm
R
Connection list format: 1 = long-form
(15-bit) NID entries 0 = short-form
(7-bit) NID entries.
[6.:0]
ConL
R
1
Number of NID entries in connection list.
5.23.3. MixerOutVol ConLstEntry0
Verb ID
Payload
Response
F02
00
See bitfield table.
Get
165
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©2011 INTEGRATED DEVICE TECHNOLOGY, INC.
92HD73E
Ten Channel HD Audio Codec
5.23.3.1. Mixer ConLstEntry0
Bit
Bitfield Name
ConL3
RW
Reset
00
Description
Unused list entry.
[31.:24]
[23.:16]
[15.:8]
[7.:0]
R
ConL2
ConL1
ConL0
R
R
R
00
00
1D
Unused list entry.
Unused list entry.
Mixer Summing widget (0x1D)
5.23.4. MixerOutVol OutAmpCap
Verb ID
Payload
Response
See bitfield table.
F00
12
Get
5.23.4.1. MixerOutVol OutAmpCap
Bit
Bitfield Name
Mute
RW
Reset
Description
[31]
R
0
Mute support: 1 = yes 0 = no.
Reserved.
[30.:23]
[22.:16]
Rsvd3
R
R
00
05
StepSize
Size of each step in the gain range: 0 to
127 = .25dB to 32dB in .25dB steps.
[15]
Rsvd2
R
R
0
Reserved.
[14.:8]
NumSteps
1F
Number of gains steps (number of pos-
sible settings - 1).
[7]
Rsvd1
Offset
R
R
0
Reserved.
[6.:0]
1F
Indicates which step is 0dB
5.23.5. MixerOutVol OutAmpLeft
Verb ID
Payload
Response
BA0
00
See bitfield table.
Get
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©2011 INTEGRATED DEVICE TECHNOLOGY, INC.
92HD73E
Ten Channel HD Audio Codec
5.23.5.1. MixerOutVol OutAmpLeft
Bit
Bitfield Name
Rsvd2
RW
Reset
Description
[31.:8]
[7]
R
000000
Reserved.
Mute
Rsvd1
Gain
RW
R
1
Amp mute: 1 = muted 0 = not muted.
Reserved.
[6.:5]
[4.:0]
0
RW
1F
Amp gain step number (see OutAmp-
Cap parameter pertaining to this wid-
get).
5.23.6. MixerOutVol OutAmpRight0
Verb ID
Payload
Response
B80
00
See bitfield table.
Get
5.23.6.1. MixerOutVol OutAmpRight
Bit
[31.:8]
[7]
Bitfield Name
Rsvd2
RW
Reset
Description
R
000000
Reserved.
Mute
Rsvd1
Gain
RW
R
1
Amp mute: 1 = muted 0 = not muted.
Reserved.
[6.:5]
[4.:0]
0
RW
1F
Amp gain step number (see OutAmp-
Cap parameter pertaining to this wid-
get).
5.24. VolumeKnob Node (NID = 1F)
5.24.1. VolumeKnob WCap
Verb ID
Payload
Response
F00
09
See bitfield table.
Get
167
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©2011 INTEGRATED DEVICE TECHNOLOGY, INC.
92HD73E
Ten Channel HD Audio Codec
5.24.1.1. VolumeKnob WCap
Bit
Bitfield Name
Rsvd2
RW
Reset
00
Description
[31.:24]
[23.:20]
R
Reserved.
Type
R
6
Widget type: 0h = Out Converter; 1h = In
Converter; 2h = Summing (Mixer); 3h =
Selector (Mux); 4h = Pin Complex; 5h =
Power; 6h = Volume Knob; 7h = Beep
Generator; 8h-Eh = Reserved; Fh =
Vendor Defined
[19.:0]
Rsvd1
R
0
Reserved.
5.24.2. VolumeKnob VolKnobCap
Verb ID
Payload
Response
F00
13
See bitfield table.
Get
5.24.2.1. VolumeKnob VolKnobCap
Bit
[31.:8]
[7]
Bitfield Name
Rsvd
RW
Reset
Description
R
000000
1
Reserved.
Delta
R
Indicates if software can write a base
volume to the Volume Control Knob.
[6.:0]
NumSteps
R
7F
Number of gains steps (number of pos-
sible settings - 1).
5.24.3. VolumeKnob ConLst
Verb ID
Payload
Response
F00
0E
See bitfield table.
Get
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92HD73E
©2011 INTEGRATED DEVICE TECHNOLOGY, INC.
92HD73E
Ten Channel HD Audio Codec
5.24.3.1. VolumeKnob ConLst
Bit
Bitfield Name
Rsvd
RW
Reset
000000
0
Description
[31.:8]
[7]
R
Reserved.
LForm
R
Connection list format: 1 = long-form
(15-bit) NID entries, 0 = short-form
(7-bit) NID entries.
[6.:0]
ConL
R
02
Number of NID entries in connection list.
5.24.4. VolumeKnob ConLstEntry0
Verb ID
Payload
Response
F02
00
See bitfield table.
Get
5.24.4.1. VolumeKnob ConLstEntry0
Bit
[31.:24]
[23.:16]
[15]
Bitfield Name
ConL3
RW
Reset
00
Description
R
Unused list entry.
Unused list entry.
ConL2
R
R
00
1
1 = ConL0..ConL1 defines a range of select-
able inputs.
ConL1Range
[14.:8]
[7.:0]
ConL1
ConL0
R
R
19
15
DAC4 Converter widget (0x19)
DAC0 Converter widget (0x15)
5.24.5. VolumeKnob UnsolResp
Verb ID
Payload
Response
F08
00
See bitfield table.
Get
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©2011 INTEGRATED DEVICE TECHNOLOGY, INC.
92HD73E
Ten Channel HD Audio Codec
5.24.5.1. VolumeKnob UnsolResp
Bit
Bitfield Name
Rsvd2
RW
Reset
000000
0
Description
[31.:8]
[7]
R
Reserved.
En
RW
Unsolicited response enable: 1 = en-
abled, 0 = disabled.
[6]
Rsvd1
Tag
R
0
Reserved.
[5.:0]
RW
00
Software programmable field returned
in top six bits (31:26) of every Unsolicit-
ed Response generated by this node.
5.24.6. VolumeKnob Cntrl
Verb ID
Payload
Response
F0F
00
See bitfield table.
Get
5.24.6.1. VolumeKnob Cntrl
Bit
[31.:8]
[7]
Bitfield Name
Rsvd
RW
R
Reset
000000
0
Description
Reserved.
Direct
RW
Direct = 1 causes the volume control to
directly control the hardware volume of
the slave amps. Direct = 0 causes unso-
licited responses to be generated.
[6.:0]
Volume
RW
7F
Volume, specified in steps of amplifier
gain
5.24.7. VolumeKnob VS
Verb ID
Payload
Response
FE0
00
See bitfield table.
Get
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©2011 INTEGRATED DEVICE TECHNOLOGY, INC.
92HD73E
Ten Channel HD Audio Codec
5.24.7.1. VolumeKnob VS
Bit
Bitfield Name
Rsvd
RW
Reset
0000000
1
Description
[31.:3]
[4]
R
Reserved.
Continuous
RW
Allow continuous incrementing/decre-
menting of the volume knob value.
[3.:1]
[0]
Rate
RW
0
0
Volume knob update rate, for continu-
ous mode and de-bouncing (0..7 =
2.5..20Hz, in increments of 2.5Hz)
Enable
RW
Volume knob enable: 0 = DMic uses ex-
ternal pins, 1 = Volume knob uses exter-
nal pins.
5.25. ADC0Mux Node (NID = 20)
5.25.1. ADC0Mux WCap
Verb ID
Payload
Response
F00
09
See bitfield table.
Get
5.25.1.1. ADC0Mux WCap
Bit
Bitfield Name
Rsvd2
RW
R
Reset
Description
[31.:24]
[23.:20]
00
3
Reserved.
Type
R
Widget type: 0h = Out Converter; 1h = In
Converter; 2h = Summing (Mixer); 3h =
Selector (Mux); 4h = Pin Complex; 5h =
Power; 6h = Volume Knob; 7h = Beep
Generator; 8h-Eh = Reserved; Fh =
Vendor Defined
[19.:16]
Delay
R
0
Number of sample delays through wid-
get.
[15.:12]
[11]
Rsvd1
R
R
R
0
1
0
Reserved.
SwapCap
PwrCntrl
Left/right swap support: 1 = yes 0 = no.
Power state support: 1 = yes 0 = no.
[10]
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Ten Channel HD Audio Codec
5.25.1.1. ADC0Mux WCap
Bit
Bitfield Name
RW
Reset
Description
[9]
DigitalStrm
R
0
Digital stream support: 1 = yes (digital)
0 = no (analog).
[8]
[7]
ConnList
R
R
1
0
Connection list present: 1 = yes 0 = no.
UnsolCap
Unsolicited response support:
1 = yes 0 = no.
[6]
ProcWidget
R
0
Processing state support:
1 = yes 0 = no.
[5]
[4]
[3]
Stripe
R
R
R
0
0
1
Striping support: 1 = yes 0 = no.
FormatOvrd
AmpParamOvrd
Stream format override: 1 = yes 0 = no.
Amplifier capabilities override:
1 = yes no.
[2]
[1]
[0]
OutAmpPrsnt
InAmpPrsnt
Stereo
R
R
R
1
0
1
Output amp present: 1 = yes 0 = no.
Input amp present: 1 = yes 0 = no.
Stereo stream support: 1 = yes (stereo)
0 = no (mono).
5.25.2. ADC0Mux ConLst
Verb ID
Payload
Response
F00
0E
See bitfield table.
Get
5.25.2.1. ADC0Mux ConLst
Bit
[31.:8]
[7]
Bitfield Name
Rsvd
RW
R
Reset
Description
000000
0
Reserved.
LForm
R
Connection list format: 1 = long-form
(15-bit) NID entries 0 = short-form
(7-bit) NID entries.
[6.:0]
ConL
R
03
Number of NID entries in connection list.
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Ten Channel HD Audio Codec
5.25.3. ADC0Mux ConLstEntry0
Verb ID
Payload
Response
F02
00
See bitfield table.
Get
5.25.3.1. ADC0Mux ConLstEntry0
Bit
[31.:24]
[23.:16]
[15]
Bitfield Name
ConL3
RW
Reset
00
Description
Unused list entry
R
ConL2
R
R
1D
1
Mixer Summing widget (0x1D)
ConL1Range
1 = ConL0..ConL1 defines a range of
selectable inputs
[14.:8]
[7.:0]
ConL1
ConL0
R
R
14
0A
DMic1 Pin widget (0x14)
Port A Pin widget (0x0A)
5.25.4. ADC0Mux ConSelectCtrl
Verb ID
Payload
Response
F01
00
See bitfield table.
Get
5.25.4.1. ADC0Mux ConSelectCtrl
Bit
[31.:2]
[1.:0]
Bitfield Name
Rsvd
Index
RW
Reset
00000000 Reserved.
0 Connection select control index.
Description
R
RW
5.25.5. ADC0Mux LR
Verb ID
Payload
Response
F0C
00
See bitfield table.
Get
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©2011 INTEGRATED DEVICE TECHNOLOGY, INC.
92HD73E
Ten Channel HD Audio Codec
5.25.5.1. ADC0Mux LR
Bit
[31.:3]
[2]
Bitfield Name
Rsvd2
RW
Reset
Description
R
00000000 Reserved.
SwapEn
RW
0
Swap enable: 1 = L/R swap enabled 0
= L/R swap disabled.
[1.:0]
Rsvd1
R
0
Reserved.
5.25.6. ADC0Mux OutAmpCap
Verb ID
Payload
Response
F00
12
See bitfield table.
Get
5.25.6.1. ADC0Mux OutAmpCap
Bit
Bitfield Name
Mute
RW
Reset
Description
[31]
R
1
Mute support: 1 = yes 0 = no.
Reserved.
[30.:23]
[22.:16]
Rsvd3
R
R
00
05
StepSize
Size of each step in the gain range: 0 to
127 = .25dB to 32dB in .25dB steps.
[15]
Rsvd2
R
R
0
Reserved.
[14.:8]
NumSteps
0F
Number of gains steps (number of pos-
sible settings - 1).
[7]
Rsvd1
Offset
R
R
0
Reserved.
[6.:0]
00
Indicates which step is 0dB
5.25.7. ADC0Mux OutAmpLeft
Verb ID
Payload
Response
BA0
00
See bitfield table.
Get
174
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©2011 INTEGRATED DEVICE TECHNOLOGY, INC.
92HD73E
Ten Channel HD Audio Codec
5.25.7.1. ADC0Mux OutAmpLeft
Bit
Bitfield Name
Rsvd2
RW
Reset
Description
[31.:8]
[7]
R
000000
Reserved.
Mute
Rsvd1
Gain
RW
R
1
0
0
Amp mute: 1 = muted 0 = not muted.
Reserved.
[6.:4]
[3.:0]
RW
Amp gain step number (see OutAmp-
Cap parameter pertaining to this wid-
get).
5.25.8. ADC0Mux OutAmpRight
Verb ID
Payload
Response
B80
00
See bitfield table.
Get
5.25.8.1. ADC0Mux OutAmpRight
Bit
[31.:8]
[7]
Bitfield Name
Rsvd2
RW
Reset
Description
R
000000
Reserved.
Mute
Rsvd1
Gain
RW
R
1
0
0
Amp mute: 1 = muted 0 = not muted.
Reserved.
[6.:4]
[3.:0]
RW
Amp gain step number (see OutAmp-
Cap parameter pertaining to this wid-
get).
5.26. ADC1Mux Node (NID = 21)
5.26.1. ADC1Mux WCap
Verb ID
Payload
Response
F00
09
See bitfield table.
Get
175
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©2011 INTEGRATED DEVICE TECHNOLOGY, INC.
92HD73E
Ten Channel HD Audio Codec
5.26.1.1. ADC1Mux WCap
Bit
Bitfield Name
Rsvd2
RW
Reset
00
Description
[31.:24]
[23.:20]
R
Reserved.
Type
R
3
Widget type: 0h = Out Converter; 1h = In
Converter; 2h = Summing (Mixer); 3h =
Selector (Mux); 4h = Pin Complex; 5h =
Power; 6h = Volume Knob; 7h = Beep
Generator; 8h-Eh = Reserved; Fh =
Vendor Defined
[19.:16]
Delay
R
0
Number of sample delays through wid-
get.
[15.:12]
[11]
Rsvd1
R
R
R
R
0
1
0
0
Reserved.
SwapCap
PwrCntrl
DigitalStrm
Left/right swap support: 1 = yes 0 = no.
Power state support: 1 = yes 0 = no.
[10]
[9]
Digital stream support: 1 = yes (digital)
0 = no (analog).
[8]
[7]
ConnList
R
R
1
0
Connection list present: 1 = yes 0 = no.
UnsolCap
Unsolicited response support: 1 = yes 0
= no.
[6]
ProcWidget
R
0
Processing state support: 1 = yes 0 =
no.
[5]
[4]
[3]
Stripe
R
R
R
0
0
1
Striping support: 1 = yes 0 = no.
FormatOvrd
AmpParamOvrd
Stream format override: 1 = yes 0 = no.
Amplifier capabilities override: 1 = yes
no.
[2]
[1]
[0]
OutAmpPrsnt
InAmpPrsnt
Stereo
R
R
R
1
0
1
Output amp present: 1 = yes 0 = no.
Input amp present: 1 = yes 0 = no.
Stereo stream support: 1 = yes (stereo)
0 = no (mono).
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Ten Channel HD Audio Codec
5.26.2. ADC1Mux ConLst
Verb ID
Payload
Response
F00
0E
See bitfield table.
Get
5.26.2.1. ADC1Mux ConLst
Bit
[31.:8]
[7]
Bitfield Name
Rsvd
RW
R
Reset
Description
000000
0
Reserved.
LForm
R
Connection list format: 1 = long-form
(15-bit) NID entries 0 = short-form
(7-bit) NID entries.
[6.:0]
ConL
R
04
Number of NID entries in connection list.
5.26.3. ADC1Mux ConLstEntry0
Verb ID
Payload
Response
F02
00
See bitfield table.
Get
5.26.3.1. ADC1Mux ConLstEntry0
Bit
[31.:24]
[23.:16]
[15]
Bitfield Name
ConL3
RW
Reset
00
Description
Unused list entry
R
ConL2
R
R
1D
1
Mixer Summing widget (0x1D)
ConL1Range
1 = ConL0..ConL1 defines a range of
selectable inputs
[14.:8]
[7.:0]
ConL1
ConL0
R
R
14
0A
DMic1 Pin widget (0x14)
Port A Pin widget (0x0A)
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Ten Channel HD Audio Codec
5.26.4. ADC1Mux ConSelectCtrl
Verb ID
Payload
Response
F01
00
See bitfield table.
Get
5.26.4.1. ADC1Mux ConSelectCtrl
Bit
[31.:2]
[1.:0]
Bitfield Name
Rsvd
Index
RW
Reset
00000000 Reserved.
0 Connection select control index.
Description
R
RW
5.26.5. ADC1Mux LR
Verb ID
Payload
Response
F0C
00
See bitfield table.
Get
5.26.5.1. ADC1Mux LR
Bit
[31.:3]
[2]
Bitfield Name
Rsvd2
RW
R
Reset
00000000 Reserved.
Description
SwapEn
RW
0
Swap enable: 1 = L/R swap enabled 0
= L/R swap disabled.
[1.:0]
Rsvd1
R
0
Reserved.
5.26.6. ADC1Mux OutAmpCap
Verb ID
Payload
Response
F00
12
See bitfield table.
Get
178
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92HD73E
©2011 INTEGRATED DEVICE TECHNOLOGY, INC.
92HD73E
Ten Channel HD Audio Codec
5.26.6.1. ADC1Mux OutAmpCap
Bit
Bitfield Name
Mute
RW
Reset
Description
Mute support: 1 = yes 0 = no.
Reserved.
[31]
R
1
[30.:23]
[22.:16]
Rsvd3
R
R
00
05
StepSize
Size of each step in the gain range: 0 to
127 = .25dB to 32dB in .25dB steps.
[15]
Rsvd2
R
R
0
Reserved.
[14.:8]
NumSteps
0F
Number of gains steps (number of pos-
sible settings - 1).
[7]
Rsvd1
Offset
R
R
0
Reserved.
[6.:0]
00
Indicates which step is 0dB
5.26.7. ADC1Mux OutAmpLeft
Verb ID
Payload
Response
BA0
00
See bitfield table.
Get
5.26.7.1. ADC1Mux OutAmpLeft
Bit
[31.:8]
[7]
Bitfield Name
Rsvd2
RW
Reset
Description
R
000000
Reserved.
Mute
Rsvd1
Gain
RW
R
1
0
0
Amp mute: 1 = muted 0 = not muted.
Reserved.
[6.:4]
[3.:0]
RW
Amp gain step number (see OutAmp-
Cap parameter pertaining to this wid-
get).
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Ten Channel HD Audio Codec
5.26.8. ADC1Mux OutAmpRight
Verb ID
Payload
Response
B80
00
See bitfield table.
Get
5.26.8.1. ADC1Mux OutAmpRight
Bit
[31.:8]
[7]
Bitfield Name
Rsvd2
RW
Reset
Description
R
000000
Reserved.
Mute
Rsvd1
Gain
RW
R
1
0
0
Amp mute: 1 = muted 0 = not muted.
Reserved.
[6.:4]
[3.:0]
RW
Amp gain step number (see OutAmp-
Cap parameter pertaining to this wid-
get).
5.27. Dig0Pin Node (NID = 22)
5.27.1. Dig0Pin WCap
Verb ID
Payload
Response
F00
09
See bitfield table.
Get
5.27.1.1. Dig0Pin WCap
Bit
Bitfield Name
RW
R
Reset
00
Description
[31.:24]
[23.:20]
Rsvd2
Reserved.
Type
R
4
Widget type: 0h = Out Converter; 1h = In
Converter; 2h = Summing (Mixer); 3h =
Selector (Mux); 4h = Pin Complex; 5h =
Power; 6h = Volume Knob; 7h = Beep
Generator; 8h-Eh = Reserved; Fh =
Vendor Defined
[19.:16]
Delay
R
0
Number of sample delays through wid-
get.
[15.:12]
[11]
Rsvd1
R
R
0
0
Reserved.
SwapCap
Left/right swap support: 1 = yes 0 = no.
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Ten Channel HD Audio Codec
5.27.1.1. Dig0Pin WCap
Bit
Bitfield Name
PwrCntrl
RW
Reset
Description
[10]
[9]
R
0
1
Power state support: 1 = yes 0 = no.
Dig
R
Digital stream support: 1 = yes (digital)
0 = no (analog).
[8]
[7]
ConnList
R
R
1
0
Connection list present: 1 = yes 0 = no.
UnSolCap
Unsolicited response support: 1 = yes 0
= no.
[6]
ProcWidget
R
0
Processing state support: 1 = yes 0 =
no.
[5]
[4]
[3]
Stripe
R
R
R
0
0
0
Striping support: 1 = yes 0 = no.
FormatOvrd
AmpParOvrd
Stream format override: 1 = yes 0 = no.
Amplifier capabilities override: 1 = yes
no.
[2]
[1]
[0]
OutAmpPrsnt
InAmpPrsnt
Stereo
R
R
R
0
0
1
Output amp present: 1 = yes 0 = no.
Input amp present: 1 = yes 0 = no.
Stereo stream support: 1 = yes (stereo)
0 = no (mono).
5.27.2. Dig0Pin PinCap
Verb ID
Payload
Response
F00
0C
See bitfield table.
Get
5.27.2.1. Dig0Pin PinCap
Bit
[31.:17]
[16]
Bitfield Name
RW
R
Reset
Description
Rsvd2
EapdCap
0000
0
Reserved.
R
EAPD support: 1 = yes 0 = no.
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Ten Channel HD Audio Codec
5.27.2.1. Dig0Pin PinCap
Bit
Bitfield Name
VrefCntrl
RW
Reset
00
Description
[15.:8]
R
Vref support: bit 7 = Reserved; bit 6 =
Reserved; bit 5 = 100% support (1 = yes
0 = no); bit 4 = 80% support (1 = yes 0
= no); bit 3 = Reserved; bit 2 = GND sup-
port (1 = yes 0 = no); bit 1 = 50% sup-
port (1 = yes 0 = no); bit 0 = Hi-Z
support (1 = yes 0 = no)
[7]
[6]
[5]
[4]
[3]
Rsvd1
R
R
R
R
R
0
0
0
1
0
Reserved.
BalancedIO
InCap
Balanced I/O support: 1 = yes 0 = no.
Input support: 1 = yes 0 = no.
Output support: 1 = yes 0 = no.
OutCap
HdphDrvCap
Headphone amp present:
1 = yes 0 = no.
[2]
[1]
[0]
PresDtctCap
TrigRqd
R
R
R
0
0
0
Presence detection support:
1 = yes 0 = no.
Trigger required for impedance sense:
1 = yes 0 = no.
ImpSenseCap
Impedance sense support:
1 = yes 0 = no.
5.27.3. Dig0Pin ConLst
Verb ID
Payload
Response
F00
0E
See bitfield table.
Get
5.27.3.1. Dig0Pin ConLst
Bit
[31.:8]
[7]
Bitfield Name
RW
R
Reset
Description
Rsvd
000000
0
Reserved.
LForm
R
Connection list format: 1 = long-form
(15-bit) NID entries 0 = short-form
(7-bit) NID entries.
[6.:0]
ConL
R
03
Number of NID entries in connection list.
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Ten Channel HD Audio Codec
5.27.4. Dig0Pin ConLstEntry0
Verb ID
Payload
Response
F02
00
See bitfield table.
Get
5.27.4.1. Dig0Pin ConLstEntry0
Bit
[31.:24]
[23.:16]
[15.:8]
[7.:0]
Bitfield Name
ConL3
RW
Reset
00
Description
Unused list entry.
R
ConL2
ConL1
ConL0
R
R
R
21
20
25
ADC1Mux Summing widget (0x21)
ADC0Mux Summing widget (0x20)
SPDIFOut0 Converter widget (0x25)
5.27.5. Dig0Pin ConSelectCtrl
Verb ID
Payload
Response
F01
00
See bitfield table.
Get
5.27.5.1. Dig0Pin ConSelectCtrl
Bit
[31.:2]
[1.:0]
Bitfield Name
Rsvd
Index
RW
Reset
00000000 Reserved.
0 Connection select control index.
Description
R
RW
5.27.6. Dig0Pin PinWCntrl
Verb ID
Payload
Response
F07
00
See bitfield table.
Get
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©2011 INTEGRATED DEVICE TECHNOLOGY, INC.
92HD73E
Ten Channel HD Audio Codec
5.27.6.1. Dig0Pin PinWCntrl
Bit
Bitfield Name
Rsvd2
RW
Reset
0000000
0
Description
[31.:7]
[6]
R
Reserved.
OutEn
RW
Output enable:
1 = enabled 0 = disabled.
[5.:0]
Rsvd1
R
00
Reserved.
5.27.7. Dig0Pin ConfigDefault
Verb ID
Payload
Response
See bitfield table.
F1C
00
Get
5.27.7.1. Dig0Pin ConfigDefault
Bit
Bitfield Name
RW
Reset
Description
[31.:30]
PortConnectivity
RW
0
Port connectivity: 0h = Port complex is
connected to a jack; 1h = No physical
connection for port; 2h = Fixed function
device is attached; 3h = Both jack and
internal device attached (info in all other
fields refers to integrated device any
presence detection refers to jack)
[29.:24]
[23.:20]
Location
Device
RW
RW
1
4
Location. Bits [5..4]: 0h = External on
primary chassis; 1h = Internal; 2h = Sep-
arate chassis; 3h = Other. Bits [3..0]: 0h
= N/A; 1h = Rear; 2h = Front; 3h = Left;
4h = Right; 5h = Top; 6h = Bottom;
7h-9h = Special; Ah-Fh = Reserved
Default device: 0h = Line out; 1h =
Speaker; 2h = HP out; 3h = CD; 4h =
SPDIF Out; 5h = Digital other out; 6h =
Modem line side; 7h = Modem handset
side; 8h = Line in; 9h = Aux; Ah = Mic in;
Bh = Telephony; Ch = SPDIF In; Dh =
Digital other in; Eh = Reserved; Fh =
Other
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Ten Channel HD Audio Codec
5.27.7.1. Dig0Pin ConfigDefault
Bit
Bitfield Name
RW
Reset
Description
[19.:16]
ConnectionType
RW
5
Connection type: 0h = Unknown; 1h =
1/8" stereo/mono; 2h = 1/4" stereo/mo-
no; 3h = ATAPI internal; 4h = RCA; 5h =
Optical; 6h = Other digital; 7h = Other
analog; 8h = Multichannel analog (DIN);
9h = XLR/Professional; Ah = RJ-11 (mo-
dem); Bh = Combination; Ch-Eh = Re-
served; Fh = Other
[15.:12]
[11.:8]
Color
Misc
RW
RW
1
0
Color: 0h = Unknown; 1h = Black; 2h =
Grey; 3h = Blue; 4h = Green; 5h = Red;
6h = Orange; 7h = Yellow; 8h = Purple;
9h = Pink; Ah-Dh = Reserved; Eh =
White; Fh = Other
Miscellaneous: Bits [3..1] = Reserved;
Bit 0 = Jack detect override
[7.:4]
[3.:0]
Association
Sequence
RW
RW
5
0
Default assocation.
Sequence.
5.28. Dig1Pin Node (NID = 23)
5.28.1. Dig1Pin WCap
Verb ID
Payload
Response
F00
09
See bitfield table.
Get
5.28.1.1. Dig1Pin WCap
Bit
Bitfield Name
RW
R
Reset
Description
[31.:24]
[23.:20]
Rsvd2
00
4
Reserved.
Type
R
Widget type: 0h = Out Converter; 1h = In
Converter; 2h = Summing (Mixer); 3h =
Selector (Mux); 4h = Pin Complex; 5h =
Power; 6h = Volume Knob; 7h = Beep
Generator; 8h-Eh = Reserved; Fh =
Vendor Defined
[19.:16]
Delay
R
0
Number of sample delays through wid-
get.
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Ten Channel HD Audio Codec
5.28.1.1. Dig1Pin WCap
Bit
[15.:12]
[11]
Bitfield Name
Rsvd1
RW
Reset
Description
R
0
0
0
1
Reserved.
SwapCap
PwrCntrl
Dig
R
R
R
Left/right swap support: 1 = yes 0 = no.
Power state support: 1 = yes 0 = no.
[10]
[9]
Digital stream support: 1 = yes (digital)
0 = no (analog).
[8]
[7]
ConnList
R
R
1
0
Connection list present: 1 = yes 0 = no.
UnSolCap
Unsolicited response support:
1 = yes 0 = no.
[6]
ProcWidget
R
0
Processing state support:
1 = yes 0 = no.
[5]
[4]
[3]
Stripe
R
R
R
0
0
0
Striping support: 1 = yes 0 = no.
FormatOvrd
AmpParOvrd
Stream format override: 1 = yes 0 = no.
Amplifier capabilities override:
1 = yes no.
[2]
[1]
[0]
OutAmpPrsnt
InAmpPrsnt
Stereo
R
R
R
0
0
1
Output amp present: 1 = yes 0 = no.
Input amp present: 1 = yes 0 = no.
Stereo stream support: 1 = yes (stereo)
0 = no (mono).
5.28.2. Dig1Pin PinCap
Verb ID
Payload
Response
F00
0C
See bitfield table.
Get
5.28.2.1. Dig1Pin PinCap
Bit
[31.:17]
[16]
Bitfield Name
RW
R
Reset
Description
Rsvd2
EapdCap
0000
0
Reserved.
R
EAPD support: 1 = yes 0 = no.
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Ten Channel HD Audio Codec
5.28.2.1. Dig1Pin PinCap
Bit
Bitfield Name
VrefCntrl
RW
Reset
00
Description
[15.:8]
R
Vref support: bit 7 = Reserved; bit 6 =
Reserved; bit 5 = 100% support (1 = yes
0 = no); bit 4 = 80% support (1 = yes 0
= no); bit 3 = Reserved; bit 2 = GND sup-
port (1 = yes 0 = no); bit 1 = 50% sup-
port (1 = yes 0 = no); bit 0 = Hi-Z
support (1 = yes 0 = no)
[7]
[6]
[5]
[4]
[3]
Rsvd1
R
R
R
R
R
0
0
0
1
0
Reserved.
BalancedIO
InCap
Balanced I/O support: 1 = yes 0 = no.
Input support: 1 = yes 0 = no.
Output support: 1 = yes 0 = no.
OutCap
HdphDrvCap
Headphone amp present:
1 = yes 0 = no.
[2]
[1]
[0]
PresDtctCap
TrigRqd
R
R
R
0
0
0
Presence detection support:
1 = yes 0 = no.
Trigger required for impedance sense:
1 = yes 0 = no.
ImpSenseCap
Impedance sense support:
1 = yes 0 = no.
5.28.3. Dig1Pin ConLst
Verb ID
Payload
Response
F00
0E
See bitfield table.
Get
5.28.3.1. Dig1Pin ConLst
Bit
[31.:8]
[7]
Bitfield Name
RW
R
Reset
Description
Rsvd
000000
0
Reserved.
LForm
R
Connection list format: 1 = long-form
(15-bit) NID entries 0 = short-form
(7-bit) NID entries.
[6.:0]
ConL
R
03
Number of NID entries in connection list.
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92HD73E
Ten Channel HD Audio Codec
5.28.4. Dig1Pin ConLstEntry0
Verb ID
Payload
Response
F02
00
See bitfield table.
Get
5.28.4.1. Dig1Pin ConLstEntry0
Bit
[31.:24]
[23.:16]
[15.:8]
[7.:0]
Bitfield Name
ConL3
RW
Reset
00
Description
Unused list entry.
R
ConL2
ConL1
ConL0
R
R
R
21
20
26
ADC1Mux Summing widget (0x21)
ADC0Mux Summing widget (0x20)
SPDIFOut1 Converter widget (0x26)
5.28.5. Dig1Pin ConSelectCtrl
Verb ID
Payload
Response
F01
00
See bitfield table.
Get
5.28.5.1. Dig1Pin ConSelectCtrl
Bit
[31.:2]
[1.:0]
Bitfield Name
Rsvd
Index
RW
Reset
00000000 Reserved.
0 Connection select control index.
Description
R
RW
5.28.6. Dig1Pin PinWCntrl
Verb ID
Payload
Response
F07
00
See bitfield table.
Get
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©2011 INTEGRATED DEVICE TECHNOLOGY, INC.
92HD73E
Ten Channel HD Audio Codec
5.28.6.1. Dig1Pin PinWCntrl
Bit
Bitfield Name
Rsvd2
RW
Reset
0000000
0
Description
[31.:7]
[6]
R
Reserved.
OutEn
RW
Output enable:
1 = enabled 0 = disabled.
[5.:0]
Rsvd1
R
00
Reserved.
5.28.7. Dig1Pin ConfigDefault
Verb ID
Payload
Response
See bitfield table.
F1C
00
Get
5.28.7.1. Dig1Pin ConfigDefault
Bit
Bitfield Name
RW
Reset
Description
[31.:30]
PortConnectivity
RW
2
Port connectivity: 0h = Port complex is
connected to a jack; 1h = No physical
connection for port; 2h = Fixed function
device is attached; 3h = Both jack and
internal device attached (info in all other
fields refers to integrated device any
presence detection refers to jack)
[29.:24]
[23.:20]
Location
Device
RW
RW
18
Location. Bits [5..4]: 0h = External on
primary chassis; 1h = Internal; 2h = Sep-
arate chassis; 3h = Other. Bits [3..0]: 0h
= N/A; 1h = Rear; 2h = Front; 3h = Left;
4h = Right; 5h = Top; 6h = Bottom;
7h-9h = Special; Ah-Fh = Reserved
5
Default device: 0h = Line out; 1h =
Speaker; 2h = HP out; 3h = CD; 4h =
SPDIF Out; 5h = Digital other out; 6h =
Modem line side; 7h = Modem handset
side; 8h = Line in; 9h = Aux; Ah = Mic in;
Bh = Telephony; Ch = SPDIF In; Dh =
Digital other in; Eh = Reserved; Fh =
Other
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92HD73E
Ten Channel HD Audio Codec
5.28.7.1. Dig1Pin ConfigDefault
Bit
Bitfield Name
RW
Reset
Description
[19.:16]
ConnectionType
RW
6
Connection type: 0h = Unknown; 1h =
1/8" stereo/mono; 2h = 1/4" stereo/mo-
no; 3h = ATAPI internal; 4h = RCA; 5h =
Optical; 6h = Other digital; 7h = Other
analog; 8h = Multichannel analog (DIN);
9h = XLR/Professional; Ah = RJ-11 (mo-
dem); Bh = Combination; Ch-Eh = Re-
served; Fh = Other
[15.:12]
[11.:8]
Color
Misc
RW
RW
0
0
Color: 0h = Unknown; 1h = Black; 2h =
Grey; 3h = Blue; 4h = Green; 5h = Red;
6h = Orange; 7h = Yellow; 8h = Purple;
9h = Pink; Ah-Dh = Reserved; Eh =
White; Fh = Other
Miscellaneous: Bits [3..1] = Reserved;
Bit 0 = Jack detect override
[7.:4]
[3.:0]
Association
Sequence
RW
RW
6
0
Default assocation.
Sequence.
5.29. Dig2Pin Node (NID = 24)
5.29.1. Dig2Pin WCap
Verb ID
Payload
Response
F00
09
See bitfield table.
Get
5.29.1.1. Dig2Pin WCap
Bit
Bitfield Name
RW
R
Reset
Description
[31.:24]
[23.:20]
Rsvd2
00
4
Reserved.
Type
R
Widget type: 0h = Out Converter; 1h = In
Converter; 2h = Summing (Mixer); 3h =
Selector (Mux); 4h = Pin Complex; 5h =
Power; 6h = Volume Knob; 7h = Beep
Generator; 8h-Eh = Reserved; Fh =
Vendor Defined
[19.:16]
Delay
R
0
Number of sample delays through wid-
get.
190
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92HD73E
Ten Channel HD Audio Codec
5.29.1.1. Dig2Pin WCap
Bit
[15.:12]
[11]
Bitfield Name
Rsvd1
RW
Reset
Description
R
0
0
0
1
Reserved.
SwapCap
PwrCntrl
Dig
R
R
R
Left/right swap support: 1 = yes 0 = no.
Power state support: 1 = yes 0 = no.
[10]
[9]
Digital stream support:
1 = yes (digital) 0 = no (analog).
[8]
[7]
ConnList
R
R
0
0
Connection list present: 1 = yes 0 = no.
UnSolCap
Unsolicited response support:
1 = yes 0 = no.
[6]
ProcWidget
R
0
Processing state support:
1 = yes 0 = no.
[5]
[4]
[3]
Stripe
R
R
R
0
0
0
Striping support: 1 = yes 0 = no.
FormatOvrd
AmpParOvrd
Stream format override: 1 = yes 0 = no.
Amplifier capabilities override:
1 = yes no.
[2]
[1]
[0]
OutAmpPrsnt
InAmpPrsnt
Stereo
R
R
R
0
0
1
Output amp present: 1 = yes 0 = no.
Input amp present: 1 = yes 0 = no.
Stereo stream support: 1 = yes (stereo)
0 = no (mono).
5.29.2. Dig2Pin PinCap
Verb ID
Payload
Response
F00
0C
See bitfield table.
Get
5.29.2.1. Dig2Pin PinCap
Bit
[31.:17]
[16]
Bitfield Name
RW
R
Reset
Description
Rsvd2
EapdCap
0000
0
Reserved.
R
EAPD support: 1 = yes 0 = no.
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Ten Channel HD Audio Codec
5.29.2.1. Dig2Pin PinCap
Bit
Bitfield Name
VrefCntrl
RW
Reset
00
Description
[15.:8]
R
Vref support: bit 7 = Reserved; bit 6 =
Reserved; bit 5 = 100% support (1 = yes
0 = no); bit 4 = 80% support (1 = yes 0
= no); bit 3 = Reserved; bit 2 = GND sup-
port (1 = yes 0 = no); bit 1 = 50% sup-
port (1 = yes 0 = no); bit 0 = Hi-Z
support (1 = yes 0 = no)
[7]
[6]
[5]
[4]
[3]
Rsvd1
R
R
R
R
R
0
0
1
0
0
Reserved.
BalancedIO
InCap
Balanced I/O support: 1 = yes 0 = no.
Input support: 1 = yes 0 = no.
Output support: 1 = yes 0 = no.
OutCap
HdphDrvCap
Headphone amp present:
1 = yes 0 = no.
[2]
[1]
[0]
PresDtctCap
TrigRqd
R
R
R
1
0
0
Presence detection support:
1 = yes 0 = no.
Trigger required for impedance sense:
1 = yes 0 = no.
ImpSenseCap
Impedance sense support:
1 = yes 0 = no.
5.29.3. Dig2Pin PinWCntrl
Verb ID
Payload
Response
F07
00
See bitfield table.
Get
5.29.3.1. Dig2Pin PinWCntrl
Bit
[31.:7]
[6]
Bitfield Name
Rsvd2
RW
R
Reset
Description
0000000
0
Reserved.
1nEn
RW
input enable:
1 = enabled 0 = disabled.
[5.:0]
Rsvd1
R
00
Reserved.
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Ten Channel HD Audio Codec
5.29.4. Dig2Pin UnsolResp
Verb ID
Payload
Response
F08
00
See bitfield table.
Get
5.29.4.1. Dig2Pin UnsolResp
Bit
[31.:8]
[7]
Bitfield Name
Rsvd2
RW
R
Reset
Description
000000
0
Reserved.
En
RW
Unsolicited response enable: 1 = en-
abled, 0 = disabled.
[6]
Rsvd1
Tag
R
0
Reserved.
[5.:0]
RW
00
Software programmable field returned
in top six bits (31:26) of every Unsolicit-
ed Response generated by this node.
5.29.5. Dig2Pin ChSense
Verb ID
Payload
Response
F09
00
See bitfield table.
Get
5.29.5.1. Dig2Pin ChSense
Bit
Bitfield Name
PresDtct
RW
Reset
Description
[31]
R
0
0
Presence detection indicator: 1 = pres-
ence detected; 0 = presence not detect-
ed.
[30.:0]
Rsvd
R
Reserved.
5.29.6. Dig2Pin PwrState
Verb ID
Payload
Response
F05
00
See bitfield table.
Get
193
V 1.3 08/11
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©2011 INTEGRATED DEVICE TECHNOLOGY, INC.
92HD73E
Ten Channel HD Audio Codec
5.29.6.1. Dig2Pin PwrState
Bit
Bitfield Name
Rsvd2
RW
Reset
Description
[31.:6]
[5.:4]
[3.:2]
[1.:0]
R
0000000
Reserved.
Act
R
3
0
3
Actual power state of this widget.
Reserved.
Rsvd1
Set
R
RW
Current power state setting for this wid-
get, used for EAPD control in this case:
0h-1h = Pin drives the value of the
EAPD control bit
2h-3h = Pin tri-stated
5.29.7. Dig2Pin EAPD
Verb ID
Payload
Response
F0C
00
See bitfield table.
Get
5.29.7.1. Dig2Pin EAPD
Bit
[31.:2]
[1]
Bitfield Name
RW
R
Reset
Description
Rsvd2
00000000 Reserved.
Control
RW
0
EAPD value reflected on the EAPD pin:
0 = Power down external amplifier; 1 =
Power up external amplifier
[0]
Rsvd1
R
0
Reserved.
5.29.8. Dig2Pin ConfigDefault
Verb ID
Payload
Response
F1C
00
See bitfield table.
Get
194
V 1.3 08/11
92HD73E
©2011 INTEGRATED DEVICE TECHNOLOGY, INC.
92HD73E
Ten Channel HD Audio Codec
5.29.8.1. Dig2Pin ConfigDefault
Bit
Bitfield Name
RW
Reset
Description
[31.:30]
PortConnectivity
RW
0
Port connectivity: 0h = Port complex is
connected to a jack; 1h = No physical
connection for port; 2h = Fixed function
device is attached; 3h = Both jack and
internal device attached (info in all other
fields refers to integrated device any
presence detection refers to jack)
[29.:24]
[23.:20]
Location
Device
RW
RW
01
Location. Bits [5..4]: 0h = External on
primary chassis; 1h = Internal; 2h = Sep-
arate chassis; 3h = Other. Bits [3..0]: 0h
= N/A; 1h = Rear; 2h = Front; 3h = Left;
4h = Right; 5h = Top; 6h = Bottom;
7h-9h = Special; Ah-Fh = Reserved
C
Default device: 0h = Line out; 1h =
Speaker; 2h = HP out; 3h = CD; 4h =
SPDIF Out; 5h = Digital other out; 6h =
Modem line side; 7h = Modem handset
side; 8h = Line in; 9h = Aux; Ah = Mic in;
Bh = Telephony; Ch = SPDIF In; Dh =
Digital other in; Eh = Reserved; Fh =
Other
[19.:16]
ConnectionType
RW
5
Connection type: 0h = Unknown; 1h =
1/8" stereo/mono; 2h = 1/4" stereo/mo-
no; 3h = ATAPI internal; 4h = RCA; 5h =
Optical; 6h = Other digital; 7h = Other
analog; 8h = Multichannel analog (DIN);
9h = XLR/Professional; Ah = RJ-11 (mo-
dem); Bh = Combination; Ch-Eh = Re-
served; Fh = Other
[15.:12]
[11.:8]
Color
Misc
RW
RW
2
0
Color: 0h = Unknown; 1h = Black; 2h =
Grey; 3h = Blue; 4h = Green; 5h = Red;
6h = Orange; 7h = Yellow; 8h = Purple;
9h = Pink; Ah-Dh = Reserved; Eh =
White; Fh = Other
Miscellaneous: Bits [3..1] = Reserved;
Bit 0 = Jack detect override
[7.:4]
[3.:0]
Association
Sequence
RW
RW
8
0
Default assocation.
Sequence.
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92HD73E
Ten Channel HD Audio Codec
5.30. SPDIFOut0 Node (NID = 25)
5.30.1. SPDIFOut0 WCap
Verb ID
Payload
Response
F00
09
See bitfield table.
Get
5.30.1.1. SPDIFOut0 WCap
Bit
Bitfield Name
Rsvd2
RW
R
Reset
00
Description
[31.:24]
[23.:20]
Reserved.
Type
R
0
Widget type: 0h = Out Converter; 1h = In
Converter; 2h = Summing (Mixer); 3h =
Selector (Mux); 4h = Pin Complex; 5h =
Power; 6h = Volume Knob; 7h = Beep
Generator; 8h-Eh = Reserved; Fh =
Vendor Defined
[19.:16]
Delay
R
4
Number of sample delays through wid-
get.
[15.:12]
[11]
Rsvd1
R
R
R
R
0
0
0
1
Reserved.
SwapCap
PwrCntrl
Dig
Left/right swap support: 1 = yes 0 = no.
Power state support: 1 = yes 0 = no.
[10]
[9]
Digital stream support: 1 = yes (digital)
0 = no (analog).
[8]
[7]
ConnList
R
R
0
0
Connection list present: 1 = yes 0 = no.
UnSolCap
Unsolicited response support:
1 = yes 0 = no.
[6]
ProcWidget
R
0
Processing state support:
1 = yes 0 = no.
[5]
[4]
[3]
Stripe
R
R
R
0
1
1
Striping support: 1 = yes 0 = no.
FormatOvrd
AmpParOvrd
Stream format override: 1 = yes 0 = no.
Amplifier capabilities override:
1 = yes no.
[2]
OutAmpPrsnt
R
1
Output amp present: 1 = yes 0 = no.
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5.30.1.1. SPDIFOut0 WCap
Bit
Bitfield Name
InAmpPrsnt
Stereo
RW
Reset
Description
[1]
[0]
R
0
1
Input amp present: 1 = yes 0 = no.
R
Stereo stream support: 1 = yes (stereo)
0 = no (mono).
5.30.2. SPDIFOut0 PCMCap
Verb ID
Payload
Response
F00
0A
See bitfield table.
Get
5.30.2.1. SPDIFOut0 PCMCap
Bit
[31.:21]
[20]
Bitfield Name
Rsvd2
RW
Reset
Description
R
000
0
Reserved.
B32
B24
B20
B16
B8
R
R
R
R
R
32 bit audio format support:
1 = yes, 0 = no.
[19]
[18]
[17]
[16]
1
1
1
0
24 bit audio format support:
1 = yes, 0 = no.
20 bit audio format support:
1 = yes, 0 = no.
16 bit audio format support:
1 = yes, 0 = no.
8 bit audio format support:
1 = yes, 0 = no.
[15.:12]
[11]
[10]
[9]
Rsvd1
R12
R11
R10
R9
R
R
R
R
R
R
R
R
0
0
1
1
1
1
1
1
Reserved.
384kHz rate support: 1 = yes, 0 = no.
192kHz rate support: 1 = yes, 0 = no.
176.4kHz rate support: 1 = yes, 0 = no.
96kHz rate support: 1 = yes, 0 = no.
88.2kHz rate support: 1 = yes, 0 = no.
48kHz rate support: 1 = yes, 0 = no.
44.1kHz rate support: 1 = yes, 0 = no.
[8]
[7]
R8
[6]
R7
[5]
R6
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5.30.2.1. SPDIFOut0 PCMCap
Bit
Bitfield Name
RW
Reset
Description
[4]
[3]
[2]
[1]
[0]
R5
R4
R3
R2
R1
R
0
0
0
0
0
32kHz rate support: 1 = yes, 0 = no.
22.05kHz rate support: 1 = yes, 0 = no.
16kHz rate support: 1 = yes, 0 = no.
11.025kHz rate support: 1 = yes, 0 = no.
8kHz rate support: 1 = yes, 0 = no.
R
R
R
R
5.30.3. SPDIFOut0 StreamCap
Verb ID
Payload
Response
F00
0B
See bitfield table.
Get
5.30.3.1. SPDIFOut0 StreamCap
Bit
[31.:3]
[2]
Bitfield Name
Rsvd
RW
Reset
00000000 Reserved.
Description
R
AC3
R
R
R
1
0
1
AC-3 formatted data support:
1 = yes, 0 = no.
[1]
[0]
Float32
PCM
Float32 formatted data support:
1 = yes, 0 = no.
PCM-formatted data support:
1 = yes, 0 = no.
5.30.4. SPDIFOut0 Cnvtr
Verb ID
Payload
Response
A00
00
See bitfield table.
Get
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Ten Channel HD Audio Codec
5.30.4.1. SPDIFOut0 Cnvtr
Bit
Bitfield Name
Rsvd2
RW
Reset
0000
Description
[31.:16]
[15]
R
Reserved.
FrmtNonPCM
FrmtSmplRate
RW
RW
0
0
Stream type: 1 = Non-PCM, 0 = PCM.
[14]
Sample base rate:
1 = 44.1kHz, 0 = 48kHz.
[13.:11]
SmplRateMultp
SmplRateDiv
RW
RW
0
0
Sample base rate multiple: 000b= x1
(48kHz/44.1kHz or less); 001b= x2
(96kHz/88.2kHz/32kHz); 010b= x3
(144kHz); 011b= x4
(192kHz/176.4kHz); 100b-111b Re-
served
[10.:8]
Sample base rate divider: 000b= Divide
by 1 (48kHz/44.1kHz); 001b= Divide by
2 (24kHz/20.05kHz); 010b= Divide by 3
(16kHz/32kHz); 011b= Divide by 4
(11.025kHz); 100b= Divide by 5
(9.6kHz); 101b= Divide by 6 (8kHz);
110b= Divide by 7; 111b= Divide by 8
(6kHz)
[7]
Rsvd1
R
0
3
Reserved.
[6.:4]
BitsPerSmpl
RW
Bits per sample: 000b= 8 bits; 001b= 16
bits; 010b= 20 bits; 011b= 24 bits;
100b= 32 bits; 101b-111b= Reserved
[3.:0]
NmbrChan
RW
1
Total number of channels in the stream
assigned to this converter:
0000b-1111b= 1-16 channels.
5.30.5. SPDIFOut0 CnvtrID
Verb ID
Payload
Response
F06
00
See bitfield table.
Get
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Ten Channel HD Audio Codec
5.30.5.1. SPDIFOut0 CnvtrID
Bit
Bitfield Name
Rsvd
RW
Reset
000000
0
Description
[31.:8]
[7.:4]
R
Reserved.
Strm
RW
Stream ID: 0h = Converter "off", 1h-Fh =
valid IDs.
[3.:0]
Ch
RW
0
Channel assignment ("Ch" and "Ch+1"
assigned as a pair, for a stereo convert-
er).
5.30.6. SPDIFOut0 DigCnvtr
Verb ID
Payload
Response
F0D
00
See bitfield table.
Get
5.30.6.1. SPDIFOut0 DigCnvtr
Bit
[31.:16]
[15]
[14.:8]
[7]
Bitfield Name
Rsvd2
RW
R
Reset
0000
Description
Reserved.
Reserved.
Rsvd1
CC
R
0
RW
RW
RW
RW
RW
RW
RW
RW
RW
00
0
CC: Category Code.
L: Generation Level.
PRO: Professional.
/AUDIO: Non-Audio.
COPY: Copyright.
PRE: Preemphasis.
VCFG: Validity Config.
V: Validity.
L
[6]
PRO
AUDIO
COPY
PRE
VCFG
V
0
[5]
0
[4]
0
[3]
0
[2]
0
[1]
0
[0]
DigEn
0
Digital enable: 1 = converter enabled,
0 = converter disable.
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Ten Channel HD Audio Codec
5.30.7. SPDIFOut0 OutAmpCap
Verb ID
Payload
Response
F00
12
See bitfield table.
Get
5.30.7.1. SPDIFOut0 OutAmpCap
Bit
Bitfield Name
Mute
RW
Reset
Description
[31]
R
1
Mute support: 1 = yes, 0 = no.
Reserved.
[30.:23]
[22.:16]
Rsvd3
R
R
00
17
StepSize
Size of each step in the gain range: 0 to
127 = .25dB to 32dB, in .25dB steps.
[15]
Rsvd2
R
R
0
Reserved.
[14.:8]
NumSteps
00
Number of gains steps (number of pos-
sible settings - 1).
[7]
Rsvd1
Offset
R
R
0
Reserved.
[6.:0]
03
Indicates which step is 0dB
5.30.8. SPDIFOut0 OutAmpLeft
Verb ID
Payload
Response
BA0
00
See bitfield table.
Get
5.30.8.1. SPDIFOut0 OutAmpLeft
Bit
[31.:8]
[7]
Bitfield Name
Rsvd2
RW
Reset
Description
R
000000
Reserved.
Mute
RW
R
0
Amp mute: 1 = muted, 0 = not muted.
Reserved.
[6.:0]
Rsvd1
00
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Ten Channel HD Audio Codec
5.30.9. SPDIFOut0 OutAmpRight
Verb ID
Payload
Response
B80
00
See bitfield table.
Get
5.30.9.1. SPDIFOut0 OutAmpRight
Bit
[31.:8]
[7]
Bitfield Name
Rsvd2
RW
Reset
Description
R
000000
Reserved.
Mute
RW
R
0
Amp mute: 1 = muted, 0 = not muted.
Reserved.
[6.:0]
Rsvd1
00
5.31. SPDIFOut1 Node (NID = 26)
5.31.1. SPDIFOut1 WCap
Verb ID
Payload
Response
F00
09
See bitfield table.
Get
5.31.1.1. SPDIFOut1 WCap
Bit
Bitfield Name
Rsvd2
RW
R
Reset
00
Description
[31.:24]
[23.:20]
Reserved.
Type
R
0
Widget type: 0h = Out Converter; 1h = In
Converter; 2h = Summing (Mixer); 3h =
Selector (Mux); 4h = Pin Complex; 5h =
Power; 6h = Volume Knob; 7h = Beep
Generator; 8h-Eh = Reserved; Fh =
Vendor Defined
[19.:16]
Delay
R
4
Number of sample delays through wid-
get.
[15.:12]
[11]
Rsvd1
R
R
R
0
0
0
Reserved.
SwapCap
PwrCntrl
Left/right swap support: 1 = yes, 0 = no.
Power state support: 1 = yes, 0 = no.
[10]
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5.31.1.1. SPDIFOut1 WCap
Bit
Bitfield Name
Dig
RW
Reset
Description
[9]
R
1
Digital stream support: 1 = yes (digital),
0 = no (analog).
[8]
[7]
ConnList
R
R
0
0
Connection list present: 1 = yes, 0 = no.
UnSolCap
Unsolicited response support: 1 = yes, 0
= no.
[6]
ProcWidget
R
0
Processing state support: 1 = yes, 0 =
no.
[5]
[4]
[3]
Stripe
R
R
R
0
1
1
Striping support: 1 = yes, 0 = no.
FormatOvrd
AmpParOvrd
Stream format override: 1 = yes, 0 = no.
Amplifier capabilities override: 1 = yes,
no.
[2]
[1]
[0]
OutAmpPrsnt
InAmpPrsnt
Stereo
R
R
R
1
0
1
Output amp present: 1 = yes, 0 = no.
Input amp present: 1 = yes, 0 = no.
Stereo stream support: 1 = yes (stereo),
0 = no (mono).
5.31.2. SPDIFOut1 PCMCap
Verb ID
Payload
Response
F00
0A
See bitfield table.
Get
5.31.2.1. SPDIFOut1 PCMCap
Bit
[31.:21]
[20]
Bitfield Name
Rsvd2
RW
Reset
Description
R
000
0
Reserved.
B32
B24
B20
R
R
R
32 bit audio format support:
1 = yes, 0 = no.
[19]
[18]
1
1
24 bit audio format support:
1 = yes, 0 = no.
20 bit audio format support:
1 = yes, 0 = no.
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5.31.2.1. SPDIFOut1 PCMCap
Bit
Bitfield Name
B16
RW
Reset
Description
[17]
[16]
R
1
0
16 bit audio format support:
1 = yes, 0 = no.
B8
R
8 bit audio format support:
1 = yes, 0 = no.
[15.:12]
[11]
[10]
[9]
Rsvd1
R12
R11
R10
R9
R
R
R
R
R
R
R
R
R
R
R
R
R
0
0
1
1
1
1
1
1
0
0
0
0
0
Reserved.
384kHz rate support: 1 = yes, 0 = no.
192kHz rate support: 1 = yes, 0 = no.
176.4kHz rate support: 1 = yes, 0 = no.
96kHz rate support: 1 = yes, 0 = no.
88.2kHz rate support: 1 = yes, 0 = no.
48kHz rate support: 1 = yes, 0 = no.
44.1kHz rate support: 1 = yes, 0 = no.
32kHz rate support: 1 = yes, 0 = no.
22.05kHz rate support: 1 = yes, 0 = no.
16kHz rate support: 1 = yes, 0 = no.
11.025kHz rate support: 1 = yes, 0 = no.
8kHz rate support: 1 = yes, 0 = no.
[8]
[7]
R8
[6]
R7
[5]
R6
[4]
R5
[3]
R4
[2]
R3
[1]
R2
[0]
R1
5.31.3. SPDIFOut1 StreamCap
Verb ID
Payload
Response
F00
0B
See bitfield table.
Get
5.31.3.1. SPDIFOut1 StreamCap
Bit
[31.:3]
[2]
Bitfield Name
Rsvd
AC3
RW
Reset
00000000 Reserved.
Description
R
R
1
AC-3 formatted data support:
1 = yes, 0 = no.
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Ten Channel HD Audio Codec
5.31.3.1. SPDIFOut1 StreamCap
Bit
Bitfield Name
Float32
RW
Reset
Description
[1]
[0]
R
0
1
Float32 formatted data support:
1 = yes, 0 = no.
PCM
R
PCM-formatted data support:
1 = yes, 0 = no.
5.31.4. SPDIFOut1 Cnvtr
Verb ID
Payload
Response
A00
00
See bitfield table.
Get
5.31.4.1. SPDIFOut1 Cnvtr
Bit
[31.:16]
[15]
Bitfield Name
Rsvd2
RW
R
Reset
Description
0000
Reserved.
FrmtNonPCM
FrmtSmplRate
RW
RW
0
0
Stream type: 1 = Non-PCM, 0 = PCM.
[14]
Sample base rate: 1 = 44.1kHz, 0 =
48kHz.
[13.:11]
SmplRateMultp
SmplRateDiv
RW
RW
0
0
Sample base rate multiple: 000b= x1
(48kHz/44.1kHz or less); 001b= x2
(96kHz/88.2kHz/32kHz); 010b= x3
(144kHz); 011b= x4
(192kHz/176.4kHz); 100b-111b Re-
served
[10.:8]
Sample base rate divider: 000b= Divide
by 1 (48kHz/44.1kHz); 001b= Divide by
2 (24kHz/20.05kHz); 010b= Divide by 3
(16kHz/32kHz); 011b= Divide by 4
(11.025kHz); 100b= Divide by 5
(9.6kHz); 101b= Divide by 6 (8kHz);
110b= Divide by 7; 111b= Divide by 8
(6kHz)
[7]
Rsvd1
R
0
Reserved.
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5.31.4.1. SPDIFOut1 Cnvtr
Bit
Bitfield Name
RW
Reset
Description
[6.:4]
[3.:0]
BitsPerSmpl
RW
3
1
Bits per sample: 000b= 8 bits; 001b= 16
bits; 010b= 20 bits; 011b= 24 bits;
100b= 32 bits; 101b-111b= Reserved
NmbrChan
RW
Total number of channels in the stream
assigned to this converter:
0000b-1111b= 1-16 channels.
5.31.5. SPDIFOut1 CnvtrID
Verb ID
Payload
Response
F06
00
See bitfield table.
Get
5.31.5.1. SPDIFOut1 CnvtrID
Bit
[31.:8]
[7.:4]
Bitfield Name
Rsvd
RW
R
Reset
Description
000000
0
Reserved.
Strm
RW
Stream ID: 0h = Converter "off", 1h-Fh =
valid IDs.
[3.:0]
Ch
RW
0
Channel assignment ("Ch" and "Ch+1"
assigned as a pair, for a stereo convert-
er).
5.31.6. SPDIFOut1 DigCnvtr
Verb ID
Payload
Response
F0D
00
See bitfield table.
Get
5.31.6.1. SPDIFOut1 DigCnvtr
Bit
[31.:16]
[15]
Bitfield Name
Rsvd2
Rsvd1
RW
R
Reset
0000
Description
Reserved.
Reserved.
R
0
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Ten Channel HD Audio Codec
5.31.6.1. SPDIFOut1 DigCnvtr
Bit
Bitfield Name
CC
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Reset
00
Description
CC: Category Code.
[14.:8]
[7]
L
0
0
0
0
0
0
0
0
L: Generation Level.
PRO: Professional.
/AUDIO: Non-Audio.
COPY: Copyright.
PRE: Preemphasis.
VCFG: Validity Config.
V: Validity.
[6]
PRO
AUDIO
COPY
PRE
VCFG
V
[5]
[4]
[3]
[2]
[1]
[0]
DigEn
Digital enable: 1 = converter enabled, 0
= converter disable.
5.31.7. SPDIFOut1 OutAmpCap
Verb ID
Payload
Response
F00
12
See bitfield table.
Get
5.31.7.1. SPDIFOut1 OutAmpCap
Bit
Bitfield Name
Mute
RW
Reset
Description
[31]
R
1
Mute support: 1 = yes, 0 = no.
Reserved.
[30.:23]
[22.:16]
Rsvd3
R
R
00
00
StepSize
Size of each step in the gain range: 0 to
127 = .25dB to 32dB, in .25dB steps.
[15]
Rsvd2
R
R
0
Reserved.
[14.:8]
NumSteps
00
Number of gains steps (number of pos-
sible settings - 1).
[7]
Rsvd1
Offset
R
R
0
Reserved.
[6.:0]
00
Indicates which step is 0dB
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Ten Channel HD Audio Codec
5.31.8. SPDIFOut1 OutAmpLeft
Verb ID
Payload
Response
BA0
00
See bitfield table.
Get
5.31.8.1. SPDIFOut1 OutAmpLeft
Bit
[31.:8]
[7]
Bitfield Name
Rsvd2
RW
Reset
Description
R
000000
Reserved.
Mute
RW
R
0
Amp mute: 1 = muted, 0 = not muted.
Reserved.
[6.:0]
Rsvd1
00
5.31.9. SPDIFOut1 OutAmpRight
Verb ID
Payload
Response
B80
00
See bitfield table.
Get
5.31.9.1. SPDIFOut1 OutAmpRight
Bit
[31.:8]
[7]
Bitfield Name
Rsvd2
RW
Reset
000000
0
Description
R
Reserved.
Mute
RW
R
Amp mute: 1 = muted, 0 = not muted.
Reserved.
[6.:0]
Rsvd1
00
5.32. SPDIFIn Node (NID = 27)
5.32.1. SPDIFOut1 WCap
Verb ID
Payload
Response
F00
09
See bitfield table.
Get
208
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Ten Channel HD Audio Codec
5.32.1.1. SPDIFInWCap
Bit
Bitfield Name
Rsvd2
RW
Reset
00
Description
[31.:24]
[23.:20]
R
Reserved.
Type
R
1
Widget type: 0h = Out Converter; 1h = In
Converter; 2h = Summing (Mixer); 3h =
Selector (Mux); 4h = Pin Complex; 5h =
Power; 6h = Volume Knob; 7h = Beep
Generator; 8h-Eh = Reserved; Fh =
Vendor Defined
[19.:16]
Delay
R
4
Number of sample delays through wid-
get.
[15.:12]
[11]
Rsvd1
R
R
R
R
0
0
0
1
Reserved.
SwapCap
PwrCntrl
Dig
Left/right swap support: 1 = yes, 0 = no.
Power state support: 1 = yes, 0 = no.
[10]
[9]
Digital stream support: 1 = yes (digital),
0 = no (analog).
[8]
[7]
ConnList
R
R
1
0
Connection list present: 1 = yes, 0 = no.
UnSolCap
Unsolicited response support: 1 = yes, 0
= no.
[6]
ProcWidget
R
0
Processing state support: 1 = yes, 0 =
no.
[5]
[4]
[3]
Stripe
R
R
R
0
1
1
Striping support: 1 = yes, 0 = no.
FormatOvrd
AmpParOvrd
Stream format override: 1 = yes, 0 = no.
Amplifier capabilities override: 1 = yes,
no.
[2]
[1]
[0]
OutAmpPrsnt
InAmpPrsnt
Stereo
R
R
R
0
1
1
Output amp present: 1 = yes, 0 = no.
Input amp present: 1 = yes, 0 = no.
Stereo stream support: 1 = yes (stereo),
0 = no (mono).
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5.32.2. SPDIFInCnvtr
Verb ID
Payload
Response
A00
00
See bitfield table.
Get
5.32.2.1. SPFIDIn Cnvtr
Bit
[31.:16]
[15]
Bitfield Name
RW
R
Reset
0000
Description
Rsvd2
Reserved.
FrmtNonPCM
FrmtSmplRate
R
0
0
Stream type: 1 = Non-PCM 0 = PCM.
[14]
RW
Sample base rate: 1 = 44.1kHz
0 = 48kHz.
[13.:11]
SmplRateMultp
SmplRateDiv
RW
RW
0
0
Sample base rate multiple: 000b= x1
(48kHz/44.1kHz or less); 001b= x2
(96kHz/88.2kHz/32kHz); 010b= x3
(144kHz); 011b= x4
(192kHz/176.4kHz); 100b-111b Re-
served
[10.:8]
Sample base rate divider: 000b= Divide
by 1 (48kHz/44.1kHz); 001b= Divide by
2 (24kHz/20.05kHz); 010b= Divide by 3
(16kHz/32kHz); 011b= Divide by 4
(11.025kHz); 100b= Divide by 5
(9.6kHz); 101b= Divide by 6 (8kHz);
110b= Divide by 7; 111b= Divide by 8
(6kHz)
[7]
Rsvd1
R
0
3
Reserved.
[6.:4]
BitsPerSmpl
RW
Bits per sample: 000b= 8 bits; 001b= 16
bits; 010b= 20 bits; 011b= 24 bits;
100b= 32 bits; 101b-111b= Reserved
[3.:0]
NmbrChan
RW
1
Total number of channels in the stream
assigned to this converter:
0000b-1111b= 1-16 channels.
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5.32.3. SPDIFIn PCMCap
Verb ID
Payload
Response
F00
0A
See bitfield table.
Get
5.32.3.1. SPDIFIn PCMCap
Bit
[31.:21]
[20]
Bitfield Name
Rsvd2
RW
R
Reset
000
Description
Reserved.
B32
B24
B20
B16
B8
R
0
1
1
1
0
32 bit audio format support:
1 = yes, 0 = no.
[19]
[18]
[17]
[16]
R
R
R
R
24 bit audio format support:
1 = yes, 0 = no.
20 bit audio format support:
1 = yes, 0 = no.
16 bit audio format support:
1 = yes, 0 = no.
8 bit audio format support:
1 = yes, 0 = no.
[15.:12]
[11]
[10]
[9]
Rsvd1
R12
R11
R10
R9
R
R
R
R
R
R
R
R
R
R
R
R
R
0
0
0
0
1
0
1
1
0
0
0
0
0
Reserved.
384kHz rate support: 1 = yes, 0 = no.
192kHz rate support: 1 = yes, 0 = no.
176.4kHz rate support: 1 = yes, 0 = no.
96kHz rate support: 1 = yes, 0 = no.
88.2kHz rate support: 1 = yes, 0 = no.
48kHz rate support: 1 = yes, 0 = no.
44.1kHz rate support: 1 = yes, 0 = no.
32kHz rate support: 1 = yes, 0 = no.
22.05kHz rate support: 1 = yes, 0 = no.
16kHz rate support: 1 = yes, 0 = no.
11.025kHz rate support: 1 = yes, 0 = no.
8kHz rate support: 1 = yes, 0 = no.
[8]
[7]
R8
[6]
R7
[5]
R6
[4]
R5
[3]
R4
[2]
R3
[1]
R2
[0]
R1
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Ten Channel HD Audio Codec
5.32.4. SPDIFIn StreamCap
Verb ID
Payload
Response
F00
0B
See bitfield table.
Get
5.32.4.1. SPDIFIn StreamCap
Bit
[31.:3]
[2]
Bitfield Name
Rsvd
RW
R
Reset
00000000 Reserved.
Description
AC3
R
1
0
1
AC-3 formatted data support:
1 = yes, 0 = no.
[1]
[0]
Float32
PCM
R
R
Float32 formatted data support:
1 = yes, 0 = no.
PCM-formatted data support:
1 = yes, 0 = no.
5.32.5. SPDIFIn ConLst
Verb ID
Payload
Response
F00
0E
See bitfield table.
Get
5.32.5.1. SPDIFIn ConLst
Bit
[31.:8]
[7]
Bitfield Name
RW
R
Reset
Description
Rsvd
000000
0
Reserved.
LForm
R
Connection list format: 1 = long-form
(15-bit) NID entries 0 = short-form
(7-bit) NID entries.
[6.:0]
ConL
R
01
Number of NID entries in connection list.
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5.32.6. SPDIFIn ConLstEntry0
Verb ID
Payload
Response
F02
00
See bitfield table.
Get
5.32.6.1. ADC0 ConLstEntry0
Bit
[31.:24]
[23.:16]
[15.:8]
[7.:0]
Bitfield Name
ConL3
RW
R
Reset
00
Description
Unused list entry.
Unused list entry.
Unused list entry.
ConL2
ConL1
ConL0
R
00
00
24
R
R
Dig2Pin pin widget (0x24).
5.32.7. SPDIFIn CnvtrID
Verb ID
Payload
Response
See bitfield table.
F06
00
Get
5.32.7.1. SPDIFIn CnvtrID
Bit
[31.:8]
[7.:4]
Bitfield Name
RW
R
Reset
Description
Rsvd
000000
0
Reserved.
Strm
RW
Stream ID: 0h = Converter "off" 1h-Fh =
valid IDs.
[3.:0]
Ch
RW
0
Channel assignment ("Ch" and "Ch+1"
assigned as a pair for a stereo convert-
er).
5.32.8. SPDIFIn DigCnvtr
Verb ID
Payload
Response
F0D
00
See bitfield table.
Get
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Ten Channel HD Audio Codec
5.32.8.1. SPDIFIn DigCnvtr
Bit
Bitfield Name
Rsvd2
RW
Reset
0000
Description
[31.:16]
[15]
[14.:8]
[7]
R
Reserved.
Reserved.
Rsvd1
CC
R
0
RW
RW
RW
RW
RW
RW
RW
RW
RW
00
0
CC: Category Code.
L: Generation Level.
PRO: Professional.
/AUDIO: Non-Audio.
COPY: Copyright.
PRE: Preemphasis.
VCFG: Validity Config.
V: Validity.
L
[6]
PRO
AUDIO
COPY
PRE
VCFG
V
0
[5]
0
[4]
0
[3]
0
[2]
0
[1]
0
[0]
DigEn
0
Digital enable: 1 = converter enabled, 0
= converter disable.
5.32.9. SPDIFIn OutAmpCap
Verb ID
Payload
Response
F00
12
See bitfield table.
Get
5.32.9.1. SPDIFIn OutAmpCap
Bit
Bitfield Name
Mute
RW
Reset
Description
[31]
R
1
Mute support: 1 = yes, 0 = no.
Reserved.
[30.:23]
[22.:16]
Rsvd3
R
R
00
00
StepSize
Size of each step in the gain range: 0 to
127 = .25dB to 32dB, in .25dB steps.
[15]
Rsvd2
R
R
0
Reserved.
[14.:8]
NumSteps
00
Number of gains steps (number of pos-
sible settings - 1).
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Ten Channel HD Audio Codec
5.32.9.1. SPDIFIn OutAmpCap
Bit
Bitfield Name
Rsvd1
Offset
RW
Reset
Description
[7]
R
0
Reserved.
Indicates which step is 0dB
[6.:0]
R
00
5.32.10. SPDIFIn InAmpLeft
Verb ID
Payload
Response
See bitfield table.
B20
00
Get
5.32.10.1. SPDIFOut1 OutAmpLeft
Bit
[31.:8]
[7]
Bitfield Name
Rsvd2
RW
Reset
Description
R
000000
Reserved.
Mute
RW
R
0
Amp mute: 1 = muted, 0 = not muted.
Reserved.
[6.:0]
Rsvd1
00
5.32.11. SPDIFIn InAmpRight
Verb ID
Payload
Response
B00
00
See bitfield table.
Get
5.32.11.1. SPDIFOut1 OutAmpRight
Bit
[31.:8]
[7]
Bitfield Name
Rsvd2
RW
Reset
000000
0
Description
R
Reserved.
Mute
RW
R
Amp mute: 1 = muted, 0 = not muted.
Reserved.
[6.:0]
Rsvd1
00
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Ten Channel HD Audio Codec
5.32.12. SPDIFIn VS
Verb ID
Payload
Response
FE0
00
See bitfield table.
Get
5.32.12.1. SPDIFIn VS
Bit
[31.:2]
[1]
Bitfield Name
RW
R
Reset
Description
Rsvd
0000000
0
Reserved.
RoundDis
RW
SPDIF Input rounding disable:
0 = rounding is enabled,
1 = rounding is disabled
[0]
LoLvlSel
RW
0
SPDIF Input level select:
0 = standard level,
1 = low level (input buffer enabled).
5.32.13. SPDIFIn Status
Verb ID
Payload
Response
FE0
80
See bitfield table.
Get
5.32.13.1. SPDIFIn Status
Bit
Bitfield Name
RW
Reset
Description
[31.:29]
RcvSmplRate
R
7
Received Sample Rate:
000b = 44.1kHz
001b = 48kHz
010b = 88.2kHz
011b = 96kHz
100b = 176.4kHz
101b = 192kHz
11Xb = Invalid Rate
[28.:26]
Rsvd2
R
0
Reserved
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Ten Channel HD Audio Codec
5.32.13.1. SPDIFIn Status
Bit
Bitfield Name
OrigFS
RW
Reset
Description
[25.:22]
R
0
Original Sample Rate (per IEC60958-3
spec):
0000b = Original sampling frequency
not indicated
0001b = 192kHz
0010b = 12kHz
0011b = 176.4kHz
0100b = Reserved
0101b = 96kHz
0110b = 8kHz
0111b = 88.2kHz
1000b = 16kHz
1001b = 24kHz
1010b = 11.025kHz
1011b = 22.05kHz
1100b = 32kHz
1101b = 48khz
1110b = Reserved
1111b = 44.1kHz
[21.:20]
[19.:16]
CA
FS
R
R
0
0
Clock Accuracy (per IEC60958-3 spec):
00b = Level II
01b = Level I
10b = Level III
11b = Reserved
Sample Rate (per IEC60958-3 spec):
0000b = 44.1kHz
0001b = Original sampling frequency
not indicated
0010b = 48kHz
0011b = 32kHz
0100b = 22.05kHz
0101b = Reserved
0110b = 24kHz
0111b = Reserved
1000b = 88.2kHz
1001b = Reserved
1010b = 96kHz
1011b = Reserved
1100b = 176.4kHz
1101b = Reserved
1110b = 192kHz
1111b = Reserved
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Ten Channel HD Audio Codec
5.32.13.1. SPDIFIn Status
Bit
[15.:12]
Bitfield Name
CN
RW
Reset
Description
R
0
Channel Number (per IEC60958-3
spec):
0000b = Do not take into account
0001b = Channel 1 (Left channel for ste-
reo channel format)
0010b = Channel 2 (Right channel for
stereo channel format)
0011b-1111b = Channel 3-15
[11.:9]
SmplWrdL
R
0
Sample Word Length (per IEC60958-3
spec):
000b = Word length not indicated
001b = Max length - 4
010b = Max length - 2
011b = Reserved
100b = Max length - 1
101b = Max length - 0
110b = Max length - 3
111b = Reserved
[8]
MaxWrdL
R
0
Max Word Length (per IEC60958-3
spec): 0 = 20 bits, 1 = 24 bits.
[7]
NoBlkChk
Rsvd
RW
R
0
0
0
Disable Sample Block Checking
Reserved
[6.:5}
[4.:3]
ParityLimit
RW
SPDIFIn Parity Limit:
00b = 4 Parity errors
01b = 3 Parity errors
10b = 2 Parity errors
11b = 1 Parity error
[2]
[1]
SPRun
SiPerr
R
0
0
SPDIFIn Running 0 = no signal on SP-
DIFIn Pin, 1 = Signal on SPDIFIn pin.
RW
SPDIFIn Parity Error: 0 = No error de-
tected, 1 = Error detected (write 0 to
clear).
[0]
CopyInv
RW
0
Copyright Invert: 0 = Do not invert
COPY bit, 1 = Invert COPY bit.
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Ten Channel HD Audio Codec
5.33. InPort0Mux Node (NID = 28)
5.33.1. InPort0Mux WCap
Verb ID
Payload
Response
F00
09
See bitfield table.
Get
5.33.1.1. InPort0Mux WCap
Bit
Bitfield Name
Rsvd2
RW
R
Reset
00
Description
[31.:24]
[23.:20]
Reserved.
Type
R
3
Widget type: 0h = Out Converter; 1h = In
Converter; 2h = Summing (Mixer); 3h =
Selector (Mux); 4h = Pin Complex; 5h =
Power; 6h = Volume Knob; 7h = Beep
Generator; 8h-Eh = Reserved; Fh =
Vendor Defined
[19.:16]
Delay
R
0
Number of sample delays through wid-
get.
[15.:12]
[11]
Rsvd1
R
R
R
R
0
0
0
0
Reserved.
SwapCap
PwrCntrl
Dig
Left/right swap support: 1 = yes 0 = no.
Power state support: 1 = yes 0 = no.
[10]
[9]
Digital stream support: 1 = yes (digital)
0 = no (analog).
[8]
[7]
ConnList
R
R
1
0
Connection list present: 1 = yes 0 = no.
UnSolCap
Unsolicited response support:
1 = yes 0 = no.
[6]
ProcWidget
R
0
Processing state support:
1 = yes 0 = no.
[5]
[4]
[3]
Stripe
R
R
R
0
0
0
Striping support: 1 = yes 0 = no.
FormatOvrd
AmpParOvrd
Stream format override: 1 = yes 0 = no.
Amplifier capabilities override:
1 = yes no.
[2]
OutAmpPrsnt
R
0
Output amp present: 1 = yes 0 = no.
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Ten Channel HD Audio Codec
5.33.1.1. InPort0Mux WCap
Bit
Bitfield Name
InAmpPrsnt
Stereo
RW
Reset
Description
[1]
[0]
R
0
1
Input amp present: 1 = yes 0 = no.
R
Stereo stream support: 1 = yes (stereo)
0 = no (mono).
5.33.2. InPort0Mux ConLst
Verb ID
Payload
Response
F00
0E
See bitfield table.
Get
5.33.2.1. InPort0Mux ConLst
Bit
[31.:8]
[7]
Bitfield Name
Rsvd
RW
R
Reset
Description
000000
0
Reserved.
LForm
R
Connection list format: 1 = long-form
(15-bit) NID entries 0 = short-form
(7-bit) NID entries.
[6.:0]
ConL
R
04
Number of NID entries in connection list.
5.33.3. InPort0Mux ConLstEntry0
Verb ID
Payload
Response
F02
00
See bitfield table.
Get
5.33.3.1. InPort0Mux ConLstEntry0
Bit
[31.:24]
[23.:16]
[15.:8]
[7.:0]
Bitfield Name
ConL3
RW
Reset
0F
Description
R
Port F Pin widget (0x0F).
Port D Pin widget (0x0D)
Port B Pin widget (0x0B)
Port A Pin widget (0x0A)
ConL2
ConL1
ConL0
R
R
R
0D
0B
0A
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Ten Channel HD Audio Codec
5.33.4. InPort0Mux ConSelectCtrl
Verb ID
Payload
Response
F01
00
See bitfield table.
Get
5.33.4.1. InPort0Mux ConSelectCtrl
Bit
[31.:2]
[1.:0]
Bitfield Name
Rsvd
Index
RW
Reset
00000000 Reserved.
0 Connection select control index.
Description
R
RW
5.34. InPort1Mux Node (NID = 29)
5.34.1. InPort1Mux WCap
Verb ID
Payload
Response
F00
09
See bitfield table.
Get
5.34.1.1. InPort1Mux WCap
Bit
Bitfield Name
Rsvd2
RW
R
Reset
Description
[31.:24]
[23.:20]
00
3
Reserved.
Type
R
Widget type: 0h = Out Converter; 1h = In
Converter; 2h = Summing (Mixer); 3h =
Selector (Mux); 4h = Pin Complex; 5h =
Power; 6h = Volume Knob; 7h = Beep
Generator; 8h-Eh = Reserved; Fh =
Vendor Defined
[19.:16]
Delay
R
0
Number of sample delays through wid-
get.
[15.:12]
[11]
Rsvd1
R
R
R
R
0
0
0
0
Reserved.
SwapCap
PwrCntrl
Dig
Left/right swap support: 1 = yes 0 = no.
Power state support: 1 = yes 0 = no.
[10]
[9]
Digital stream support: 1 = yes (digital)
0 = no (analog).
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5.34.1.1. InPort1Mux WCap
Bit
Bitfield Name
ConnList
RW
Reset
Description
[8]
[7]
R
1
0
Connection list present: 1 = yes 0 = no.
UnSolCap
R
Unsolicited response support:
1 = yes 0 = no.
[6]
ProcWidget
R
0
Processing state support:
1 = yes 0 = no.
[5]
[4]
[3]
Stripe
R
R
R
0
0
0
Striping support: 1 = yes 0 = no.
FormatOvrd
AmpParOvrd
Stream format override: 1 = yes 0 = no.
Amplifier capabilities override:
1 = yes no.
[2]
[1]
[0]
OutAmpPrsnt
InAmpPrsnt
Stereo
R
R
R
0
0
1
Output amp present: 1 = yes 0 = no.
Input amp present: 1 = yes 0 = no.
Stereo stream support: 1 = yes (stereo)
0 = no (mono).
5.34.2. InPort1Mux ConLst
Verb ID
Payload
Response
F00
0E
See bitfield table.
Get
5.34.2.1. InPort1Mux ConLst
Bit
[31.:8]
[7]
Bitfield Name
Rsvd
RW
R
Reset
Description
000000
0
Reserved.
LForm
R
Connection list format: 1 = long-form
(15-bit) NID entries 0 = short-form
(7-bit) NID entries.
[6.:0]
ConL
R
04
Number of NID entries in connection list.
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Ten Channel HD Audio Codec
5.34.3. InPort1Mux ConLstEntry0
Verb ID
Payload
Response
F02
00
See bitfield table.
Get
5.34.3.1. InPort1Mux ConLstEntry0
Bit
[31.:24]
[23.:16]
[15.:8]
[7.:0]
Bitfield Name
ConL3
RW
Reset
11
Description
R
Port H Pin widget (0x11)
Port G Pin widget (0x10)
Port E Pin widget (0x0E)
Port A Pin widget (0x0A)
ConL2
ConL1
ConL0
R
R
R
10
0E
0A
5.34.4. InPort1Mux ConSelectCtrl
Verb ID
Payload
Response
See bitfield table.
F01
00
Get
\
5.34.4.1. InPort1Mux ConSelectCtrl
Bit
[31.:2]
[1.:0]
Bitfield Name
Rsvd
Index
RW
Reset
00000000 Reserved.
0 Connection select control index.
Description
R
RW
5.35. InPort2Mux Node (NID = 2A)
5.35.1. InPort2Mux WCap
Verb ID
Payload
Response
F00
09
See bitfield table.
Get
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92HD73E
Ten Channel HD Audio Codec
5.35.1.1. InPort2Mux WCap
Bit
Bitfield Name
Rsvd2
RW
Reset
00
Description
[31.:24]
[23.:20]
R
Reserved.
Type
R
3
Widget type: 0h = Out Converter; 1h = In
Converter; 2h = Summing (Mixer); 3h =
Selector (Mux); 4h = Pin Complex; 5h =
Power; 6h = Volume Knob; 7h = Beep
Generator; 8h-Eh = Reserved; Fh =
Vendor Defined
[19.:16]
Delay
R
0
Number of sample delays through wid-
get.
[15.:12]
[11]
Rsvd1
R
R
R
R
0
0
0
0
Reserved.
SwapCap
PwrCntrl
Dig
Left/right swap support: 1 = yes 0 = no.
Power state support: 1 = yes 0 = no.
[10]
[9]
Digital stream support: 1 = yes (digital)
0 = no (analog).
[8]
[7]
ConnList
R
R
1
0
Connection list present: 1 = yes 0 = no.
UnSolCap
Unsolicited response support:
1 = yes 0 = no.
[6]
ProcWidget
R
0
Processing state support:
1 = yes 0 = no.
[5]
[4]
[3]
Stripe
R
R
R
0
0
0
Striping support: 1 = yes 0 = no.
FormatOvrd
AmpParOvrd
Stream format override: 1 = yes 0 = no.
Amplifier capabilities override:
1 = yes no.
[2]
[1]
[0]
OutAmpPrsnt
InAmpPrsnt
Stereo
R
R
R
0
0
1
Output amp present: 1 = yes 0 = no.
Input amp present: 1 = yes 0 = no.
Stereo stream support: 1 = yes (stereo)
0 = no (mono).
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Ten Channel HD Audio Codec
5.35.2. InPort2Mux ConLst
Verb ID
Payload
Response
F00
0E
See bitfield table.
Get
5.35.2.1. InPort2Mux ConLst
Bit
[31.:8]
[7]
Bitfield Name
Rsvd
RW
R
Reset
Description
000000
0
Reserved.
LForm
R
Connection list format: 1 = long-form
(15-bit) NID entries 0 = short-form
(7-bit) NID entries.
[6.:0]
ConL
R
04
Number of NID entries in connection list.
5.35.3. InPort2Mux ConLstEntry0
Verb ID
Payload
Response
F02
00
See bitfield table.
Get
5.35.3.1. InPort2Mux ConLstEntry0
Bit
[31.:24]
[23.:16]
[15.:8]
[7.:0]
Bitfield Name
ConL3
RW
Reset
11
Description
R
Port H Pin widget (0x11)
Port G Pin widget (0x10)
Port C Pin widget (0x0C)
Port B Pin widget (0x0B)
ConL2
ConL1
ConL0
R
R
R
10
0C
0B
5.35.4. InPort1Mux ConSelectCtrl
Verb ID
Payload
Response
See bitfield table.
F01
00
Get
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92HD73E
Ten Channel HD Audio Codec
\
5.35.4.1. InPort1Mux ConSelectCtrl
Bit
Bitfield Name
Rsvd
Index
RW
Reset
Description
[31.:2]
[1.:0]
R
00000000 Reserved.
RW
0
Connection select control index.
5.36. InPort3Mux Node (NID = 2B)
5.36.1. InPort3Mux WCap
Verb ID
Payload
Response
F00
09
See bitfield table.
Get
5.36.1.1. InPort3Mux WCap
Bit
Bitfield Name
Rsvd2
RW
R
Reset
Description
[31.:24]
[23.:20]
00
3
Reserved.
Type
R
Widget type: 0h = Out Converter; 1h = In
Converter; 2h = Summing (Mixer); 3h =
Selector (Mux); 4h = Pin Complex; 5h =
Power; 6h = Volume Knob; 7h = Beep
Generator; 8h-Eh = Reserved; Fh =
Vendor Defined
[19.:16]
Delay
R
0
Number of sample delays through wid-
get.
[15.:12]
[11]
Rsvd1
R
R
R
R
0
0
0
0
Reserved.
SwapCap
PwrCntrl
Dig
Left/right swap support: 1 = yes 0 = no.
Power state support: 1 = yes 0 = no.
[10]
[9]
Digital stream support: 1 = yes (digital)
0 = no (analog).
[8]
[7]
ConnList
R
R
1
0
Connection list present: 1 = yes 0 = no.
UnSolCap
Unsolicited response support:
1 = yes 0 = no.
[6]
ProcWidget
R
0
Processing state support:
1 = yes 0 = no.
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Ten Channel HD Audio Codec
5.36.1.1. InPort3Mux WCap
Bit
Bitfield Name
Stripe
RW
Reset
Description
[5]
[4]
[3]
R
0
0
0
Striping support: 1 = yes 0 = no.
Stream format override: 1 = yes 0 = no.
FormatOvrd
AmpParOvrd
R
R
Amplifier capabilities override:
1 = yes no.
[2]
[1]
[0]
OutAmpPrsnt
InAmpPrsnt
Stereo
R
R
R
0
0
1
Output amp present: 1 = yes 0 = no.
Input amp present: 1 = yes 0 = no.
Stereo stream support: 1 = yes (stereo)
0 = no (mono).
5.36.2. InPort3Mux ConLst
Verb ID
Payload
Response
F00
0E
See bitfield table.
Get
5.36.2.1. InPort3Mux ConLst
Bit
[31.:8]
[7]
Bitfield Name
Rsvd
RW
R
Reset
Description
000000
0
Reserved.
LForm
R
Connection list format: 1 = long-form
(15-bit) NID entries 0 = short-form
(7-bit) NID entries.
[6.:0]
ConL
R
04
Number of NID entries in connection list.
5.36.3. InPort3Mux ConLstEntry0
Verb ID
Payload
Response
F02
00
See bitfield table.
Get
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©2011 INTEGRATED DEVICE TECHNOLOGY, INC.
92HD73E
Ten Channel HD Audio Codec
5.36.3.1. InPort3Mux ConLstEntry0
Bit
Bitfield Name
ConL3
RW
Reset
00
Description
Unused list entry
[31.:24]
[23.:16]
[15]
R
ConL2
R
R
00
1
Unused list entry
ConL1Range
1 = ConL0..ConL1 defines a range of
selectable inputs.
[14.:8]
[7.:0]
ConL1
ConL0
R
R
18
15
DAC3 (0x18)
DAC0 (0x15)
5.36.4. InPort3Mux ConSelectCtrl
Verb ID
Payload
Response
F01
00
See bitfield table.
Get
\
5.36.4.1. InPort3Mux ConSelectCtrl
Bit
[31.:2]
[1.:0]
Bitfield Name
Rsvd
Index
RW
Reset
00000000 Reserved.
0 Connection select control index.
Description
R
RW
6. DISCLAIMER
While the information presented herein has been checked for both accuracy and reliability, manufac-
turer assumes no responsibility for either its use or for the infringement of any patents or other rights
of third parties, which would result from its use. No other circuits, patents, or licenses are implied.
This product is intended for use in normal commercial applications. Any other applications, such as
those requiring extended temperature range, high reliability, or other extraordinary environmental
requirements, are not recommended without additional processing by manufacturer. Manufacturer
reserves the right to change any circuitry or specifications without notice. Manufacturer does not
authorize or warrant any product for use in life support devices or critical medical instruments.
228
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92HD73E
92HD73E
Ten Channel HD Audio Codec
7. PINOUTS
7.1. 48QFP
7.1.1.
48QFP Pin Assignment
DVDD_CORE
1
36
35
34
33
32
31
30
29
28
27
26
25
PORTD_R
VOL_UP/DMIC_CLK/GPIO 1
DVDD_IO
2
PORTD_L
3
SENSE_B
VOL_DN/DMIC_0/GPIO 2
SDO
4
CAP2
5
SENSE_C
BITCLK
6
VREFOUT-E (GPIO6-SPCLK)
DMIC1/GPIO5
VREFOUT-C (GPIO4-SPO)
VREFOUT-B
VREFFILT
48
QFP
DVSS
7
SDI_CODEC
DVDD_CORE
SYNC
8
9
10
11
12
RESET#
AVSS1
PCBEEP
AVDD1
Figure 12. 48QFP Pin Assignment
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92HD73E
Ten Channel HD Audio Codec
7.1.2.
Pin Tables for 48QFP
Internal Pull-up 48 pin
Pin Name
Pin Function
I/O
Pull-down
location
DVDD_CORE
Digital Vdd = 3.3V
I(Digital)
None
1
60k Pull-Up with
Volume/GPIOor
60k Pull-down
with Digital Mic
Volume Control OR Digital Mic clock output
OR General Purpose I/O
Volume Up/DMIC_CLK/GPIO1
DVDD_IO
I/O(Digital)
I(Digital)
2
3
4
Reference Voltage (1.5V or 3.3V)
None
60k Pull-Up with
Volume/GPIOor
60k Pull-down
with Digital Mic
Volume Control OR Digital Mic 01 Input OR
Volume Down/DMIC0/GPIO2
I/O(Digital)
General Purpose I/O
SDO
HD Audio Serial Data output (inbound stream)
HD Audio Bit Clock
I/O(Digital)
I(Digital)
I(Digital)
None
None
None
5
6
7
BITCLK
DVSS
Digital Ground
HD Audio Serial Data (outbound stream),
audio module
SDI_CODEC
I/O(Digital)
None
8
DVDD_CORE
SYNC
Digital Vdd= 3.3V
HD Audio Frame Sync
HD Audio Reset
I(Digital)
I(Digital)
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
RESET#
I(Digital)
PCBEEP
Analog PC Beep
I(Analog)
SENSE_A
PORTE_L
PORTE_R
PORTF_L
PORTF_R
PORTI_L
Jack insertion detection Ports A,B,C,D
Port E I/O Left
I(Analog)
I/O(Analog)
I/O(Analog)
I/O(Analog)
I/O(Analog)
I (Analog)
I (Analog)
I (Analog)
I/O(Analog)
I/O(Analog)
I/O(Analog)
I/O(Analog)
I(Analog)
Port E I/O Right
Port F I/O Left
Port F I/O Right
Port I Input Left
PORTI_Comm
PORTI_R
PORTB_L (HP)
PORTB_R (HP)
PORTC_L
PORTC_R
AVDD1
Port I signal Common
Port I Input Right
Port B I/O Left
Port B I/O Right
Port C I/O Left
Port C I/O Right
Analog Vdd=5.0V
Analog Ground
AVSS1
I(Analog)
VREFFILT
Analog Virtual Ground
O(Analog)
Reference Voltage out drive (intended for mic
bias) for Port B
VREFOUT-B
VREFOUT-C
O(Analog)
None
None
28
29
Reference Voltage out drive (intended for mic
bias) for Port C / Analog GPIO4
I/O(Analog)
Table 23. 48QFP Pin Table
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92HD73E
92HD73E
Ten Channel HD Audio Codec
Internal Pull-up 48 pin
Pin Name
Pin Function
I/O
Pull-down
location
60k Pull-Up with
GPIO or 60k
Pull-Down with
Digital Mic
DMIC 1 / GPIO5
Second digital mic input or Analog GPIO5
I/O(Analog)
30
Reference Voltage out drive (intended for mic
bias) for Port E / Analog GPIO6
50k Pull-Up with
GPIO
VREFOUT-E / GPIO6
I/O(Analog)
31
SENSE C
Jack insertion detection Port I
ADC reference Cap
I(Analog)
O(Analog)
I(Analog)
None
None
None
None
None
32
33
34
35
36
CAP2
SENSE B
Jack insertion detection Ports E, F, G, H
Port D I/O Left
PORTD_L (HP)
PORTD_R (HP)
I/O(Analog)
I/O(Analog)
Port D I/O Right
Reference Voltage out drive (intended for mic
bias) for Port A / Analog GPIO7
50k Pull-Up with
GPIO
VREFOUT-A / GPIO7
I/O(Analog)
37
AVDD2
Analog Vdd=5.0V
Port A I/O Left
I(Analog)
None
None
38
39
PORTA_L (HP)
I/O(Analog)
60K Pull-Down
with SPDIF or
60K pull-up with
GPIO
SPDIF OUT1
SECOND SPDIF OUT / Analog GPIO3
I/O(Analog)
40
PORTA_R (HP)
AVSS2
Port A I/O Right
Analog Ground
Port G I/O Left
Port G I/O Right
Port H I/O Left
Port H I/O Right
I/O(Analog)
I(Analog)
None
None
None
None
None
None
41
42
43
44
45
46
PORTG_L
PORTG_R
PORTH_L
PORTH_R
I/O(Analog)
I/O(Analog)
I/O(Analog)
I/O(Analog)
60K Pull-Down
with SPDIF-IN
and EAPD, 60K
Pull-Up with
GPIO
GPIO0/EAPD/SPDIF-IN
S/PDIF-OUT0
General Purpose I/O,EAPD, SPDIF In
I/O(Digital)
O(Digital)
47
48
SPDIF digital output (60K internal pull-down
60K Pull-Down
Table 23. 48QFP Pin Table
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92HD73E
Ten Channel HD Audio Codec
7.2. 40QFN
7.2.1.
40QFN Pin Assignment
SPDIF OUT0
DVDD_LV
SDATA_OUT
BITCLK
1
2
3
4
5
6
7
8
9
10
30
29
28
27
26
25
24
23
22
21
PORTD_R
PORTD_L
SENSE_B
Cap 2
SDATA_IN
DVDD*
VrefOut-E/GPIO6
VrefOut-B
VrefFilt
40-QFN
SYNC
RESET#
AVSS1
PCBeep
AVDD1
SENSE_A
PORTC_R
Figure 13. 40QFN Pin Assignment
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92HD73E
Ten Channel HD Audio Codec
7.2.2.
Pin Tables for 40QFN
Internal Pull-up 40 pin
Pin Name
Pin Function
I/O
Pull-down
60K Pull-Down
None
location
S/PDIF-OUT0
SPDIF digital output (60K internal pull-down O(Digital)
1
DVDD_LV
SDATA_OUT
BITCLK
DVDD Level
O(Power)
I(Digital)
2
HD Audio Serial Data output from controller
HD Audio Bit Clock
HD Audio Serial Data Input to controller
Digital Vdd= 3.3V
HD Audio Frame Sync
HD Audio Reset
PC Beep input
None
3
I(Digital)
None
4
SDATA_IN
DVDD
I/O(Digital)
I(Power)
None
5
None
6
SYNC
I(Digital)
None
7
RESET#
I(Digital)
None
8
PCBeep
I(Analog)
I(Analog)
I/O(Analog)
I/O(Analog)
I/O(Analog)
I/O(Analog)
I(Analog)
I(Analog)
I(Analog)
I/O(Analog)
I/O(Analog)
I/O(Analog)
I/O(Analog)
I(Analog)
I(Analog)
O(Analog)
None
9
SENSE_A
PORTE_L
PORTE_R
PORTF_L
PORTF_R
CD Left
Jack insertion detection
Port E Left
None
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
None
Port E Right
None
Port F Left
None
Port F Right
None
CD Left
None
CD Common
CD Right
PORTB_L (HP)
PORTB_R (HP)
PORTC_L
PORTC_R
AVDD1
CD L/R return
None
CD Right
None
Port B Output Left
Port B Output Right
Port C Left
None
None
None
Port C Right
None
Analog Vdd=5.0V or 3.3V
Analog Ground
None
AVSS1
None
VREFFILT
Analog Virtual Ground
None
Reference Voltage out drive (intended for mic
bias)
VREFOUT-B
O(Analog)
O(Analog)
None
25
26
Reference Voltage out drive (intended for mic
bias) or General Purpose I/O
VREFOUT-E / GPIO2
None
CAP 2
ADC reference bypass capacitor
Jack insertion detection
Port D Output Left
O(Analog)
I(Analog)
None
None
None
None
27
28
29
30
SENSE_B
PORTD_L (HP)
PORTD_R (HP)
I/O(Analog)
I/O(Analog)
Port D Output Right
Reference Voltage out drive (intended for mic
bias) or General Purpose I/O
VREFOUT-E / GPIO7
O(Analog)
None
31
AVDD2
Analog Supply for VREG
Port A Output Left
I(Power)
None
None
None
32
33
34
PORTA_L (HP)
PORTA_R (HP)
I/O(Analog)
I/O(Analog)
Port A Output Right
Table 24. 40QFN Pin Table
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92HD73E
Ten Channel HD Audio Codec
Internal Pull-up 40 pin
Pin Name
Pin Function
I/O
Pull-down
location
AVSS
Analog Ground
Port G Left
I(Power)
None
35
36
37
38
39
PORTG_L
PORTG_R
PORTH_L
PORTH_R
I/O(Analog)
I/O(Analog)
I/O(Analog)
I/O(Analog)
None
None
None
None
Port G Right
Port H Left
Port H Right
60K
Pull-Up/Down
EAPD/SPDIF_IN/GPIO0
EAPD, SPDIF Input, GPIO0
I/O(Digital)
40
The DAP pad must be connected to DVSS on the 40-pin package
Table 24. 40QFN Pin Table
8. PACKAGE OUTLINE AND PACKAGE DIMENSIONS
Package dimensions are kept current with JEDEC Publication No. 95
8.1. 48QFP Package
A2
A
QFP Dimensions in mm
Key
Min
1.40
0.05
1.35
8.80
6.90
8.80
6.90
0.45
Nom
1.50
0.10
1.40
9.00
7.00
9.00
7.00
0.60
0.50
-
Max
D
A
A1
A2
D
1.60
0.15
1.45
9.20
7.10
9.20
7.10
0.75
A1
D1
b
D1
E
48 pin LQFP
E1
L
e
e
c
0.09
0.17
0.20
0.27
Pin 1
b
0.22
c
Figure 14. 48QFP Package Drawing
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92HD73E
Ten Channel HD Audio Codec
8.2. 40QFN Package
Figure 15. 40QFN Package Drawing
8.3. Standard Reflow Profile Data
Note: These devices can be hand soldered at 360 oC for 3 to 5 seconds.
FROM: IPC / JEDEC J-STD-020C “Moisture/Reflow Sensitivity Classification for Nonhermetic Solid
State Surface Mount Devices” (www.jedec.org/download).
Profile Feature
Pb Free Assembly
Average Ramp-Up Rate (Tsmax - Tp)
3 oC / second max
Temperature Min (Tsmin
Temperature Max (Tsmax
Time (tsmin - tsmax
)
)
)
150 oC
Preheat:
200 oC
60 - 180 seconds
Temperature (TL)
Time (tL)
217 oC
60 - 150 seconds
Time maintained above:
Peak / Classification Temperature (Tp)
See “Package Classification Reflow Temperatures”
Table 25. Standard Reflow Profile
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92HD73E
Ten Channel HD Audio Codec
Profile Feature
Pb Free Assembly
Time within 5 oC of actual Peak Temperature (tp)
Ramp-Down rate
20 - 40 seconds
6 oC / second max
8 minutes max
Time 25 oC to Peak Temperature
Note: All temperatures refer to topside of the package, measured on the package body surface.
Table 25. Standard Reflow Profile
Figure 16. Solder Reflow Profile
8.4. Pb Free Process - Package Classification Reflow Temperatures
MSL
Reflow Temperature
3
260 oC
Table 26. Pb-Free Process Reflow
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92HD73E
Ten Channel HD Audio Codec
9. DOCUMENT REVISION HISTORY
Revision
Date
Description of Change
0.5
April 25, 2007
Initial release
corrected type-os, replaced TBD in power consumption, updated widget and pinout description table
and widget diagram, updated port configuration diagram
0.6
0.9
July 19, 2007
Oct 9, 2007
added detailed widget information, updated power consumption specification
updated Analog BC Peep description, updated the functional and widget diagrams for the new
Analog PC Beep typology, added AnaBeep widget in AFG NID=-01h
0.91
1.0
Dec 14, 2007
March 19, 2008
June 2011
removed preliminary, updated performance numbers
Added 40QFN option. Added 48QFP Industrial temperature option. Removed all but 5V AVDD as an
analog voltage option. Converted to newer datasheet template, updated software support section.
1.1
1.2
1.3
June 2011
Removed 40QFN device ID, all package options will have the same device ID.
Updated 40QFN orderable part number and pinout.
August 2011
6024 Silver Creek Valley Road
San Jose, California 95138
DISCLAIMER Integrated Device Technology, Inc. (IDT) and its subsidiaries reserve the right to modify the products and/or specifications de-
scribed herein at any time and at IDT’s sole discretion. All information in this document, including descriptions of product features and perfor-
mance, is subject to change without notice. Performance specifications and the operating parameters of the described products are determined
in the independent state and are not guaranteed to perform the same way when installed in customer products. The information contained
herein is provided without representation or warranty of any kind, whether express or implied, including, but not limited to, the suitability of IDT’s
products for any particular purpose, an implied warranty of merchantability, or non-infringement of the intellectual property rights of others. This
document is presented only as a guide and does not convey any license under intellectual property rights of IDT or any third parties.
IDT’s products are not intended for use in life support systems or similar devices where the failure or malfunction of an IDT product can be
reasonably expected to significantly affect the health or safety of users. Anyone using an IDT product in such a manner does so at their own
risk, absent an express, written agreement by IDT.
Integrated Device Technology, IDT and the IDT logo are registered trademarks of IDT. Other trademarks and service marks used herein, in-
cluding protected names, logos and designs, are the property of IDT or their respective third party owners.
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