ICS300M-11 [IDT]
Clock Generator, 135MHz, CMOS, PDSO8, SOIC-8;
| 型号： | ICS300M-11 |
| 厂家： | 
INTEGRATED DEVICE TECHNOLOGY |
| 描述： | Clock Generator, 135MHz, CMOS, PDSO8, SOIC-8 时钟 光电二极管 外围集成电路 晶体 |
| 文件： | 总4页 (文件大小：53K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PRELIMINARY INFORMATION
PRELIMINARY INFORMATION
ICS300-11
QTClock™ 125 MHz Clock Synthesizer
Description
Features
• Packaged in 8 pin SOIC
The ICS300-11 QTClock™ generates a high
quality, 125 MHz clock output from a 20 MHz
crystal or clock input. It is designed to replace
crystal oscillators in most electronic systems. The
ICS300 contains a One Time Programmable
(OTP) ROM which, in the -11 version, is factory
programmed with the PLL divider values to
output 125 MHz. Using Phase-Locked-Loop
(PLL) techniques, the device runs from a standard
fundamental mode, inexpensive crystal or clock. It
is smaller and less expensive than a single
125 MHz oscillator.
• Output clock frequency of 125 MHz at 3.3V
• Input crystal or clock frequency of 20 MHz
• Internal multiplier of 6.25
• Quick turn frequency programming allows
production in two to four weeks
• Low jitter - 20 ps one sigma typical
• Duty cycle of 45/55
• Full CMOS level outputs with 25 mA drive
capability at TTL levels
• Tri-state output + PLL power down pin
• Advanced, low power CMOS process
Block Diagram
VDD GND
OTP
ROM
with PLL
Divider
Output
Buffer
PLL
Clock
Synthesis
and Control
Circuitry
125 MHz
Values
20 MHz crystal
or clock
X1/ICLK
Crystal
Oscillator
X2
PDTS (output and PLL)
MDS300-11A
1
Revision 11118
Printed 11/10/98
Integrated Circuit Systems •1271 Parkmoor Ave.•San Jose•CA•95126•(408)295-9800tel•(408)295-9818fax
PRELIMINARY INFORMATION
PRELIMINARY INFORMATION
ICS300-11
QTClock™ 125 MHz Clock Synthesizer
Pin Assignment
1
2
3
4
8
7
6
5
X1/ICLK
VDD
GND
DC
X2
PDTS
DC
125M
Pin Descriptions
Number
Name
X1/ICLK
VDD
GND
DC
Type Description
1
2
3
4
5
6
7
8
I
P
P
-
Crystal connection. Connect to 20 MHz crystal or clock.
Connect to +3.3V or +5V.
Connect to ground.
Don't Connect anything to this pin.
125M
DC
O
-
125 MHz clock output whose amplitude matches VDD.
Don't Connect anything to this pin.
PDTS
X2
I
Powers down PLL, and puts output into high impedance state, when low.
Crystal connection to 20 MHz crystal. Leave unconnected for clock input.
O
Key: I = Input, O = output, P = power supply connection
Device Configuration
The ICS300 QTClock has many programming options, so the two character alphanumeric programming
code (in this case, the -11) must be specified when ordering parts.
External Components / Crystal Selection
The ICS300 requires a 0.01µF decoupling capacitor to be connected between VDD and GND. It must be
connected close to the ICS300 to minimize lead inductance. No external power supply filtering is required
for this device. A 33Wterminating resistor can be used next to the CLK pin. The total on-chip capacitance
is approximately 16 pF, so a parallel resonant, fundamental mode crystal should be used. For crystals with
a specified load capacitance greater than 16 pF, crystal capacitors can be connected from each of the pins
X1 and X2 to Ground. The value (in pF) of these crystal caps should be = (C -16)*2, where C is the
L
L
crystal load capacitance in pF. These external capacitors are only required for applications where the exact
frequency is critical. For a clock input, connect to X1 and leave X2 unconnected (no capacitors on either).
MDS300-11A
2
Revision 11118
Printed 11/10/98
Integrated Circuit Systems •1271 Parkmoor Ave.•San Jose•CA•95126•(408)295-9800tel•(408)295-9818fax
PRELIMINARY INFORMATION
PRELIMINARY INFORMATION
ICS300-11
QTClock™ 125 MHz Clock Synthesizer
Electrical Specifications
Parameter
Conditions
Minimum
Typical
Maximum
Units
ABSOLUTE MAXIMUM RATINGS (stresses beyond these can permanently damage the device)
Supply Voltage, VDD
Inputs
Referenced to GND
Referenced to GND
Referenced to GND
7
VDD+0.5
VDD+0.5
70
V
V
V
C
C
C
-0.5
-0.5
0
Clock Output
Ambient Operating Temperature
Soldering Temperature
Storage temperature
Max of 10 seconds
260
-65
150
DC CHARACTERISTICS (VDD = 3.3V, 25C unless otherwise noted)
Operating Voltage, VDD
3.13
5.5
(VDD/2)-1
0.8
V
V
Input High Voltage, VIH, ICLK only
Input Low Voltage, VIL, ICLK only
Input High Voltage, VIH
ICLK (Pin 1)
ICLK (Pin 1)
PDTS
(VDD/2)+1
VDD/2
VDD/2
V
2
V
Input Low Voltage, VIL
PDTS
V
Output High Voltage, VOH
Output High Voltage, VOH
Output Low Voltage, VOL
IOH=-4mA
IOH=-25mA
IOL=25mA
VDD-0.4
2.4
V
V
0.4
V
IDD Operating Supply Current, 20 MHz crystal No Load, 125MHz
18
70
270
4
mA
mA
kW
pF
Short Circuit Current
CLK output
Pin 7
On-Chip Pull-up Resistor, PDTS
Input Capacitance, PDTS
Pin 7
AC CHARACTERISTICS (VDD = 3.3V, 25C unless otherwise noted)
Input Frequency, crystal input
20
125
0.7
21.6
135
1.2
1.2
55
MHz
MHz
ns
Output Frequency
VDD = 3.13 to 5.5V
20pF load
Output Clock Rise Time, 0.8 to 2.0V
Output Clock Fall Time, 2.0 to 0.8V
Output Clock Duty Cycle
20pF load
0.6
ns
at VDD/2
45
49 to 51
65
%
Absolute Clock Period Jitter
Deviation from mean
130
40
ps
One Sigma Clock Period Jitter
Power-up time, PDTS goes high until CLK out
20
ps
8
20
ms
MDS300-11A
3
Revision 11118
Printed 11/10/98
Integrated Circuit Systems •1271 Parkmoor Ave.•San Jose•CA•95126•(408)295-9800tel•(408)295-9818fax
PRELIMINARY INFORMATION
PRELIMINARY INFORMATION
ICS300-11
QTClock™ 125 MHz Clock Synthesizer
Package Outline and Package Dimensions
8 pin SOIC
E
H
Inches
Millimeters
Min Max
0.055 0.068 1.397 1.7272
Pin 1
Symbol Min
Max
A
b
0.013 0.019 0.330
0.185 0.200 4.699
0.150 0.160 3.810
0.225 0.245 5.715
0.483
5.080
4.064
6.223
D
E
h x 45°
D
H
e
.050 BSC
0.015
0.01
1.27 BSC
A
Q
h
0.381
0.254
c
b
Q
0.004
0.102
e
Ordering Information
Part/Order Number
Marking
ICS300M (top line)
Package
8 pin SOIC
Temperature
0 to 70 C
ICS300M-11
YYWW -11 (2nd line)
ICS300M (top line)
ICS300M-11T
8 pin SOIC on tape and reel
0 to 70 C
YYWW -11 (2nd line)
YYWW represents a 4 digit date code. The -11 is assigned by the factory, and indicates the output
frequencies on CLK and REF, and other programming options.
While the information presented herein has been checked for both accuracy and reliability, ICS/MicroClock assumes no responsibility for either its use or for the infringement of
any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal
commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not
recommended without additional processing by ICS/MicroClock. ICS/MicroClock reserves the right to change any circuitry or specifications without notice. ICS/MicroClock
does not authorize or warrant any ICS/MicroClock product for use in life support devices or critical medical instruments.
QTClock is a trademark of ICS
MDS300-11A
4
Revision 11118
Printed 11/10/98
Integrated Circuit Systems •1271 Parkmoor Ave.•San Jose•CA•95126•(408)295-9800tel•(408)295-9818fax
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