ICS83947AY [IDT]
Low Skew Clock Driver, 9 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 MM, 1.40 MM HEIGHT, MS-026, LQFP-32;
| 型号： | ICS83947AY |
| 厂家： | 
INTEGRATED DEVICE TECHNOLOGY |
| 描述： | Low Skew Clock Driver, 9 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 MM, 1.40 MM HEIGHT, MS-026, LQFP-32 驱动 逻辑集成电路 |
| 文件： | 总9页 (文件大小：129K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PRELIMINARY
ICS83947
LOW SKEW, 1-TO-9
LVCMOS FANOUT BUFFER
Integrated
Circuit
Systems, Inc.
GENERAL DESCRIPTION
FEATURES
The ICS83947 is a low skew, 1-to-9 LVCMOS
• 9 LVCMOS outputs
,&6
Fanout Buffer and a member of the HiPerClockS™
• Selectable CLK0 and CLK1 can accept the following input
levels: LVCMOS and LVTTL
HiPerClockS™
family of High Performance Clock Solutions from
ICS. The low impedance LVCMOS outputs are
designed to drive 50Ω series or parallel termi-
• Maximum output frequency: 250MHz
• Output skew: 500ps (maximum)
nated transmission lines. The effective fanout can be increased
from 9 to 18 by utilizing the ability of the outputs to drive two
series terminated lines.
• Part-to-part skew: 2ns (maximum)
• 3.3V operating supply
Guaranteed output and part-to-part skew characteristics
make the ICS83947 ideal for high performance, single ended
applications that also require a limited output voltage.
• 0°C to 70°C ambient operating temperature
• Industrial temperature information available upon request
• Pin compatible with the MPC947
BLOCK DIAGRAM
PIN ASSIGNMENT
D
CLK_EN
Q
LE
32 31 30 29 28 27 26 25
0
1
CLK0
CLK1
GND
Q3
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
GND
CLK_SEL
CLK0
Q0
VDDO
Q4
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
CLK1
CLK_SEL
ICS83947
GND
Q5
CLK_EN
OE
VDDO
GND
VDD
GND
9
10 11 12 13 14 15 16
32-Lead LQFP
7mm x 7mm x 1.4mm package body
Y Package
Top View
OE
The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial
product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice.
83947AY
http://www.icst.com/products/hiperclocks.html
REV. A JANUARY 7, 2002
1
PRELIMINARY
ICS83947
LOW SKEW, 1-TO-9
LVCMOS FANOUT BUFFER
Integrated
Circuit
Systems, Inc.
TABLE 1. PIN DESCRIPTIONS
Number
Name
Type
Power
Input Pullup
Description
1, 8, 9, 12, 16, 17,
20, 24, 25, 29, 32
GND
Power supply ground. Connect to ground.
Clock select input. When HIGH, selects CLK1. When
LOW, selects CLK0. LVCMOS / LVTTL interface levels.
2
CLK_SEL
3, 4
CLK0, CLK1
CLK_EN
OE
Input Pullup Reference clock inputs. LVCMOS / LVTTL interface levels.
Input Pullup Clock enable. LVCMOS / LVTTL interface levels.
Input Pullup Output enable.
5
6
7
VDD
Power
Power
Positive supply pin. Connect 3.3V.
Output supply pins. Connect 3.3V.
10, 14, 18, 22, 27, 31
VDDO
11, 13, 15, 19, 21,
23, 26, 28, 30
Q8, Q7, Q6, Q5,
Q4, Q3, Q2, Q1, Q0
Output
Q0 thru Q8 clock outputs.
NOTE: Pullup refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol
Parameter
Test Conditions
Minimum Typical Maximum Units
CIN
Input Capacitance
4
pF
Power Dissipation Capacitance
(per output)
CPD
VDD, VDDO = 3.6V
pF
RPULLUP
Input Pullup Resistor
51
51
7
KΩ
KΩ
Ω
RPULLDOWN Input Pulldown Resistor
ROUT Output Impedance
TABLE 3. OUTPUT ENABLE AND CLOCK ENABLE FUNCTION TABLE
Control Inputs
Output
OE
0
CLK_EN
Q0 thru Q8
Hi-Z
X
0
1
1
LOW
1
Follows CLK input
83947AY
http://www.icst.com/products/hiperclocks.html
REV. A JANUARY 7, 2002
2
PRELIMINARY
ICS83947
LOW SKEW, 1-TO-9
LVCMOS FANOUT BUFFER
Integrated
Circuit
Systems, Inc.
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, VDD
Inputs, VI
Outputs, VO
4.6V
-0.5V to VDD + 0.5 V
-0.5V to VDDO + 0.5V
Package Thermal Impedance, θJA 47.9°C/W (0 lfpm)
Storage Temperature, Tstg -65°C to 150°C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are
stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the
DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may
affect product reliability.
TABLE 4A. POWER SUPPLY DC CHARACTERISTICS, VDD = VDDO = 3.3V 0.3V, TA = 0°C TO 70°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum Units
VDD
VDDO
IDD
Input Supply Voltage
3.0
3.0
3.3
3.3
33
8
3.6
3.6
V
Output Supply Voltage
Input Supply Current
Output Supply Current
V
mA
mA
IDDO
TABLE 4B. LVCMOS DC CHARACTERISTICS, VDD = VDDO = 3.3V 0.3V, TA = 0°C TO 70°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
CLK0, CLK1
2
VDD + 0.3
VDD + 0.3
1.3
V
V
V
V
VIH
VIL
Input High Voltage
CLK_SEL, CLK_EN, OE
CLK0, CLK1
2
-0.3
-0.3
Input Low Voltage
CLK_SEL, CLK_EN, OE
0.8
CLK0, CLK1, CLK_SEL,
OE, CLK_EN
IIH
IIL
Input High Current
Input Low Current
V
DD = VIN = 3.6V
5
µA
µA
CLK0, CLK1, CLK_SEL,
OE, CLK_EN
VDD = 3.6V, VIN = 0V
-150
2.5
VOH
VOL
IOZL
IOZH
Output High Voltage
Output Low Voltage
IOH = -20mA
IOL = 20mA
V
V
0.4
Output Tristate Low Current
Output Tristate High Current
TBD
TBD
µA
µA
83947AY
http://www.icst.com/products/hiperclocks.html
REV. A JANUARY 7, 2002
3
PRELIMINARY
ICS83947
LOW SKEW, 1-TO-9
LVCMOS FANOUT BUFFER
Integrated
Circuit
Systems, Inc.
TABLE 5. AC CHARACTERISTICS, VDD = VDDO = 3.3V 0.3V, TA = 0°C TO 70°C
Symbol Parameter
fMAX Output Frequency
Test Conditions
Minimum
Typical
Maximum
Units
250
MHz
Propagation Delay, Low to High:
NOTE 1
Propagation Delay, High to Low:
NOTE 1
tpLH
f ≤ 250MHZ
f ≤ 250MHZ
2.6
2.6
ns
ns
tpHL
Measured on
rising edge @VDDO/2
tsk(o)
Output Skew; NOTE 2, 5
500
2
ps
ns
Measured on
rising edge @VDDO/2
tsk(pp)
Part-to-Part Skew; NOTE 3, 5
tR
Output Rise Time
0.8V to 2.0V
0.8V to 2.0V
0.2
0.2
1
ns
ns
ps
ns
ns
ns
ns
tF
Output Fall Time
1
tPW
tEN
tDIS
tS
Output Pulse Width
tCycle/2 - 800
tCycle/2 + 800
Output Enable Time; NOTE 4
Output Disable Time; NOTE 4
Clock Enable Setup Time
Clock Enable Hold Time
11
11
TBD
TBD
tS
All parameters measured at fMAX unless noted otherwise.
NOTE 1: Measured from VDD/2 of the input to VDDO/2 of the output.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions.
Measured at VDDO/2.
NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltages and with
equal load conditions. Using the same type of inputs on each device, the outputs are measured at VDDO/2.
NOTE 4: These parameters are guaranteed by characterization. Not tested in production.
NOTE 5: This parameter is defined in accordance with JEDEC Standard 65.
83947AY
http://www.icst.com/products/hiperclocks.html
REV. A JANUARY 7, 2002
4
PRELIMINARY
ICS83947
LOW SKEW, 1-TO-9
LVCMOS FANOUT BUFFER
Integrated
Circuit
Systems, Inc.
PARAMETER MEASUREMENT INFORMATION
1.65V 0.15V
SCOPE
VDD,
VDDO
Qx
LVCMOS
GND
-1.65V 0.15V
FIGURE 1 - 3.3V OUTPUT LOAD TEST CIRCUIT
VDDO
2
Qx
Qy
VDDO
2
tsk(o)
FIGURE 2 - OUTPUT SKEW
83947AY
http://www.icst.com/products/hiperclocks.html
REV. A JANUARY 7, 2002
5
PRELIMINARY
ICS83947
LOW SKEW, 1-TO-9
LVCMOS FANOUT BUFFER
Integrated
Circuit
Systems, Inc.
PART 1
Qx
VDDO
2
VDDO
2
PART 2
Qy
tsk(pp)
FIGURE 3 - PART-TO-PART SKEW
2.0V
2.0V
VSWING
0.8V
0.8V
Clock Inputs
and Outputs
tR
tF
FIGURE 4 - INPUT AND OUTPUT RISE AND FALL TIME
VDD
2
CLK0, CLK1
Q0 - Q8
VDDO
2
tPD
FIGURE 5 - PROPAGATION DELAY
VDDO
2
VDDO
2
VDDO
2
Q0 - Q8
tPW
tPERIOD
tPW
tPERIOD
odc =
FIGURE 6 - tPW & tPERIOD
83947AY
http://www.icst.com/products/hiperclocks.html
REV. A JANUARY 7, 2002
6
PRELIMINARY
ICS83947
LOW SKEW, 1-TO-9
LVCMOS FANOUT BUFFER
Integrated
Circuit
Systems, Inc.
RELIABILITY INFORMATION
TABLE 6. θJAVS. AIR FLOW TABLE
qJA by Velocity (Linear Feet per Minute)
0
200
55.9°C/W
42.1°C/W
500
50.1°C/W
39.4°C/W
Single-Layer PCB, JEDEC Standard Test Boards
Multi-Layer PCB, JEDEC Standard Test Boards
67.8°C/W
47.9°C/W
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
TRANSISTOR COUNT
The transistor count for ICS83947 is: 1040
83947AY
http://www.icst.com/products/hiperclocks.html
REV. A JANUARY 7, 2002
7
PRELIMINARY
ICS83947
LOW SKEW, 1-TO-9
LVCMOS FANOUT BUFFER
Integrated
Circuit
Systems, Inc.
PACKAGE OUTLINE - Y SUFFIX
TABLE 7. PACKAGE DIMENSIONS
JEDEC VARIATION
ALL DIMENSIONS IN MILLIMETERS
BBA
SYMBOL
MINIMUM
NOMINAL
MAXIMUM
N
A
32
--
--
--
1.60
0.15
1.45
0.45
0.20
A1
A2
b
0.05
1.35
0.30
0.09
1.40
0.37
c
--
D
9.00 BASIC
7.00 BASIC
5.60 Ref.
9.00 BASIC
7.00 BASIC
5.60 Ref.
0.80 BASIC
0.60
D1
D2
E
E1
E2
e
L
0.45
0.75
q
--
0
°
7°
ccc
--
--
0.10
Reference Document: JEDEC Publication 95, MS-026
83947AY
http://www.icst.com/products/hiperclocks.html
REV. A JANUARY 7, 2002
8
PRELIMINARY
ICS83947
LOW SKEW, 1-TO-9
LVCMOS FANOUT BUFFER
Integrated
Circuit
Systems, Inc.
TABLE 8. ORDERING INFORMATION
Part/Order Number
ICS83947AY
Marking
Package
32 Lead LQFP
Count
250 per tray
1000
Temperature
0°C to 70°C
0°C to 70°C
ICS83947AY
ICS83947AY
ICS83947AYT
32 Lead LQFP on Tape and Reel
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use
or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use
in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are
not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS
product for use in life support devices or critical medical instruments.
83947AY
http://www.icst.com/products/hiperclocks.html
REV. A JANUARY 7, 2002
9
相关型号：
ICS83947AYI-147LF
Low Skew Clock Driver, 83947 Series, 9 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 MM, 1.40 MM HEIGHT, MS-026, LQFP-32
IDT
ICS83947AYLF
Low Skew Clock Driver, 9 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 MM, 1.40 MM HEIGHT, MS-026, LQFP-32
IDT
ICS83947AYLFT
Low Skew Clock Driver, 9 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 MM, 1.40 MM HEIGHT, MS-026, LQFP-32
IDT
ICS83947AYT
Low Skew Clock Driver, 9 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 MM, 1.40 MM HEIGHT, MS-026, LQFP-32
IDT
©2020 ICPDF网 联系我们和版权申明