IDT54FCT373ATD [IDT]
Bus Driver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, CDIP20, CERDIP-20;型号: | IDT54FCT373ATD |
厂家: | INTEGRATED DEVICE TECHNOLOGY |
描述: | Bus Driver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, CDIP20, CERDIP-20 驱动 CD 逻辑集成电路 |
文件: | 总7页 (文件大小:144K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
FAST CMOS OCTAL
TRANSPARENT LATCH
IDT54/74FCT373T/AT/CT
DESCRIPTION:
FEATURES:
TheFCT373Tis anoctaltransparentlatchbuiltusinganadvanceddual
metalCMOStechnology.Theseoctallatcheshave3-stateoutputsandare
intendedforbusorientedapplications.Theflip-flopsappeartransparentto
thedatawhenLatchEnable(LE)ishigh. WhenLEislow,thedatathatmeets
theset-uptimeislatched. DataappearsonthebuswhentheOutputEnable
(OE)islow. WhenOEishigh,thebusoutputisinthehigh-impedancestate.
−
−
−
Low input and output leakage ≤1µA (max.)
CMOS power levels
True TTL input and output compatibility
•
•
VOH = 3.3V (typ.)
VOL = 0.3V (typ.)
−
−
Meets or exceeds JEDEC standard 18 specifications
Military product compliant to MIL-STD-883, Class B and DESC
listed (dual marked)
−
−
−
−
Std., A, and C speed grades
High drive outputs (-15mA IOH, 48mA IOL)
Power off disable outputs permit “live insertion”
Available in the following packages:
•
•
Industrial: SOIC, SSOP, QSOP, TSSOP
Military: CERDIP, LCC, CERPACK
FUNCTIONALBLOCKDIAGRAM
D0
D1
D2
D3
D4
D5
D6
D7
D
D
D
D
D
D
D
D
O
O
O
O
O
O
O
O
G
G
G
G
G
G
G
G
LE
OE
O2
O3
O6
O7
O0
O1
O4
O5
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
AUGUST 2000
1
c
1999 Integrated Device Technology, Inc.
DSC-5496/-
IDT54/74FCT373T/AT/CT
FASTCMOSOCTALTRANSPARENTLATCH
MILITARYANDINDUSTRIALTEMPERATURERANGES
PINCONFIGURATION
VCC
20
19
18
17
1
2
OE
O0
D0
D1
O1
INDEX
O7
D7
D6
O6
O5
3
2
20 19
3
4
1
4
5
6
7
8
18
17
16
15
14
D1
D7
D6
O6
O5
D5
O1
O2
D20-1
SO20-2 16
SO20-7
SO20-8 15
SO20-9
5
L20-2
O2
D2
D3
O3
6
D2
D3
E20-1
D5
D4
O4
LE
14
7
9
10
11 12 13
13
12
11
8
9
GND
10
LCC
TOP VIEW
CERDIP/ SOIC/ SSOP/ QSOP/ TSSOP/ CERPACK
TOP VIEW
ABSOLUTE MAXIMUM RATINGS(1)
PIN DESCRIPTION
Pin Names
Description
Symbol
Rating
Max.
Unit
DN
LE
OE
ON
Data Inputs
(2)
VTERM
Terminal Voltage with Respect to GND
–0.5 to +7
V
Latch Enable Input (Active HIGH)
Output Enable Input (Active LOW)
3-State Outputs
(3)
VTERM
Terminal Voltage with Respect to GND –0.5 to VCC+0.5
V
TSTG
Storage Temperature
DC Output Current
–65 to +150
–60 to +120
°C
IOUT
mA
8T-link
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum
FUNCTION TABLE (1)
Inputs
Outputs
ON
DN
H
LE
H
OE
L
rating conditions for extended periods may affect reliability.
terminal voltage may exceed Vcc by +0.5V unless otherwise noted.
No
H
L
Z
2. Inputs and Vcc terminals only.
3. Outputs and I/O terminals only.
L
H
L
X
X
H
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don't Care
O
CAPACITANCE
Symbol
(TA = +25 C, f = 1.0MHz)
Parameter(1)
Conditions
Typ.
Max. Unit
Z = High-Impedance
CIN
Input Capacitance
VIN = 0V
6
10
12
pF
COUT
Output Capacitance
VOUT = 0V
8
pF
8T-link
NOTE:
1. This parameter is measured at characterization but not tested.
2
IDT54/74FCT373T/AT/CT
FASTCMOSOCTALTRANSPARENTLATCH
MILITARYANDINDUSTRIALTEMPERATURERANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
=
CC
Industrial: TA = –40°C to +85°C, VCC = 5.0V ± 5%; Military: TA –55°C to +125°C, V = 5.0V ± 10%
Symbol
Parameter
Input HIGH Level
Test Conditions(1)
Guaranteed Logic HIGH Level
Min.
Typ.(2) Max.
Unit
VIH
2
—
—
—
0.8
±1
±1
±1
±1
±1
–1.2
—
1
V
VIL
II H
II L
Input LOW Level
Guaranteed Logic LOW Level
VCC = Max.
—
—
—
—
—
—
—
—
—
V
Input HIGH Current (4)
Input LOW Current (4)
High Impedance Output Current
(3-State Output pins) (4)
Input HIGH Current
VI = 2.7V
VI = 0.5V
VO = 2.7V
VO = 0.5V
—
µA
—
IOZH
IOZL
II
VCC = Max.
—
µA
—
VCC = Max., VI = VCC (Max.)
VCC = Min., IIN = –18mA
—
µA
V
VIK
VH
ICC
Clamp Diode Voltage
Input Hysteresis
–0.7
200
0.01
—
mV
mA
Quiescent Power Supply Current
VCC = Max., VIN =
VCC
GND or
OUTPUT DRIVE CHARACTERISTICS
Symbol
Parameter
Output HIGH Voltage
Test Conditions(1)
IOH = –6mA MIL
Min.
Typ.(2) Max.
Unit
VOH
VCC = Min.
2.4
3.3
—
V
VIN = VIH or VIL
IOH = –8mA IND
IOH = –12mA MIL
IOH = –15mA IND
IOL = 32mA MIL
IOL = 48mA IND
2
3
—
VOL
Output LOW Voltage
VCC = Min.
VIN = VIH or VIL
—
0.3
0.5
V
IOS
Short Circuit Current
Input/Output Power Off Leakage (5)
VCC = Max, VO = GND (3)
–60
—
–120
—
–225
mA
µA
IOFF
VCC = 0V, VIN or VO ≤ 4.5V
± 1
NOTES:
1. For conditions shown as max. or min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second.
4. The test limit for this parameter is ±5µA at TA = -55°C.
5. This parameter is guaraneteed but not tested.
3
IDT54/74FCT373T/AT/CT
FASTCMOSOCTALTRANSPARENTLATCH
MILITARYANDINDUSTRIALTEMPERATURERANGES
POWER SUPPLY CHARACTERISTICS
Symbol
Parameter
Quiescent Power Supply Current
TTL Inputs HIGH
Test Conditions(1)
Min.
Typ.(2) Max.
Unit
∆ICC
V
CC = Max.
—
0.5
2
mA
(3)
VIN = 3.4V
ICCD
Dynamic Power Supply Current (4)
VCC = Max.
VIN = VCC
—
0.15
0.25
mA/
Outputs Open
VIN = GND
MHz
OE = GND
One Input Toggling
50% Duty Cycle
VCC = Max.
IC
Total Power Supply Current (6)
VIN = VCC
—
—
1.5
1.8
3.5
4.5
mA
Outputs Open
fi = 10MHz
VIN = GND
50% Duty Cycle
OE = GND
VIN = 3.4
VIN = GND
LE VCC
=
One Bit Toggling
VCC = Max.
VIN = VCC
—
—
3
5
6(5)
Outputs Open
fi = 2.5MHz
VIN = GND
50% Duty Cycle
OE = GND
VIN = 3.4
VIN = GND
14(5)
LE VCC
=
Eight Bits Toggling
NOTES:
1. For conditions shown as max. or min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V); all other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
C
CC
CC
H
T
CCD CP i i
(f /2 + f N )
I
= I + ∆I D N + I
ICC = Quiescent Current
CC = Power Supply Current for a TTL High Input (VIN = 3.4V)
∆I
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
fi = Input Frequency
Ni = Number of Inputs at fi
All currents are in milliamps and all frequencies are in megahertz.
4
IDT54/74FCT373T/AT/CT
FASTCMOSOCTALTRANSPARENTLATCH
MILITARYANDINDUSTRIALTEMPERATURERANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE - INDUSTRIAL
FCT373T
FCT373AT
FCT373CT
Symbol
Parameter
Propagation Delay
DN to ON
Conditions (1)
CL = 50pF
Min (2)
Max.
Min (2)
Max.
Min (2)
Max.
Unit
.
.
.
tPLH
1.5
8
1.5
5.2
1.5
4.2
ns
tPHL
RL = 500Ω
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tSU
Propagation Delay
LE to ON
2
13
12
7.5
—
2
8.5
6.5
5.5
—
2
1.5
1.5
2
5.5
5.5
5
ns
ns
ns
ns
Output Enable Time
1.5
1.5
2
1.5
1.5
2
Output Disable Time
Set-up Time HIGH
or LOW, DN to LE
Hold Time HIGH
or LOW, DN to LE
LE Pulse Width HIGH (3)
—
tH
1.5
6
—
—
1.5
5
—
—
1.5
5
—
—
ns
ns
tW
SWITCHING CHARACTERISTICS OVER OPERATING RANGE - MILITARY
FCT373T
FCT373AT
FCT373CT
Symbol
Parameter
Propagation Delay
DN to ON
Conditions (1)
CL = 50pF
Min (2)
Max.
Min (2)
Max.
Min (2)
Max.
Unit
.
.
.
tPLH
1.5
8.5
1.5
5.6
1.5
5.1
ns
tPHL
RL = 500Ω
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tSU
Propagation Delay
LE to ON
2
15
13.5
10
2
9.8
7.5
6.5
—
2
1.5
1.5
2
8
ns
ns
ns
ns
Output Enable Time
1.5
1.5
2
1.5
1.5
2
6.3
5.9
—
Output Disable Time
Set-up Time HIGH
or LOW, DN to LE
Hold Time HIGH
or LOW, DN to LE
LE Pulse Width HIGH (3)
—
tH
1.5
6
—
—
1.5
6
—
—
1.5
6
—
—
ns
ns
tW
NOTES:
1. See test circuit and wave forms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This parameter is guaranteed but not tested.
5
IDT54/74FCT373T/AT/CT
FASTCMOSOCTALTRANSPARENTLATCH
MILITARYANDINDUSTRIALTEMPERATURERANGES
TESTCIRCUITSANDWAVEFORMS
SWITCH POSITION
TEST CIRCUITS FOR ALL OUTPUTS
Test
Switch
Closed
Open
V CC
7.0V
Open Drain
Disable Low
Enable Low
All Other Tests
500Ω
500Ω
V OUT
VIN
Pulse
D.U.T.
Generator
8-link
50pF
DEFINITIONS:
L
T
C = Load capacitance: includes jig and probe capacitance.
R = Termination resistance: should be equal to Z
R
L
C
T
OUT
of the Pulse
Generator.
Octal link
PULSEWIDTH
SET-UP, HOLD, AND RELEASE TIMES
3V
1.5V
0V
DATA
INPUT
LOW-HIGH-LOW
PULSE
tH
tSU
1.5V
3V
1.5V
0V
TIMING
INPUT
tW
ASYNCHRONOUS CONTROL
tREM
PRESET
3V
CLEAR
ETC.
1.5V
0V
HIGH-LOW-HIGH
PULSE
1.5V
SYNCHRONOUS CONTROL
PRESET
3V
1.5V
0V
Octal link
CLEAR
CLOCK ENABLE
ETC.
tSU
tH
Octal link
PROPAGATIONDELAY
ENABLEANDDISABLETIMES
ENABLE
DISABLE
3V
3V
SAME PHASE
INPUT TRANSITION
1.5V
0V
CONTROL
INPUT
1.5V
0V
tPLH
tPHL
tPHL
tPZL
tPLZ
VOH
OUTPUT
3.5V
1.5V
3.5V
VOL
1.5V
VOL
OUTPUT
NORMALLY
LOW
SWITCH
CLOSED
tPLH
0.3V
0.3V
3V
tPZH
tPHZ
OPPOSITE PHASE
INPUT TRANSITION
1.5V
0V
VOH
OUTPUT
NORMALLY
HIGH
SWITCH
OPEN
1.5V
0V
Octal link
0V
Octal link
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-
HIGH
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns
6
IDT54/74FCT373T/AT/CT
FASTCMOSOCTALTRANSPARENTLATCH
MILITARYANDINDUSTRIALTEMPERATURERANGES
ORDERINGINFORMATION
XXXX
XX
X
IDT
XX
FCT
Package
Process
Device Type
Temp. Range
Blank
B
Industrial
MIL-STD-883, Class B
Industrial Options
SO
PY
Q
Small Outline IC (SO20-2)
Shrink Small Outline Package (SO20-7)
Quarter-size Small Outline Package (SO20-8)
Thin Shrink Small Outline Package (SO20-9)
PG
Military Options
D
E
L
CERDIP (D20-1)
CERPACK (E20-1)
Leadless Chip Carrier (L20-2)
Fast CMOS Octal Transparent Latch
373T
373AT
373CT
54
74
– 55°C to +125°C
– 40°C to +85°C
CORPORATE HEADQUARTERS
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The IDT logo is a registered trademark of Integrated Device Technology, Inc.
7
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