IDT7054L35GB [IDT]

HIGH-SPEED 4K x 8 FourPort STATIC RAM; HIGH -SPEED 4K ×8 FourPort静态RAM


型号：	IDT7054L35GB
厂家：	INTEGRATED DEVICE TECHNOLOGY
描述：	HIGH-SPEED 4K x 8 FourPort STATIC RAM HIGH -SPEED 4K ×8 FourPort静态RAM
文件：	总11页 (文件大小：100K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

IDT7054S/L

HIGH-SPEED

4K x 8 FourPort^TM

STATIC RAM

◆

TTL-compatible; single 5V (±10%) power supply

Available in 128 pin Thin Quad Flatpack and 108 pin PGA

packages

Industrial temperature range (–40°C to +85°C) is available

for selected speeds

ꢀeatures

High-speed access

◆

– Commercial:20/25/35ns (max.)

– Industrial:25ns (max.)

◆

– Military:25/35ns(max.)

Low-power operation

◆

Description

– IDT7054S

Active:750mW(typ.)

Standby: 7.5mW (typ.)

– IDT7054L

Active:750mW(typ.)

Standby: 1.5mW (typ.)

True FourPort memory cells which allow simultaneous

TheIDT7054isahigh-speed4Kx8FourPort™StaticRAMdesigned

to be used in systems where multiple access into a common RAM is

required.ThisFourPortStaticRAMoffersincreasedsystemperformance

inmultiprocessorsystemsthathaveaneedtocommunicateinrealtimeand

alsooffersaddedbenefitforhigh-speedsystemsinwhichmultipleaccess

is requiredinthe same cycle.

◆

access of the same memory locations

Fully asynchronous operation from each of the four ports:

P1, P2, P3, and P4

TheIDT7054is alsodesignedtobeusedinsystems whereon-chip

hardware port arbitration is not needed. This part lends itself to those

systems whichcannottoleratewaitstates oraredesignedtobeableto

◆

ꢀunctionalBlockDiagram

R/WP1

CEP1

R/WP4

CEP4

OEP1

OEP4

COLUMN

I/O

COLUMN

I/O0P1-I/O7P1

I/O0P4-I/O7P4

I/O

PORT 1

PORT 4

ADDRESS

DECODE

LOGIC

ADDRESS

DECODE

LOGIC

A0P1 - A11P1

A0P2 - A11P2

A0P4 - A11P4

MEMORY

ARRAY

PORT 2

ADDRESS

DECODE

LOGIC

PORT 3

ADDRESS

DECODE

LOGIC

A0P3 - A11P3

COLUMN

I/O

COLUMN

I/O

I/O0P2-I/O7P2

I/O0P3-I/O7P3

OEP2

OEP3

CEP2

CEP3

R/WP3

R/WP2

3241 drw 01

NOVEMBER 2001

DSC 3241/11

IDT7054S/L

High-Speed 4K x 8 FourPort™ Static RAM

Military, Industrial and Commercial Temperature Ranges

externallyarbitratedorwithstandcontentionwhenallportssimultaneously

accessthesameFourPortRAMlocation.

Fabricated using IDT’s CMOS high-performance technology, this

FourPortSRAMtypicallyoperatesononly750mWofpower.Low-power

TheIDT7054providesfourindependentportswithseparatecontrol, (L)versionsofferbatterybackupdataretentioncapability,witheachport

address,andI/Opinsthatpermitindependent, asynchronousaccessfor typicallyconsuming50µWfroma2Vbattery.

readsorwritestoanylocationinmemory.Itistheuser’sresponsibilityto

TheIDT7054ispackagedinaceramic108-pinPinGridArray(PGA)

ensuredataintegritywhensimultaneouslyaccessingthesamememory and a 128-pin Thin Quad Flatpack (TQFP). The military grade product

locationfromallports.Anautomaticpowerdownfeature,controlledbyCE, ismanufacturedincompliancewiththelatestrevisionofMIL-PRF-38535

permitstheon-chipcircuitryofeachporttoenteraverylowpowerstandby QML,makingitideallysuitedtomilitarytemperatureapplicationsdemand-

powermode.

ingthehighestlevelofperformanceandreliability.

PinConfigurations^(1,2,3)

11/14/01

IDT7054G

G108-1⁽⁴⁾

GND

108-Pin PGA

Top View⁽⁵⁾

100

102

GND

R/W

I/O

101

103

106

I/O

GND

104

105

I/O

GND

I/O

107

I/O

108

I/O

INDEX

NOTES:

3241 drw 02

1. All VCC pins must be connected to the power supply.

2. All GND pins must be connected to the ground supply.

3. Package body is approximately 1.21 in x 1.21 in x .16 in.

4. This package code is used to reference the package diagram.

5. This text does not indicate orientation of the actual part-marking.

6.42

IDT7054S/L

High-Speed 4K x 8 FourPort™ Static RAM

Military, Industrial and Commercial Temperature Ranges

Pin Configurations^(1,2,3)(con't.)

11/14/01

INDEX

R/WP3

N/C

102

101

100

CEP2

OEP2

N/C

A0P4

A1P4

A2P4

A3P4

A4P4

A5P4

A6P4

A10P4

GND

A7P4

A8P4

A9P4

A11P4

CEP4

R/WP4

OEP4

N/C

GND

N/C

I/O7P4

I/O6P4

I/O5P4

GND

I/O4P4

I/O3P4

I/O2P4

I/O1P4

A0P1

A1P1

A2P1

A3P1

A4P1

A5P1

A6P1

A10P1

A7P1

A8P1

A9P1

IDT7054PRF

PK128-1⁽⁴⁾

11P1

128-Pin TQFP

Top View⁽⁵⁾

R/WP1

OEP1

N/C

I/O

0P1

I/O1P1

I/O

2P1

3P1

GND

I/O

4P1

5P1

6P1

7P1

I/O

3241 drw 03

NOTES:

1. All VCC pins must be connected to the power supply.

2. All GND pins must be connected to the ground supply.

3. Package body is approximately 14mm x 20mm x 1.4mm.

4. This package code is used to reference the package diagram.

5. This text does not indicate orientation of the actual part-marking.

6.42

IDT7054S/L

High-Speed 4K x 8 FourPort™ Static RAM

Military, Industrial and Commercial Temperature Ranges

PinConfigurations^(1,2)

Capacitance⁽¹⁾

(TA = +25°C, f = 1.0MHz) TQꢀP ONLY

Symbol

Pin Name

Symbol

C^IN

Parameter

Conditions⁽²⁾

Max. Unit

A0 P1 - A11 P1

Address Lines - Port 1

Address Lines - Port 2

Address Lines - Port 3

Address Lines - Port 4

Data I/O - Port 1

Input Capacitance

V^IN= 0V

A0 P2 - A11 P2

A0 P3 - A11 P3

A0 P4 - A11 P4

I/O0 P1 - I/O7 P1

I/O0 P2 - I/O7 P2

I/O0 P3 - I/O7 P3

I/O0 P4 - I/O7 P4

R/W P1

Output

Capacitance

V^OUT= 0V

C^OUT

3241 tbl 03

NOTES:

1. This parameter is determined by device characterization but is not production

tested.

2. 3dV references the interpolated capacitance when the input and the output

signals switch from 0V to 3V or from 3V to 0V.

Data I/O - Port 2

Data I/O - Port 3

Data I/O - Port 4

Read/Write - Port 1

Read/Write - Port 2

Read/Write - Port 3

Read/Write - Port 4

Ground

MaximumOperatingTemperature

andSupplyVoltage⁽¹⁾

Ambient

R/W P2

R/W P3

Grade

Temperature

-55°C to +125°C

0^°C to +70^°C

GND

Vcc

R/W P4

5.0V 10%

Military

GND

5.0V 10%

Commercial

Industrial

Chip Enable - Port 1

Chip Enable - Port 2

Chip Enable - Port 3

Chip Enable - Port 4

Output Enable - Port 1

Output Enable - Port 2

Output Enable - Port 3

Output Enable - Port 4

Power

CE P1

5.0V 10%

-40°C to +85°C

CE P2

3241 tbl 04

NOTES:

CE P3

1. This is the parameter TA. This is the "instant on" case temperature.

CE P4

OE P1

OE P2

AbsoluteMaximumRatings⁽¹⁾

OE P3

OE P4

Symbol

Rating

Commercial

& Industrial

Military

Unit

VCC

(2)

V^TERM

Terminal Voltage

with Respect

to GND

-0.5 to +7.0

3241 tbl 01

NOTES:

1. All VCC pins must be connected to the power supply.

2. All GND pins must be connected to the ground supply.

T^BIAS

T^STG

Temperature

Under Bias

-55 to +125

-65 to +150

-65 to +135

-65 to +150

^oC

Storage

Temperature

RecommendedDCOperating

Conditions

I^OUT

DC Output Current

3241 tbl 05

NOTES:

Symbol

Parameter

Min.

Typ.

Max.

5.5

Unit

1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may

cause permanent damage to the device. This is a stress rating only and

functional operation of the device at these or any other conditions above those

indicated in the operational sections of this specification is not implied. Exposure

to absolute maximum rating conditions for extended periods may affect

reliability.

Supply Voltage

4.5

5.0

GND Ground

V^IH

V^IL

Input High Voltage

Input Low Voltage

2.2

6.0⁽²⁾

0.8

____

2. VTERM must not exceed Vcc + 10% for more than 25% of the cycle time or 10ns

maximum, and is limited to < 20mA for the period of VTERM > VCC + 10%.

-0.5⁽¹⁾

____

3241 tbl 02

NOTES:

1. VIL > -1.5V for pulse width less than 10ns.

2. VTERM must not exceed Vcc + 10%.

6.42

IDT7054S/L

High-Speed 4K x 8 FourPort™ Static RAM

Military, Industrial and Commercial Temperature Ranges

DC Electrical Characteristics Over the Operating

Temperature and Supply Voltage Range^(1,5)(VCC = 5.0V ± 10%)

7054X20

Com'l Only

7054X25

Com'l, Ind

& Military

7054X35

Com'l &

Military

Symbol

Parameter

Condition

Version

COM'L.

TYP.⁽²⁾

Max.

TYP.⁽²⁾

Max.

TYP.⁽²⁾

Max.

Unit

CC1

Operating Power

Supply Current

(All Ports Active)

150

300

250

150

300

250

150

300

250

CE = V

Outputs Disabled

(3)

f = 0

____

MIL. &

IND.

150

360

300

150

360

300

CC2

Dynamic Operating

Current

(All Ports Active)

COM'L.

240

210

370

325

225

195

350

305

210

180

335

290

CE = V

Outputs Disabled

(4)

f = f^MAX

____

MIL. &

IND.

225

195

400

340

210

180

395

330

I^SB

Standby Current

(All Ports - TTL Level

Inputs)

COM'L.

CE = VIH

(4)

f = f^MAX

____

MIL. &

IND.

115

110

I^SB1

Full Standby Current

(All Ports - All

CMOS Level Inputs)

All Ports

COM'L.

1.5

0.3

1.5

0.3

1.5

0.3

1.5

CE > V^CC- 0.2V

V^IN> V^CC- 0.2V or

V^IN< 0.2V, f = 0⁽³⁾

____

MIL. &

IND.

1.5

0.3

4.5

1.5

0.3

4.5

3241 tbl 06

NOTES:

1. 'X' in part number indicates power rating (S or L).

2. VCC = 5V, TA = +25°C and are not production tested.

3. f = 0 means no address or control lines change.

4. At f = fMAX, address and control lines (except Output Enable) are cycling at the maximum frequency read cycle of 1/tRC, and using “AC Test Conditions” of input

levels of GND to 3V.

5. For the case of one port, divide the appropriate current above by four.

DC Electrical Characteristics Over the Operating

Temperature and Supply Voltage Range (VCC = 5.0V ± 10%)

7054S

7054L

Symbol

|I^LI|

Parameter

Test Conditions

V^CC= 5.5V, V^IN= 0V to V^CC

CE = V^IH, V^OUT= 0V to V^CC

I^OL= 4mA

Min.

Max.

Min.

Max.

Unit

µA

(1)

___

Input Leakage Current

Output Leakage Current

Output Low Voltage

___

|I^LO|

V^OL

0.4

___

V^OH

Output High Voltage

I^OH= -4mA

2.4

2674 tbl 07

NOTE:

1. At Vcc < 2.0V input leakages are undefined.

6.42

IDT7054S/L

High-Speed 4K x 8 FourPort™ Static RAM

Military, Industrial and Commercial Temperature Ranges

AC Test Conditions

Input Pulse Levels

GND to 3.0V

3ns Max.

1.5V

Input Rise/Fall Times

Input Timing Reference Levels

Output Reference Levels

Output Load

1.5V

Figures 1 and 2

3241 tbl 08

893Ω

DATAOUT

5pF*

Ω

347

347Ω

30pF

3241 drw 04

Figure 2. Output Test Load

Figure 1. AC Output Test Load

(for tLZ, tHZ, tWZ, tOW)

*Including scope and jig

Timing Waveform of Read Cycle No. 1, Any Port⁽¹⁾

t_RC

ADDRESS

tAA

tOH

DATA_OUT

PREVIOUS DATA VALID

DATA VALID

3241 drw 05

NOTE:

1. R/W = VIH, OE = VIL, and CE = VIL.

6.42

IDT7054S/L

High-Speed 4K x 8 FourPort™ Static RAM

Military, Industrial and Commercial Temperature Ranges

AC Electrical Characteristics Over the

OperatingTemperatureandSupplyVoltage⁽³⁾

7054X20

Com'l Only

7054X25

Com'l, Ind

& Military

7054X35

Com'l &

Military

Symbol

Parameter

Min.

Max.

Min.

Max.

Min.

Max.

Unit

READ CYCLE

____

t^RC

t^AA

t^ACE

t^AOE

t^OH

t^LZ

Read Cycle Time

____

Address Access Time

Chip Enable Access Time

Output Enable Access Time

____

Output Hold from Address Change

Output Low-Z Time^(1,2)

____

Output High-Z Time^(1,2)

____

t^HZ

t^PU

t^PD

Chip Enable to Power Up Time⁽²⁾

Chip Disable to Power Down Time⁽²⁾

____

3241 tbl 09

NOTES:

1. Transition is measured 0mV from Low or High-impedance voltage with the Output Test Load (Figure 2).

2. This parameter is guaranteed by device characterization but is not production tested.

3. 'X' in part number indicates power rating (S or L).

Timing Waveform of Read Cycle No. 2, Any Port^{(1, 2)}

t_ACE

t_AOE

t_HZ

t_LZ

t_HZ

DATAOUT

VALID DATA

t_LZ

t_PU

tPD

I_CC

50%

CURRENT

50%

ISB

3241 drw 06

NOTES:

1. R/W = VIH for Read Cycles.

2. Addresses valid prior to or coincident with CE transition LOW.

6.42

IDT7054S/L

High-Speed 4K x 8 FourPort™ Static RAM

Military, Industrial and Commercial Temperature Ranges

AC Electrical Characteristics Over the

Operating TemperatureandSupplyVoltage⁽⁵⁾

7054X20

Com'l Only

7054X25

Com'l, Ind

& Military

7054X35

Com'l &

Military

Symbol

Parameter

Min.

Max.

Min.

Max.

Min.

Max.

Unit

WRITE CYCLE

____

t^WC

t^EW

t^AW

t^AS

Write Cycle Time

Chip Enable to End-of-Write

Address Valid to End-of-Write

Address Set-up Time

Write Pulse Width⁽³⁾

t^WP

t^WR

t^DW

t^HZ

Write Recovery Time

Data Valid to End-of-Write

Output High-Z Time^(1,2)

Data Hold Time

____

t^DH

(1,2)

____

t^WZ

t^OW

t^WDD

t^DDD

Write Enable to Output in High-Z

Output Active from End-of-Write^(1,2)

Write Pulse to Data Delay⁽⁴⁾

____

Write Data Valid to Read Data Delay⁽⁴⁾

____

3241 tbl 10

NOTES:

1. Transition is measured 0mV from Low or High-impedance voltage with the Output Test Load (Figure 2).

2. This parameter is guaranteed by device characterization but is not production tested.

3. If OE = VIL during a R/W controlled write cycle, the write pulse width must be the larger of tWP or (tWZ + tDW) to allow the I/O drivers to turn off data to be placed on

the bus for the required tDW. If OE = VIH during an R/W controlled write cycle, this requirement does not apply and the write pulse can be as short as the specified

tWP. Specified for OE = VIH (refer to “Timing Waveform of Write Cycle”, Note 8).

4. Port-to-port delay through RAM cells from writing port to reading port, refer to “Timing Waveform of Write with Port-to-Port Read”.

5. 'X' in part number indicates power rating.

6.42

IDT7054S/L

High-Speed 4K x 8 FourPort™ Static RAM

Military, Industrial and Commercial Temperature Ranges

Timing Waveform of Write Cycle No. 1, R/W Controlled Timing^(5,8)

tWC

ADDRESS

(6)

tAS

(3)

tWR

(7)

tHZ

(2)

tWP

R/W

(7)

tWZ

tHZ

tLZ

tOW

(4)

DATAOUT

tDH

tDW

DATA

3241 drw 07

Timing Waveform of Write Cycle No. 2, CE Controlled Timing^(1,5)

tWC

ADDRESS

tAW

(3)

(6)

(2)

tAS

tWR

tEW

R/W

tDW

tDH

DATAIN

3241 drw 08

NOTES:

1. R/W or CE = VIH during all address transitions.

2. A write occurs during the overlap (tEW or tWP) of a CE = VIL and a R/W = VIL.

3. tWR is measured from the earlier of CE or R/W = VIH to the end of write cycle.

4. During this period, the I/O pins are in the output state, and input signals must not be applied.

5. If the CE LOW transition occurs simultaneously with or after the R/W = VIL transition, the outputs remain in the High-impedance state.

6. Timing depends on which enable signal is asserted last, CE or R/W.

7. Transition is measured 0mV from Low or High-impedance voltage with the Output Test Load (Figure 2). This parameter is guaranteed but is not production tested.

8. If OE = VIL during a R/W controlled write cycle, the write pulse width must be the larger of tWP or (tWZ + tDW) to allow the I/O drivers to turn off data to be placed

on the bus for the required tDW. If OE = VIH during an R/W controlled write cycle, this requirement does not apply and the write pulse can be as short as the

specified tWP.

6.42

IDT7054S/L

High-Speed 4K x 8 FourPort™ Static RAM

Military, Industrial and Commercial Temperature Ranges

Timing Waveform of Write with Port-to-Port Read^{(1, 2)}

tWC

MATCH

ADDR"A"

tWP

R/W"A"

t_DW

VALID

t_DH

DATAIN"A"

ADDR_"B"

MATCH

tWDD

VALID

DATA"B"

tDDD

3241 drw 09

NOTES:

1. OE = VIL for the reading ports.

2. All timing is the same for left and right ports. Port "A" may be either of the four ports and Port "B" is any other port.

Table I Read/Write Control

Any Port⁽¹⁾

ꢀunctionalDescription

TheIDT7054providesfourportswithseparatecontrol,address,and

I/Opinsthatpermitindependentaccessforreadsorwritestoanylocation

in memory. These devices have an automatic power down feature

controlled by CE. The CE controls on-chip power down circuitry

thatpermitstherespectiveporttogointostandbymodewhennotselected

(CE = VIH). When a port is enabled, access to the entire memory array

ispermitted.EachporthasitsownOutputEnablecontrol(OE).Intheread

mode, the port’s OEturns onthe outputdrivers whensetLOW. READ/

WRITEconditionsareillustratedinthetable.

0-7

R/W

Function

Port Deselected: Power-Down

CE^P1=CE^P2=CE^P3=CE^P4=VIH

SB1

Power Down Mode I or I

DATA

Data on port written into memory⁽²⁾

Data in memory output on port

Outputs Disabled

OUT

DATA

3241 tbl 11

NOTES:

1. "H" = VIH, "L" = VIL, "X" = Don’t Care, "Z "= High Impedance

2. For valid write operation, no more than one port can write to the same address

location at the same time.

6.42

IDT7054S/L

High-Speed 4K x 8 FourPort™ Static RAM

Military, Industrial and Commercial Temperature Ranges

OrderingInformation

IDT

XXXX

999

Device

Type

Power

Speed

Package

Process/

Temperature

Range

Blank Commercial (0°C to +70°C)

I⁽¹⁾

Industrial (-40°C to +85°C)

Military (-55°C to +125°C)

Compliant to MIL-PRF-38535 QML

108-Pin Pin Grid Array (G108-1)

128-Pin Thin Quad Plastic Flatpack (PK128-1)

PRF

Commercial Only

Speed in

Commercial, Industrial & Military

nanoseconds

Commercial & Military

Low Power

Standard Power

32K (4K x 8) FourPort RAM

7054

3241 drw 10

NOTE:

1. Industrial temperature range is available.

For other speeds, packages and powers contact your sales office.

DatasheetDocumentHistory

1/18/99:

Initiateddatasheetdocumenthistory

Convertedtonewformat

Cosmetictypographicalcorrections

Addedadditionalnotestopinconfigurations

Changeddrawingformat

6/4/99:

Page 1 CorrectedDSCnumber

RemovedPreliminary

9/1/99:

11/10/99:

5/23/00:

Replaced IDT logo

Page 4 Increasedstoragetemperatureparameter

ClarifiedTAparameter

Page 5 DCElectricalparameters–changedwordingfrom"open"to"disabled"

Changed±200mVto0mVinnotes

10/22/01:

Page 2 & 3 Added date revision for pin configurations

Page 5, 7& 8 AddedIndustrialtemptocolumnheadingfor25ns speedtoDC&ACElectricalCharacteristics

Page 11 AddedIndustrialtempofferingto25nsorderinginformation

Page 4, 5, 7& 8 RemovedIndustrialtempfootnote fromalltables

Page 6 Changed 5ns to 3ns in AC Test Conditions table

Page 1 & 11 Replace ^TMlogo with ® logo

CORPORATE HEADQUARTERS

2975StenderWay

Santa Clara, CA 95054

for SALES:

for Tech Support:

831-754-4613

DualPortHelp@idt.com

800-345-7015 or 408-727-6116

fax: 408-492-8674

www.idt.com

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

6.42

IDT7054L35GB [IDT]

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