IDT71256SA20SOG18 [IDT]
Standard SRAM, 32KX8, 20ns, CMOS, PDSO28, 0.300 INCH, ROHS COMPLIANT, SOIC-28;
| 型号： | IDT71256SA20SOG18 |
| 厂家： | 
INTEGRATED DEVICE TECHNOLOGY |
| 描述： | Standard SRAM, 32KX8, 20ns, CMOS, PDSO28, 0.300 INCH, ROHS COMPLIANT, SOIC-28 静态存储器 光电二极管 |
| 文件： | 总8页 (文件大小：84K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CMOS Static RAM
for Automotive Applications
IDT71256SA
256K (32K x 8-Bit)
Features
Description
◆
32K x 8 advanced high-speed CMOS static RAM
TheIDT71256SA isa262,144-bithigh-speedStaticRAMorganized
as32Kx8.ItisfabricatedusingIDT’shigh-perfomance,high-reliability
CMOS technology. This state-of-the-art technology, combined with
innovativecircuitdesigntechniques,providesacost-effectivesolutionfor
high-speedmemoryneedsforautomotiveapplications.
◆
Automotive temperature options
Equal access and cycle times
◆
– Automotive:12/15/20/25/35/55ns
One Chip Select plus one Output Enable pin
Bidirectional data inputs and outputs directly
◆
◆
TheIDT71256SAhasanoutputenablepinwhichoperatesasfastas
6ns,withaddress accesstimesasfastas12ns. Allbidirectionalinputsand
outputsoftheIDT71256SA areTTL-compatibleandoperationisfroma
single5Vsupply. Fullystaticasynchronouscircuitryisused,requiringno
clocksorrefreshforoperation.
TTL-compatible
Low power consumption via chip deselect
Automotive product available in 28-pin, 300 mil (SOIC)
◆
◆
package
The IDT71256SA is packaged in 28-pin, 300 mil (SOIC).
FunctionalBlockDiagram
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
262,144-BIT
MEMORY
ARRAY
ADDRESS
DECODER
A
A
A
A
A
10
11
12
13
14
,
8
8
I/O0 - I/O
7
I/O CONTROL
6819 drw 01
CS
WE
OE
CONTROL
LOGIC
FEBRUARY 2006
1
DSC-6819/0B
©2006IntegratedDeviceTechnology,Inc.
IDT71256SA for Automotive Applications
CMOS Static RAM 256K (32K x 8-Bit)
Automotive Temperature Ranges
Truth Table(1,2)
PinConfigurations
Function
DATAOUT Read Data
DATAIN Write Data
High-Z Outputs Disabled
High-Z Deselected - Standby (ISB
High-Z Deselected - Standby (ISB1)
I/O
CS
OE
WE
1
V
WE
A
A
A
A
OE
A
CS
I/O
I/O
I/O
I/O
I/O
CC
28
27
A
A
A
14
12
L
L
H
2
3
7
6
26
25
24
13
L
X
H
X
X
L
4
A
8
L
H
5
A
A
A
A
A
5
4
3
2
1
0
0
1
2
9
6
11
23
22
H
X
)
SO28-5
P28-2
P28-1
7
(3)
HC
V
X
8
21
20
10
9
6819 tbl 03
NOTES:
10
11
12
13
14
A
19
18
7
1. H = VIH, L = VIL, x = Don't care.
2. VLC = 0.2V, VHC = VCC –0.2V.
3. Other inputs ≥VHC or ≤VLC.
I/O
I/O
I/O
6
5
4
3
17
16
15
GND
RecommendedOperating
,
TemperatureandSupplyVoltage
6819 drw 02
DIP/SOJ
Grade
Temperature
-40°C to +125°C
-40°C to +105°C
-40°C to +85°C
0°C to +70°C
VSS
VDD
Top View
Automotive Grade 1
Automotive Grade 2
Automotive Grade 3
Automotive Grade 4
0V
0V
0V
0V
See Below
See Below
See Below
22
23
24
25
26
27
28
1
21
20
19
18
17
16
15
14
13
12
11
10
9
A
10
OE
CS
I/O
I/O
I/O
I/O
I/O
A
11
7
6
5
4
3
A
A
9
8
See Below
A
13
WE
6819 tbl 01
V
CC
SO28-8
A
A
14
12
GND
RecommendedDCOperating
Conditions
2
I/O
I/O
I/O
A
A
A
2
1
0
,
3
A
A
A
A
A
7
6
5
4
3
4
Symbol
Parameter
Min. Typ.
Max.
Unit
V
5
0
1
2
6
VCC
Supply Voltage
4.5
0
5.0
5.5
0
7
8
GND Ground
0
V
6819 drw 02a
____
TSOP
V
IH
Input High Voltage
Input Low Voltage
2.2
V
CC +0.5 (1)
V
Top View
VIL
-0.5(1)
0.8
V
____
6819 tbl 04
AbsoluteMaximumRatings(1)
NOTE:
1. Refer to maximum overshoot/undershoot diagram below. The measured
voltage at device pin should not exceed half sinusoidal wave with 2V peak and
half period of 2ns.
Symbol
Rating
Value
Unit
VCC
Supply Voltage
Relative to GND
-0.5 to +7.0
V
MaximumOvershoot/Undershoot
VTERM
Terminal Voltage
Relative to GND
-0.5 to VCC+0.5
V
+2V
T
BIAS
Temperature Under Bias
Junction Temperature Range
Storage Temperature
Power Dissipation
-55 to +125
-40 to +150
-65 to +150
1.0
oC
oC
V
IH
2ns
TJ
TSTG
oC
2ns
VIL
P
T
W
-2V
6819 drw 10
IOUT
DC Output Current
50
mA
6819 tbl 02
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS
may cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any other conditions above those
indicated in the operational sections of this specification is not implied. Exposure
to absolute maximum rating conditions for extended periods may affect
reliability.
2
IDT71256SA for Automotive Applications
CMOS Static RAM 256K (32K x 8-Bit)
Automotive Temperature Ranges
DC Electrical Characteristics
(VCC = 5.0V ± 10%, Automotive Temperature Ranges)
IDT71256SA
Symbol
Parameter
Input Leakage Current
Output Leakage Current
Output Low Voltage
Test Conditions
CC = Max., VIN = GND to VCC
CC = Max., CS = VIH, VOUT = GND to VCC
OL = 8mA, VCC = Min.
OH = -4mA, VCC = Min.
Min.
Max.
5
Unit
µA
µA
V
___
|ILI|
V
___
___
|ILO
|
V
5
VOL
I
0.4
___
VOH
Output High Voltage
I
2.4
V
6819 tbl 05
DCElectricalCharacteristics(1)
(VCC = 5.0V ± 10%, VLC = 0.2V, VHC = VCC–0.2V, Automotive Temperature Ranges)
Symbol
Parameter
71256SA12 71256SA15 71256SA20 71256SA25 71256SA35 71256SA55
Unit
Dynamic Operating Current
CS < VIL, Outputs Open, VCC = Max., f = fMAX
Icc
90
50
80
30
70
20
70
20
70
20
70
20
mA
(2)
Standby Power Supply Current (TTL Level)
CS > VIH, Outputs Open, VCC = Max., f = fMAX
ISB
mA
(2)
Standby Power Supply Current (CMOS Level)
I
SB
1
CS > VHC, Outputs Open, VCC = Max., f = 0(2),
VIN < VLC or VIN > VHC
15
15
15
15
15
15
mA
6819 tbl 10
NOTES:
1. All values are maximum guaranteed values.
2. fMAX = 1/tRC (all address inputs are cycling at fMAX); f = 0 means no address input lines are changing.
Capacitance
AC Test Conditions
Input Pulse Levels
(TA = +25°C, f = 1.0MHz, SOJ package)
GND to 3.0V
Symbol
Parameter(1)
Input Capacitance
I/O Capacitance
Conditions
IN = 3dV
OUT = 3dV
Max.
Unit
Input Rise/Fall Times
3ns
1.5V
CIN
V
7
pF
Input Timing Reference Levels
Output Reference Levels
AC Test Load
CI/O
V
7
pF
1.5V
6819 tbl 08
See Figures 1 and 2
NOTE:
6819 tbl 07
1. This parameter is guaranteed by device characterization, but not production
tested.
5V
5V
480Ω
480Ω
OUT
OUT
DATA
DATA
255Ω
255Ω
5pF*
30pF*
.
,
6819 drw 03
Figure 1. AC Test Load
6819 drw 04
Figure 2. AC Test Load
(for tCLZ, tOLZ, tCHZ, tOHZ, tOW, and tWHZ)
*Including jig and scope capacitance.
6.42
3
IDT71256SA for Automotive Applications
CMOS Static RAM 256K (32K x 8-Bit)
Automotive Temperature Ranges
AC Electrical Characteristics (VCC = 5.0V ± 10%, Automotive Temperature Ranges)
71256SA12
Min. Max.
71256SA15
Min. Max.
71256SA20
Min. Max.
71256SA25
Min. Max.
71256SA35
Min. Max.
71256SA55
Min. Max.
Symbol
Parameter
Unit
Read Cycle
____
____
____
____
____
____
t
RC
AA
ACS
Read Cycle Time
12
15
20
25
35
55
ns
ns
ns
____
____
____
____
____
____
t
Address Access Time
12
15
20
25
35
55
____
____
____
____
____
____
t
Chip Select Access Time
Chip Select to Output in Low-Z
12
15
20
25
35
55
____
____
____
____
____
____
(1)
CLZ
4
4
4
4
4
4
ns
ns
ns
ns
ns
ns
ns
ns
t
(1)
Chip Select to Output in High-Z
Output Enable to Output Valid
0
6
0
7
0
10
0
11
0
12
0
15
tCHZ
____
____
____
____
____
____
tOE
6
7
10
11
12
25
____
____
____
____
____
____
(1)
(1)
Output Enable to Output in Low-Z
Output Disable to Output in High-Z
Output Hold from Address Change
Chip Select to Power Up Time
Chip Deselect to Power Down Time
0
0
3
0
0
3
0
0
3
0
0
3
0
0
3
0
0
3
tOLZ
6
6
8
10
12
15
tOHZ
____
____
____
____
____
____
tOH
____
____
____
____
____
____
(1)
PU
0
0
0
0
0
0
t
(1)
PD
____
____
____
____
____
____
12
15
20
25
35
55
t
Write Cycle
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
t
WC
AW
CW
AS
WP
WR
DW
DH
Write Cycle Time
12
9
15
10
10
0
20
15
15
0
25
20
20
0
35
25
25
0
55
40
40
0
ns
ns
ns
ns
ns
ns
ns
ns
t
Address Valid to End-of-Write
Chip Select to End-of-Write
Address Set-up Time
Write Pulse Width
t
9
t
0
t
8
10
0
15
0
20
0
20
0
35
0
t
Write Recovery Time
Data Valid to End-of-Write
Data Hold Time
0
t
6
7
11
0
13
0
13
0
25
0
t
0
0
(1)
OW
____
____
____
____
____
____
Output Active from End-of-Write
Write Enable to Output in High-Z
4
0
4
0
4
0
4
0
4
0
4
0
ns
t
(1)
WHZ
6
6
10
11
12
15
ns
t
6819 tbl 09
NOTE:
1. This parameter is guaranteed with the AC Load (Figure 2) by device characterization, but is not production tested.
4
IDT71256SA for Automotive Applications
CMOS Static RAM 256K (32K x 8-Bit)
Automotive Temperature Ranges
Timing Waveform of Read Cycle No. 1(1)
t
RC
ADDRESS
t
AA
OE
t
OE
(5)
t
OLZ
(5)
CS
(5)
(3)
t
OHZ
(5)
t
ACS
t
CLZ
t
CHZ
HIGH IMPEDANCE
DATAOUT
DATA OUT VALID
t
PD
t
PU
I
I
CC
SB
V
CC SUPPLY
CURRENT
6819 drw 05
,
Timing Waveform of Read Cycle No. 2(1,2,4)
t
RC
ADDRESS
tAA
t
OH
tOH
DATAOUT VALID
DATAOUT
PREVIOUS DATAOUT VALID
6819drw 06
,
NOTES:
1. WE is HIGH for Read Cycle.
2. Device is continuously selected, CS is LOW.
3. Address must be valid prior to or coincident with the later of CS transition LOW; otherwise tAA is the limiting parameter.
4. OE is LOW.
5. Transition is measured ±200mV from steady state.
6.42
5
IDT71256SA for Automotive Applications
CMOS Static RAM 256K (32K x 8-Bit)
Automotive Temperature Ranges
Timing Waveform of Write Cycle No. 1 (WE Controlled Timing)(1,2,4)
t
WC
ADDRESS
t
AW
CS
(2)
t
WR
t
AS
t
WP
WE
(5)
CHZ
(5)
t
t
WHZ
(5)
OW
t
HIGH IMPEDANCE
(3)
(3)
DATAOUT
DATAIN
t
DH
tDW
DATAIN VALID
6819 drw 07
,
Timing Waveform of Write Cycle No. 2 (CS Controlled Timing)(1,4)
t
WC
ADDRESS
t
AW
CS
t
WR
t
CW
t
AS
WE
t
DW
t
DH
DATAIN
DATAIN VALID
6819 drw 08
,
NOTES:
1. A write occurs during the overlap of a LOW CS and a LOW WE.
2. OE is continuously HIGH. If during a WE controlled write cycle OE is LOW, tWP must be greater than or equal to tWHZ + tDW to allow the I/O drivers to turn off and data
to be placed on the bus for the required tDW. If OE is HIGH during a WE controlled write cycle, this requirement does not apply and the minimum write pulse is as
short as the specified tWP.
3. During this period, I/O pins are in the output state, and input signals must not be applied.
4. If the CS LOW transition occurs simultaneously with or after the WE LOW transition, the outputs remain in a high-impedance state.
5. Transition is measured ±200mV from steady state.
6
IDT71256SA for Automotive Applications
CMOS Static RAM 256K (32K x 8-Bit)
Automotive Temperature Ranges
Ordering Information — Automotive
IDT 71256
SA
XX
XXX
X
X
Process/
Device
Type
Power
Speed
Package
Temperature
Range
1
2
3
4
Automotive Grade 1 (-40°C to +125°C)
Automotive Grade 2 (-40°C to +105°C)
Automotive Grade 3 (-40°C to +85°C)
Automotive Grade 4 (0°C to +70°C)
Restricted hazardous substance device
G
300-mil SOIC (PS28)
SO
12
15
20
25
35
55
*
Speed in nanoseconds
6819 drw 09
*Only offered in Grades 3 and 4
6.42
7
IDT71256SA for Automotive Applications
CMOS Static RAM 256K (32K x 8-Bit)
Automotive Temperature Ranges
DatasheetDocumentHistory
Rev
0
Date
Page
Description
01/31/05
05/06/05
02/28/06
p. 1-7
p. 7
p. 1,3,4,7
ReleasedAutomotivedatasheet
Updatedorderinginformation.
Added 35ns speed grade.
A
B
CORPORATE HEADQUARTERS
6024 Silver Creek Valley Road
San Jose, CA 95138
for SALES:
for Tech Support:
sramhelp@idt.com
800-345-7015
800-345-7015 or
408-284-8200
fax: 408-284-2775
www.idt.com
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
8
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