IDT74FCT139CTQ [IDT]
FAST CMOS DUAL 1-OF-4 DECODER WITH ENABLE; FAST CMOS双1 - OF- 4解码器启用
| 型号： | IDT74FCT139CTQ |
| 厂家： | 
INTEGRATED DEVICE TECHNOLOGY |
| 描述： | FAST CMOS DUAL 1-OF-4 DECODER WITH ENABLE |
| 文件： | 总5页 (文件大小：107K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
IDT54/74FCT139T/AT/CT
FAST CMOS DUAL
1-OF-4 DECODER
WITH ENABLE
Integrated Device Technology, Inc.
FEATURES:
• Std., A and C speed grades
• Low input and output leakage ≤1µA (max.)
• CMOS power levels
• True TTL input and output compatibility
– VOH = 3.3V (typ.)
DESCRIPTION:
The IDT54/74FCT139T/AT/CT are dual 1-of-4 decoders
built using an advanced dual metal CMOS technology. These
devices have two independent decoders, each of which
accept two binary weighted inputs (A0-A1) and provide four
mutually exclusive active LOW outputs (O0-O3). Each de-
coder has an active LOW enable (E). When E is HIGH, all
outputs are forced HIGH.
– VOL = 0.3V (typ.)
• High drive outputs (-15mA IOH, 48mA IOL)
• Meets or exceeds JEDEC standard 18 specifications
• Product available in Radiation Tolerant and Radiation
Enhanced versions
• Military product compliant to MIL-STD-883, Class B
and DESC listed (dual marked)
• Available in DIP, SOIC, QSOP, CERPACK and
LCC packages
FUNCTIONAL BLOCK DIAGRAM
PIN CONFIGURATIONS
E
a
1
16
15
14
13
12
11
10
9
V
E
A
A
CC
b
Ea
A0a
A1a
Eb
A0b
A1b
A
A
0a
1a
2
3
4
P16-1
D16-1
SO16-1
SO16-7
&
0b
1b
O
O
O
0a
1a
2a
5
6
7
8
O
0b
O
O
O
1b
2b
3b
E16-1
O
3a
GND
2566 drw 02
DIP/SOIC/QSOP/CERPACK
TOP VIEW
INDEX
O0a
O1a
O2a
O3a
O0b
O1b
O2b
O3b
2566 drw 01
3
2
20 19
1
A1a
4
5
6
7
8
18
A0b
O0a
17
16
15
14
A1b
NC
O0b
O1b
NC
O1a
O2a
L20-2
9 10 11 12 13
2566 drw 03
LCC
TOP VIEW
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
APRIL 1995
1995 Integrated Device Technology, Inc.
6.4
DSC-4218/3
1
IDT54/74FCT139T/AT/CT
MILITARY AND COMMERCIAL TEMPERATURE RANGES
FAST CMOS DUAL 1-OF-4 DECODER WITH ENABLE
ABSOLUTE MAXIMUM RATINGS(1)
PIN DESCRIPTION
Symbol
Rating
Commercial
Military
Unit
Pin Names
A0, A1
Description
Address Inputs
(2)
VTERM
Terminal Voltage
with Respect to
GND
–0.5 to +7.0 –0.5 to +7.0
V
E
Enable Input (Active LOW)
Outputs (Active LOW)
O0 - O3
(3)
VTERM
Terminal Voltage
with Respect to
GND
–0.5 to
VCC +0.5
–0.5 to
VCC +0.5
V
2566 tbl 01
FUNCTION TABLE(1)
TA
Operating
0 to +70
–55 to +125 °C
Temperature
Temperature
Under Bias
Storage
Temperature
Power Dissipation
Inputs
Outputs
TBIAS
TSTG
–55 to +125 –65 to +135 °C
–55 to +125 –65 to +150 °C
A0
X
L
A1
X
L
0
O
1
O
2
O
3
O
E
H
H
H
H
H
L
L
H
L
H
H
L
H
PT
0.5
0.5
W
L
H
L
L
H
H
H
H
IOUT
DC Output
Current
–60 to +120 –60 to +120 mA
L
L
H
H
H
H
H
H
H
L
2566 lnk 03
NOTES:
NOTE:
2566 tbl 02
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT-
INGS may cause permanent damage to the device. This is a stress rating
onlyandfunctionaloperationofthedeviceattheseoranyotherconditions
above those indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability. No terminal voltage may exceed
VCC by +0.5V unless otherwise noted.
1. H = HIGH Voltage Level; L = LOW Voltage Level; X = Don’t Care
CAPACITANCE (TA = +25°C, f = 1.0MHz)
Symbol
Parameter(1)
Conditions Typ. Max. Unit
CIN
Input
Capacitance
Output
VIN = 0V
6
8
10
pF
2. Input and VCC terminals only.
3. Outputs and I/O terminals only.
COUT
VOUT = 0V
12
pF
Capacitance
2566 lnk 04
NOTE:
1. This parameter is measured at characterization but not tested.
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Commercial: TA = 0°C to +70°C, VCC = 5.0V ± 5%; Military: TA = –55°C to +125°C, VCC = 5.0V ± 10%
Symbol
Parameter
Input HIGH Level
Test Conditions(1)
Min. Typ.(2) Max.
Unit
VIH
Guaranteed Logic HIGH Level
2.0
—
—
—
—
0.8
±1
V
VIL
II H
II L
Input LOW Level
Guaranteed Logic LOW Level
V
µA
µA
µA
V
Input HIGH Current(4)
Input LOW Current(4)
Input HIGH Current(4)
Clamp Diode Voltage
Short Circuit Current
Output HIGH Voltage
VCC = Max.
VCC = Max.
VI = 2.7V
VI = 0.5V
—
—
—
—
±1
II
VCC = Max., VI = VCC (Max.)
VCC = Min., IN = –18mA
VCC = Max.(3), VO = GND
—
—
±1
VIK
IOS
VOH
—
–0.7
–1.2
–60
2.4
–120 –225
mA
V
VCC = Min.
IOH = –6mA MIL.
3.3
3.0
0.3
—
VIN = VIH or VIL
IOH = –8mA COM'L.
IOH = –12mA MIL.
IOH = –15mA COM'L.
IOL = 32mA MIL.
2.0
—
—
V
V
VOL
Output LOW Voltage
VCC = Min.
0.5
VIN = VIH or VIL
IOL = 48mA COM'L.
VH
Input Hysteresis
—
—
—
200
—
1
mV
mA
ICC
Quiescent Power Supply Current
VCC = Max.
0.01
VIN = GND or VCC
NOTES:
2566 tbl 05
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient and maximum loading.
3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second.
4. The test limit for this parameter is ±5µA at TA = –55°C.
6.4
2
IDT54/74FCT139T/AT/CT
FAST CMOS DUAL 1-OF-4 DECODER WITH ENABLE
MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
Symbol
Parameter
Quiescent Power Supply Current
TTL Inputs HIGH
Test Conditions(1)
Min. Typ.(2) Max.
Unit
∆ICC
VCC = Max.
VIN = 3.4V(3)
VCC = Max.
Outputs Open
—
0.5
2.0
mA
ICCD
IC
Dynamic Power Supply
Current(4)
VIN = VCC
VIN = GND
—
0.15
0.3
mA/
MHz
One Bit Toggling
50% Duty Cycle
VCC = Max.
Total Power Supply Current(6)
VIN = VCC
VIN = GND
—
—
—
—
1.5
1.8
3.0
3.5
4.0
5.0
mA
Outputs Open
fo = 10MHz
50% Duty Cycle
One Input and
One Output Toggling
VCC = Max.
VIN = 3.4V
VIN = GND
VIN = VCC
VIN = GND
7.0(5)
9.0(5)
Outputs Open
fo = 10MHz
50% Duty Cycle
One Input Toggling
on Each Decoder
Two Outputs Toggling
VIN = 3.4V
VIN = GND
2566 tbl 06
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fONO)
ICC = Quiescent Current
∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
fO = Output Frequency
NO = Number of Outputs at fO
All currents are in milliamps and all frequencies are in megahertz.
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
FCT139T
Com'l.
Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max.
FCT139AT
FCT139CT
Mil.
Com'l. Mil.
Com'l. Mil.
Parameter
tPLH
Description
Propagation Delay
A0 or A1 to On
Condition(1)
CL = 50pF
RL = 500Ω
Unit
1.5 9.0 1.5 12.0 1.5 5.9 1.5 7.8 1.5 5.0 1.5 6.2 ns
tPHL
tPLH
tPHL
Propagation Delay
E to On
1.5 8.0 1.5 9.0 1.5 5.5 1.5 7.2 1.5 4.8 1.5 5.8 ns
NOTES:
2566 tbl 07
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
6.4
3
IDT54/74FCT139T/AT/CT
MILITARY AND COMMERCIAL TEMPERATURE RANGES
FAST CMOS DUAL 1-OF-4 DECODER WITH ENABLE
TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS
SWITCH POSITION
Test
Switch
VCC
Open Drain
Disable Low
7.0V
Closed
500
Ω
Ω
Enable Low
VOUT
Open
VIN
All Other Tests
2566 lnk 08
Pulse
Generator
DEFINITIONS:
CL= Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse
D.U.T.
50pF
500
Generator.
T
R
C
L
2566 drw 04
SET-UP, HOLD AND RELEASE TIMES
PULSE WIDTH
3V
DATA
1.5V
0V
INPUT
LOW-HIGH-LOW
PULSE
tH
tSU
1.5V
3V
1.5V
0V
TIMING
INPUT
tW
ASYNCHRONOUS CONTROL
tREM
PRESET
3V
1.5V
0V
CLEAR
HIGH-LOW-HIGH
PULSE
1.5V
ETC.
SYNCHRONOUS CONTROL
PRESET
3V
2566 drw 06
1.5V
0V
CLEAR
tSU
tH
CLOCK ENABLE
ETC.
2566 drw 05
PROPAGATION DELAY
ENABLE AND DISABLE TIMES
ENABLE
DISABLE
3V
1.5V
0V
3V
SAME PHASE
CONTROL
INPUT
1.5V
0V
INPUT TRANSITION
t
PLH
t
PHL
PHL
t
PZL
tPLZ
VOH
OUTPUT
3.5V
1.5V
3.5V
1.5V
OUTPUT
NORMALLY
LOW
SWITCH
CLOSED
VOL
tPLH
t
0.3V
0.3V
VOL
3V
1.5V
0V
tPZH
tPHZ
OPPOSITE PHASE
INPUT TRANSITION
VOH
OUTPUT
NORMALLY
HIGH
SWITCH
OPEN
1.5V
0V
2566 drw 07
0V
2566 drw 08
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-
HIGH
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns
6.4
4
IDT54/74FCT139T/AT/CT
FAST CMOS DUAL 1-OF-4 DECODER WITH ENABLE
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ORDERING INFORMATION
IDT
XX
X
XXXX
X
X
FCT
Temp. Range
Family
Device Type
Package
Process
Blank
B
Commercial
MIL-STD-883, Class B
P
Plastic DIP
D
CERDIP
SO
L
E
Small Outline IC
Leadless Chip Carrier
CERPACK
Q
Quarter-size Small Outline Package
139T
Dual 1-of-4 Decoder
139AT
139CT
Blank
High Drive
54
74
–55°C to +125°C
0°C to +70°C
2566 drw 09
6.4
5
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