IDT74FCT16260ATPVB [IDT]
FAST CMOS 12-BIT TRI-PORT BUS EXCHANGER; FAST CMOS 12位TRI -PORT总线交换器
| 型号： | IDT74FCT16260ATPVB |
| 厂家： | 
INTEGRATED DEVICE TECHNOLOGY |
| 描述： | FAST CMOS 12-BIT TRI-PORT BUS EXCHANGER |
| 文件： | 总8页 (文件大小：136K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
IDT54/74FCT16260AT/CT/ET
IDT54/74FCT162260AT/CT/ET
FAST CMOS
12-BIT TRI-PORT
BUS EXCHANGER
Integrated Device Technology, Inc.
FEATURES:
• Common features:
– 0.5 MICRON CMOS Technology
– High-speed, low-power CMOS replacement for
ABT functions
– Typical tSK(o) (Output Skew) < 250ps
– Low input and output leakage ≤1µA (max.)
– ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
– Packages include 25 mil pitch SSOP, 19.6 mil pitch
TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch Cerpack
– Extended commercial range of -40°C to +85°C
– VCC = 5V ±10%
• Features for FCT16260AT/CT/ET:
– High drive outputs (-32mA IOH, 64mA IOL)
– Power off disable outputs permit “live insertion”
– Typical VOLP (Output Ground Bounce) < 1.0V at
VCC = 5V, TA = 25°C
DESCRIPTION:
The FCT16260AT/CT/ET and the FCT162260AT/CT/ET
Tri-Port Bus Exchangers are high-speed 12-bit latched bus
multiplexers/transceivers for use in high-speed microproces-
sor applications. These Bus Exchangers support memory
interleaving with latched outputs on the B ports and address
multiplexing with latched inputs on the B ports.
The Tri-Port Bus Exchanger has three 12-bit ports. Data
may be transferred between the A port and either/both of the
B ports. The latch enable (LE1B, LE2B, LEA1B and LEA2B)
inputs control data storage. When a latch-enable input is
HIGH, the latch is transparent. When a latch-enable input is
LOW, the data at the input is latched and remains latched until
the latch enable input is returned HIGH. Independent output
enables (OE1B and OE2B) allow reading from one port while
writing to the other port.
The FCT16260AT/CT/ET are ideally suited for driving high
capacitance loads and low impedance backplanes. The
output buffers are designed with power off disable capability
to allow "live insertion" of boards when used as backplane
drivers.
• Features for FCT162260AT/CT/ET:
– Balanced Output Drivers: ±24mA (commercial),
±16mA (military)
The FCT162260AT/CT/ET have balanced output drive
with current limiting resistors. This offers low ground bounce,
minimal undershoot, and controlled output fall times - reduc-
ing the need for external series terminating resistors.
– Reduced system switching noise
– Typical VOLP (Output Ground Bounce) < 0.6V at
VCC = 5V,TA = 25°C
FUNCTIONAL BLOCK DIAGRAM
OE1B
LEA1B
A-1B
LATCH
1B1:12
12
LE1B
12
1B-A
LATCH
12
12
SEL
OEA
1
0
M
U
X
A1:12
12
12
12
2B-A
LATCH
LE2B
12
A-2B
LATCH
2B1:12
LEA2B
OE2B
12
3032 drw 01
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
AUGUST 1996
1996 Integrated Device Technology, Inc.
5.4
DSC-3032/6
1
IDT54/74FCT16260AT/CT/ET, 162260AT/CT/ET
FAST CMOS 12-BIT TRI-PORT BUS EXCHANGER
MILITARY AND COMMERCIAL TEMPERATURES RANGES
PIN CONFIGURATIONS
OEA
LE1B
2B3
GND
2B2
2B1
VCC
A1
1
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
OE2B
LEA2B
2B4
OEA
LE1B
2B3
GND
2B2
2B1
VCC
A1
1
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
OE2B
2
2
LEA2B
2B4
3
3
4
GND
2B5
4
GND
2B5
5
5
6
2B6
6
2B6
7
VCC
7
VCC
2B7
8
2B7
8
A2
9
2B8
A2
9
2B8
A3
10
11
12
13
2B9
A3
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
2B9
GND
A4
GND
2B10
2B11
2B12
1B12
1B11
1B10
GND
1B9
GND
A4
GND
2B10
2B11
2B12
1B12
1B11
1B10
GND
1B9
A5
A5
A6
14 SO56-1
SO56-2
15 SO56-3
A6
E56-1
A7
A7
A8
16
17
18
19
20
21
22
23
24
25
26
A8
A9
A9
GND
A10
A11
A12
VCC
1B1
1B2
GND
A10
A11
A12
VCC
1B1
1B2
GND
1B3
1B8
1B8
1B7
1B7
VCC
VCC
1B6
1B6
1B5
1B5
GND
1B3
GND
1B4
GND
1B4
27
28
LE2B
SEL
LEA1B
OE1B
LE2B
SEL
LEA1B
OE1B
SSOP/
TSSOP/TVSOP
TOP VIEW
CERPACK
TOP VIEW
3032 drw 02
3032 drw 03
5.4
2
IDT54/74FCT16260AT/CT/ET, 162260AT/CT/ET
FAST CMOS 12-BIT TRI-PORT BUS EXCHANGER
MILITARY AND COMMERCIAL TEMPERATURES RANGES
PIN DESCRIPTION
Signal
A(1:12)
I/O
I/O
I/O
I/O
I
Description
Bidirectional Data Port A. Usually connected to the CPU's Address/Data bus.
Bidirectional Data Port 1B. Connected to the even path or even bank of memory.
Bidirectional Data Port 2B. Connected to the odd path or odd bank of memory.
1B(1:12)
2B(1:12)
LEA1B
LEA2B
LE1B
LE2B
SEL
Latch Enable Input for A-1B Latch. The Latch is open when LEA1B is HIGH. Data from the A-port is latched on
the HIGH to LOW transition of LEA1B.
I
I
I
I
Latch Enable Input for A-2B Latch. The Latch is open when LEA2B is HIGH. Data from the A-Port is latched on
the HIGH to LOW transition of LEA2B.
Latch Enable Input for the 1B-A Latch. The Latch is open when LE1B is HIGH. Data from the 1B port is latched
on the HIGH to LOW transition of LE1B.
Latch Enable Input for the 2B-A Latch. The Latch is open when LE2B is HIGH. Data from the 2B port is latched
on the HIGH to LOW transition of LE2B.
1Bor2BPathSelection. WhenHIGH, SELenablesdatatransferfrom1BPorttoAPort. WhenLOW, SELenables
data transfer from 2B Port to A Port.
OEA
OE1B
OE2B
I
I
I
Output Enable for A Port (Active LOW).
Output Enable for 1B Port (Active LOW).
Output Enable for 2B Port (Active LOW).
3032 tbl 01
FUNCTION TABLES(2)
(1)
ABSOLUTE MAXIMUM RATINGS
Symbol
Description
Max.
Unit
Inputs
Output
A
(2) Terminal Voltage with Respect to
VTERM
–0.5 to +7.0
V
1B
H
L
2B
X
SEL LE1B LE2B
OEA
L
GND
H
H
H
L
H
H
L
X
X
X
H
H
L
H
(3) Terminal Voltage with Respect to
GND
VTERM
–0.5 to
VCC +0.5
V
X
L
L
X
X
L
A(1)
H
TSTG
Storage Temperature
DC Output Current
–65 to +150 °C
X
H
L
X
X
X
X
L
IOUT
–60 to +120 mA
3032 tbl 02
NOTES:
X
L
L
L
A(1)
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT-
INGS may cause permanent damage to the device. This is a stress rating
onlyandfunctionaloperationofthedeviceattheseoranyotherconditions
above those indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability.
X
X
L
L
X
X
X
X
H
Z
3032 tbl 04
Inputs
Outputs
2. All device terminals except FCT162XXXT Output and I/O terminals.
3. Output and I/O terminals for FCT162XXXT.
A
H
L
LEA1B LEA2B
1B
2B
H
OE1B OE2B
H
H
H
H
L
H
H
L
L
L
L
L
L
L
L
H
L
H
L
L
L
L
L
L
L
L
H
H
L
L
H
L
CAPACITANCE (TA = +25°C, F = 1.0MHZ)
Symbol
L
Parameter(1)
Conditions
Typ. Max. Unit
H
L
H
B(1)
B(1)
H
CIN
Input
VIN = 0V
3.5
3.5
6.0
pF
L
L
Capacitance
I/O
H
L
H
H
L
B(1)
B(1)
B(1)
Z
CI/O
VOUT = 0V
8.0
pF
L
L
B(1)
Capacitance
X
X
X
X
L
3032 tbl 03
NOTE:
1. This parameter is measured at characterization but not tested.
X
X
X
X
X
X
X
X
Z
Active
Z
Z
Active
X
Active
Active
3032 tbl 05
NOTES:
1. Output level before the indicated steady-state input conditions were
established.
2. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don't Care
Z = High Impedance
↑ = LOW-to-HIGH Transition
5.4
3
IDT54/74FCT16260AT/CT/ET, 162260AT/CT/ET
FAST CMOS 12-BIT TRI-PORT BUS EXCHANGER
MILITARY AND COMMERCIAL TEMPERATURES RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Commercial: TA = –40°C to +85°C, VCC = 5.0V ± 10%; Military: TA = –55°C to +125°C, VCC = 5.0V ± 10%
Symbol
Parameter
Input HIGH Level
Test Conditions(1)
Min. Typ.(2) Max.
Unit
VIH
Guaranteed Logic HIGH Level
2.0
—
—
—
—
—
—
—
—
–80
—
—
—
—
—
0.8
±1
V
VIL
II H
Input LOW Level
Guaranteed Logic LOW Level
V
Input HIGH Current (Input pins)(5)
Input HIGH Current (I/O pins)(5)
Input LOW Current (Input pins)(5)
Input LOW Current (I/O pins)(5)
High Impedance Output Current
(3-State Output pins)(5)
VCC = Max.
VI = VCC
—
µA
—
±1
II L
VI = GND
—
±1
—
±1
IOZH
IOZL
VIK
VCC = Max.
VO = 2.7V
VO = 0.5V
—
±1
µA
—
±1
Clamp Diode Voltage
VCC = Min., IIN = –18mA
VCC = Max., VO = GND(3)
—
–0.7
–140
100
5
–1.2
–225
—
V
IOS
VH
Short Circuit Current
mA
mV
µA
Input Hysteresis
ICCL
ICCH
ICCZ
Quiescent Power Supply Current
VCC = Max., VIN = GND or VCC
500
3032 tbl 06
OUTPUT DRIVE CHARACTERISTICS FOR FCT16260T
Symbol
Parameter
Test Conditions(1)
VCC = Max., VO = 2.5V(3)
Min. Typ.(2) Max.
Unit
IO
Output Drive Current
–50
2.5
2.4
—
3.5
3.5
–180
—
mA
VOH
Output HIGH Voltage
VCC = Min.
IOH = –3mA
V
V
VIN = VIH or VIL
IOH = –12mA MIL.
IOH = –15mA COM'L.
IOH = –24mA MIL.
IOH = –32mA COM'L.(4)
IOL = 48mA MIL.
—
2.0
—
3.0
0.2
—
—
0.55
±1
V
V
VOL
Output LOW Voltage
VCC = Min.
VIN = VIH or VIL
IOL = 64mA COM'L.
IOFF
Input/Output Power Off Leakage(5) VCC = 0V, VIN or VO ≤ 4.5V
—
µA
3032 tbl 07
OUTPUT DRIVE CHARACTERISTICS FOR FCT162260T
Symbol
Parameter
Test Conditions(1)
Min. Typ.(2) Max.
Unit
IODL
Output LOW Current
VCC = 5V, VIN = VIH or VIL, VOUT = 1.5V(3)
60
–60
2.4
115
200
mA
VOUT = 1.5V(3)
IODH
VOH
Output HIGH Current
Output HIGH Voltage
VCC = 5V, VIN = VIH or VIL,
–115 –200
mA
V
VCC = Min.
VIN = VIH or VIL
VCC = Min.
IOH = –16mA MIL.
IOH = –24mA COM'L.
IOL = 16mA MIL.
3.3
0.3
—
VOL
Output LOW Voltage
—
0.55
V
VIN = VIH or VIL
IOL = 24mA COM'L.
3032 lnk 08
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5.0V, +25°C ambient.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. Duration of the condition can not exceed one second.
5. The test limit for this parameter is ± 5µA at TA = –55°C.
5.4
4
IDT54/74FCT16260AT/CT/ET, 162260AT/CT/ET
FAST CMOS 12-BIT TRI-PORT BUS EXCHANGER
MILITARY AND COMMERCIAL TEMPERATURES RANGES
POWER SUPPLY CHARACTERISTICS
Symbol
∆ICC
Parameter
Test Conditions(1)
Min. Typ.(2) Max.
Unit
Quiescent Power Supply Current VCC = Max.
TTL Inputs HIGH
—
0.5
1.5
mA
VIN = 3.4V(3)
ICCD
Dynamic Power Supply Current(4) VCC = Max.
VIN = VCC
—
60
100
µA/
Outputs Open
VIN = GND
MHz
One Output Port Enabled
LExx = VCC
One Input Bit Toggling
One Output Bit Toggling
50% Duty Cycle
IC
Total Power Supply Current(6)
VCC = Max.
VIN = VCC
VIN = GND
—
0.6
0.9
1.5
2.3
mA
Outputs Open
fi = 10MHz
50% Duty Cycle
One Output Port Enabled
LExx = VCC
VIN = 3.4V
VIN = GND
—
One Input Bit Toggling
One Output Bit Toggling
VCC = Max.
Outputs Open
fi = 2.5MHz
VIN = VCC
VIN = GND
—
—
1.8
4.8
3.5(5)
50% Duty Cycle
One Output Port Enabled
LExx = VCC
VIN = 3.4V
VIN = GND
12.5(5)
Twelve Input Bits Toggling
Twelve Output Bits Toggling
3032 tbl 09
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fCPNCP/2 + fiNi)
ICC = Quiescent Current (ICCL, ICCH and ICCZ)
∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
NCP = Number of Clock Inputs at fCP
fi = Input Frequency
Ni = Number of Inputs at fi
5.4
5
IDT54/74FCT16260AT/CT/ET, 162260AT/CT/ET
FAST CMOS 12-BIT TRI-PORT BUS EXCHANGER
MILITARY AND COMMERCIAL TEMPERATURES RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
FCT16260AT/162260AT
FCT16260CT/162260CT
FCT16260ET/162260ET
Com'l.
(2)
Mil.
(2)
Com'l.
(2)
Mil.
(2)
Com'l.
(2)
Mil.
(2)
(1)
Condition
Symbol
Parameter
Min.
Max. Min.
Max. Min.
Max. Min.
Max. Min.
Max. Min.
Max. Unit
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
Propagation Delay
AX to 1BX or Ax to 2BX
Propagation Delay
1BX to AX or 2BX to AX
Propagation Delay
LEXB to AX
CL = 50pF 1.5 5.2 1.5 5.6 1.5 4.7 1.5 5.1 1.5 3.6
RL = 500Ω
—
—
—
—
—
ns
ns
ns
ns
1.5 5.6 1.5 5.9 1.5 5.0 1.5 5.4 1.5 3.6
—
—
—
1.5 5.2 1.5 5.6 1.5 4.7 1.5 5.1 1.5 4.0
1.5 4.7 1.5 5.2 1.5 4.4 1.5 4.8 1.5 4.0
Propagation Delay
LEA1B to 1BX or
LEA2B to 2BX
tPLH
tPHL
tPZH
tPZL
Propagation Delay
SEL to AX
1.5 5.2 1.5 5.6 1.5 4.7 1.5 5.1 1.5 4.0
1.5 5.7 1.5 6.1 1.5 5.1 1.5 5.4 1.5 4.4
—
—
—
—
ns
ns
Output Enable Time
OEA to AX, OE1B to 1BX, or
OE2B to 2BX
tPHZ
tPLZ
Output Disable Time
OEA to AX, OE1B to 1BX, or
OE2B to 2BX
1.5 4.4 1.5 4.8 1.5 4.0 1.5 4.4 1.5 4.0
—
—
—
—
ns
ns
tSU
Set-Up Time, HIGH or LOW
Data to Latch
1.5
—
1.5
—
1.0
—
1.0
—
1.0
—
tH
Hold Time, Latch to Data
Pulse Width, Latch HIGH(4)
1.0
3.0
—
—
—
1.5
3.0
—
—
—
1.0
3.0
—
—
—
1.5
3.0
—
—
—
1.0
3.0
—
—
—
—
—
—
—
—
—
ns
ns
ns
tW
tSK(o) Output Skew(3)
0.5
0.5
0.5
0.5
0.5
3032 tbl 10
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
4. This parameter is guaranteed but not tested.
5.4
6
IDT54/74FCT16260AT/CT/ET, 162260AT/CT/ET
FAST CMOS 12-BIT TRI-PORT BUS EXCHANGER
MILITARY AND COMMERCIAL TEMPERATURES RANGES
TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS
SWITCH POSITION
Test
Switch
Open Drain
Disable Low
VCC
Closed
7.0V
Enable Low
500
500
Ω
Ω
Open
All Other Tests
VOUT
VIN
3032 lnk 11
DEFINITIONS:
CL= Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse
Pulse
Generator
D.U.T.
50pF
Generator.
T
R
C
L
3032 lnk 04
SET-UP, HOLD AND RELEASE TIMES
PULSE WIDTH
3V
DATA
1.5V
0V
INPUT
LOW-HIGH-LOW
t
H
t
SU
1.5V
PULSE
3V
1.5V
0V
TIMING
INPUT
ASYNCHRONOUS CONTROL
tW
t
REM
PRESET
CLEAR
ETC.
3V
1.5V
0V
HIGH-LOW-HIGH
PULSE
1.5V
SYNCHRONOUS CONTROL
PRESET
3V
3032 lnk 06
1.5V
0V
CLEAR
t
SU
t
H
CLOCK ENABLE
ETC.
3032 lnk 05
ENABLE AND DISABLE TIMES
PROPAGATION DELAY
ENABLE
DISABLE
3V
1.5V
0V
3V
SAME PHASE
CONTROL
INPUT
1.5V
0V
INPUT TRANSITION
t
PLH
t
t
PHL
PHL
t
PZL
tPLZ
V
OH
OUTPUT
3.5V
1.5V
3.5V
1.5V
OUTPUT
NORMALLY
LOW
SWITCH
CLOSED
V
OL
t
PLH
0.3V
0.3V
V
OL
3V
1.5V
0V
t
PZH
tPHZ
OPPOSITE PHASE
INPUT TRANSITION
V
OH
OUTPUT
NORMALLY
HIGH
SWITCH
OPEN
1.5V
0V
0V
3032 lnk 07
3032 lnk 08
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-
HIGH
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns
5.4
7
IDT54/74FCT16260AT/CT/ET, 162260AT/CT/ET
FAST CMOS 12-BIT TRI-PORT BUS EXCHANGER
MILITARY AND COMMERCIAL TEMPERATURES RANGES
ORDERING INFORMATION
IDT
X
FCT
XXXX
X
X
Temperature
Range
Device
Type
Package
Process
Blank
B
Commercial
MIL-STD-883, Class B
Shrink Small Outline Package (SO56-1)
Thin Shrink Small Outline Package (SO56-2)
Thin Very Small Outline Package (SO56-3)
CERPACK (E56-1)
PV
PA
PF
E
16260AT
16260CT
16260ET
162260AT
162260CT
162260ET
12-Bit Tri-Port Bus Exchanger
54
74
-55°C to +125°C
-40°C to +85°C
3032 drw 09
5.4
8
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