IDT74FCT16652ATPA8 [IDT]
Registered Bus Transceiver, FCT Series, 2-Func, 8-Bit, True Output, CMOS, PDSO56, TSSOP-56;
| 型号： | IDT74FCT16652ATPA8 |
| 厂家： | 
INTEGRATED DEVICE TECHNOLOGY |
| 描述： | Registered Bus Transceiver, FCT Series, 2-Func, 8-Bit, True Output, CMOS, PDSO56, TSSOP-56 光电二极管 输出元件 逻辑集成电路 触发器 |
| 文件： | 总9页 (文件大小：99K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
FAST CMOS 16-BIT BUS
TRANSCEIVER/REGISTER
IDT74FCT16652AT/CT
FEATURES:
DESCRIPTION:
• 0.5 MICRON CMOS Technology
The FCT16652T 16-bit registered transceivers are built using advanced
dual metal CMOS technology. These high-speed, low-power devices are
organized as two independent 8-bit bus transceivers with 3-state D-type
registers.Forexample,thexOEABandxOEBAsignalscontrolthetransceiver
functions.
• High-speed, low-power CMOS replacement for ABT functions
• Typical tSK(o) (Output Skew) < 250ps
• Low input and output leakage ≤1µA (max.)
• VCC = 5V ±10%
• High drive outputs (–32mA IOH, 64mA IOL)
• Power off disable outputs permit “live insertion”
• Typical VOLP (Output Ground Bounce) < 1.0V at VCC = 5V,
TA = 25°C
The xSAB and xSBA control pins are provided to select either real time or
storeddatatransfer. Thecircuitryusedforselectcontrolwilleliminatethetypical
decodingglitchthatoccursinamultiplexerduringthetransitionbetweenstored
andrealtimedata.Alowinputlevelselectsreal-timedataandahighlevelselects
storeddata.
• Available in SSOP and TSSOP packages
DataontheAorBdatabus,orboth,canbestoredintheinternalD-flip-flops
bylow-to-hightransitionsattheappropriateclockpins(xCLKABorxCLKBA),
regardless of the select or enable control pins. Flow-through organization of
signalpinssimplifieslayout.Allinputsaredesignedwithhysteresisforimproved
noisemargin.
TheFCT16652Tisideallysuitedfordrivinghighcapacitanceloadsandlow-
impedancebackplanes.Theoutputbuffersaredesignedwithpoweroffdisable
capabilitytoallow"liveinsertion"ofboardswhenusedasbackplanedrivers.
FUNCTIONALBLOCKDIAGRAM
2OEAB
1OEAB
2OEBA
1OEBA
2CLKBA
1CLKBA
1SBA
2SBA
2CLKAB
1CLKAB
2SAB
B REG
D
1SAB
B REG
D
C
C
A REG
2B1
A REG
1B1
2A1
1A1
D
D
C
C
TO SEVEN OTHER CHANNELS
TO SEVEN OTHER CHANNELS
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.
INDUSTRIAL TEMPERATURE RANGE
JUNE 2002
1
© 2002 Integrated Device Technology, Inc.
DSC-5450/2
IDT74FCT16652AT/CT
FASTCMOS16-BITBUSTRANSCEIVER/REGISTER
INDUSTRIALTEMPERATURERANGE
ABSOLUTEMAXIMUMRATINGS(1)
PINCONFIGURATION
Symbol
Description
Max
Unit
V
(2)
VTERM
Terminal Voltage with Respect to GND
–0.5 to +7
1
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
1OEAB
1OEBA
(3)
VTERM
Terminal Voltage with Respect to GND –0.5 to VCC+0.5
V
2
1CLKAB
1CLKBA
TSTG
IOUT
Storage Temperature
DC Output Current
–65 to +150
–60 to +120
°C
mA
3
1SAB
GND
1SBA
GND
4
NOTES:
5
1A1
1B1
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may
cause permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in
the operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect reliability.
2. All device terminals except FCT162XXX Output and I/O terminals.
3. Output and I/O terminals for FCT162XXX.
6
1A2
1B2
VCC
7
VCC
8
1A3
1A4
1B3
1B4
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
1A5
1B5
GND
GND
1A6
1A7
1A8
2A1
2A2
1B6
1B7
1B8
2B1
2B2
CAPACITANCE (TA = +25°C, f = 1.0MHz)
Symbol
Parameter(1)
Conditions
Typ.
Max. Unit
CIN
Input Capacitance
Output Capacitance
VIN = 0V
4.5
6
8
pF
pF
COUT
VOUT = 0V
5.5
NOTE:
1. This parameter is measured at characterization but not tested.
2A3
2B3
GND
GND
2A4
2A5
2B4
2B5
PINDESCRIPTION
2A6
2B6
VCC
VCC
Pin Names
Description
xAx
DataRegisterAInputs
2A7
2B7
DataRegisterBOutputs
DataRegisterBInputs
DataRegisterAOutputs
Clock Pulse Inputs
2A8
2B8
xBx
GND
GND
xCLKAB, xCLKBA
xSAB, xSBA
2SAB
2SBA
OutputDataSourceSelectInputs
OutputEnableInputs
2CLKAB
2OEAB
2CLKBA
xOEAB xOEBA
2OEBA
SSOP/ TSSOP
TOP VIEW
2
IDT74FCT16652AT/CT
FASTCMOS16-BITBUSTRANSCEIVER/REGISTER
INDUSTRIALTEMPERATURERANGE
FUNCTIONTABLE
Inputs
Data I/O(1)
xOEAB
xOEBA
xCLKAB
xCLKBA
xSAB
xSBA
xAx
xBx
Operation or Function
Isolation
Store A and B Data
Unspecified(1) Store A, Hold B
L
L
H
H
H
H
X
L
H or L
H or L
X
X
X
X
X
X
X
X
Input
Input
↑
↑
↑
↑
H or L
↑
↑
↑
X
H
L
Input
Input
Unspecified(1)
(2)
X
Output
Input
Input
Input
StoreAinBothRegisters
H or L
X
X
X
X
L
Hold A, Store B
(2)
L
↑
X
X
Output
StoreBinBothRegisters
Real Time B Data to A Bus
Stored B Data to A Bus
Real Time A Data to B Bus
Stored A Data to B Bus
Stored A Data to B Bus and
Stored B Data to A Bus
L
L
X
L
H
X
X
H
Output
L
L
X
H or L
X
H
H
H
H
H
L
X
Input
Output
Output
H or L
H or L
X
H
H
H or L
Output
NOTES:
1. The data output functions may be enabled or disabled by various signals at the xOEAB or xOEBA inputs. Data input functions are always enabled, i.e. data at the bus pins
will be stored on every LOW-to-HIGH transition on the clocks inputs.
2. Select control = L: clocks can occur simultaneously.
Select control = H: clocks must be staggered to load both registers.
3. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don't care
↑ = LOW-to-HIGH Transition
3
IDT74FCT16652AT/CT
FASTCMOS16-BITBUSTRANSCEIVER/REGISTER
INDUSTRIALTEMPERATURERANGE
BUS
A
BUS
B
BUS
A
BUS
B
xCLKAB
X
xOEAB xOEBA
xCLKBA
X
xSAB
X
xSBA
L
xOEAB
H
xOEBA
xCLKAB
X
xCLKBA
X
xSAB
L
xSBA
X
H
L
L
Real-Time Transfer
Bus B to A
Real-Time Transfer
Bus A to B
BUS
A
BUS
B
BUS
A
BUS
B
xOEAB
H
xOEBA xCLKAB
H or L
xCLKBA
H or L
xSAB
H
xSBA
xOEAB xOEBA
xCLKAB
xCLKBA
xSAB
xSBA
X
L
L
H
X
H
X
↑
↑
X
X
X
X
X
X
↑
L
H
X
↑
Storage from
A and/or B
Transfer Stored
Data to A and/or B
4
IDT74FCT16652AT/CT
FASTCMOS16-BITBUSTRANSCEIVER/REGISTER
INDUSTRIALTEMPERATURERANGE
DCELECTRICALCHARACTERISTICSOVEROPERATINGRANGE
FollowingConditionsApplyUnlessOtherwiseSpecified:
Industrial: TA = –40°C to +85°C, VCC = 5.0V ±10%
Symbol
VIH
Parameter
Input HIGH Level
TestConditions(1)
Guaranteed Logic HIGH Level
Min.
2
Typ.(2)
—
Max.
—
Unit
V
VIL
InputLOWLevel
GuaranteedLogicLOWLevel
VCC = Max.
—
—
—
—
—
—
—
—
–80
—
—
—
0.8
±1
V
IIH
InputHIGHCurrent(Inputpins)(5)
Input HIGH Current (I/O pins)(5)
InputLOWCurrent(Inputpins)(5)
InputLOWCurrent(I/Opins)(5)
HighImpedanceOutputCurrent
(3-StateOutputpins)(5)
VI = VCC
—
µA
—
±1
IIL
VI = GND
—
±1
—
±1
IOZH
IOZL
VIK
VCC = Max.
VO = 2.7V
VO = 0.5V
—
±1
µA
—
±1
ClampDiodeVoltage
VCC = Min., IIN = –18mA
VCC = Max., VO = GND(3)
–0.7
–140
100
5
–1.2
–250
—
V
IOS
ShortCircuitCurrent
mA
mV
µA
VH
InputHysteresis
—
ICCL
ICCH
ICCZ
Quiescent Power Supply Current
VCC = Max
500
VIN = GND or VCC
OUTPUTDRIVECHARACTERISTICS
Symbol
Parameter
TestConditions(1)
Min.
–50
2.5
2.4
2
Typ.(2) Max.
Unit
IO
OutputDriveCurrent
VCC = Max., VO = 2.5V(3)
—
3.5
3.5
3
–180
—
mA
VOH
Output HIGH Voltage
VCC = Min.
IOH = –3mA
IOH = –15mA
IOH = –32mA(4)
IOL = 64mA
VIN = VIH or VIL
—
V
V
—
VOL
OutputLOWVoltage
VCC = Min.
—
0.2
0.55
VIN = VIH or VIL
IOFF
Input/OutputPowerOffLeakage(5)
VCC = 0V, VIN or VO ≤ 4.5V
—
—
±1
µA
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. Duration of the condition can not exceed one second.
5. This test limit for this parameter is ±5µA at TA = –55°C.
5
IDT74FCT16652AT/CT
FASTCMOS16-BITBUSTRANSCEIVER/REGISTER
INDUSTRIALTEMPERATURERANGE
POWERSUPPLYCHARACTERISTICS
Symbol
Parameter
Quiescent Power Supply Current
TTL Inputs HIGH
TestConditions(1)
Min.
Typ.(2)
Max.
Unit
∆ICC
VCC = Max.
VIN = 3.4V(3)
—
0.5
1.5
mA
ICCD
Dynamic Power Supply Current(4)
VCC = Max.
VIN = VCC
—
75
120
µA/
OutputsOpen
VIN = GND
MHz
xOEAB = xOEBA = GND
OneInputToggling
50% Duty Cycle
IC
TotalPowerSupplyCurrent(6)
VCC = Max.
OutputsOpen
VIN = VCC
VIN = GND
—
—
0.8
1.3
1.7
3.2
mA
fCP = 10MHz (xCLKBA)
50% Duty Cycle
xOEAB = xOEBA = GND
OneBitToggling
fi = 5MHz
VIN = 3.4V
VIN = GND
50% Duty Cycle
VCC = Max.
OutputsOpen
fCP = 10MHz (xCLKBA)
50% Duty Cycle
VIN = VCC
VIN = GND
—
—
3.8
8.3
6.5(5)
20(5)
xOEAB = xOEBA = GND
Sixteen BitsToggling
fi = 2.5MHz
VIN = 3.4V
VIN = GND
50% Duty Cycle
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fCPNCP/2 + fiNi)
ICC = Quiescent Current (ICCL, ICCH and ICCZ)
∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
NCP = Number of Clock Inputs at fCP
fi = Input Frequency
Ni = Number of Inputs at fi
6
IDT74FCT16652AT/CT
FASTCMOS16-BITBUSTRANSCEIVER/REGISTER
INDUSTRIALTEMPERATURERANGE
SWITCHINGCHARACTERISTICSOVEROPERATINGRANGE
74FCT16652AT
74FCT16652CT
Symbol Parameter
Condition(1)
CL = 50pF
Min.(2)
Max.
Min.(2)
Max.
Unit
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tPLH
tPHL
tPLH
tPHL
tSU
PropagationDelay
2
6.3
1.5
3.9
4.8
4.4
4.1
4.2
—
ns
Bus to Bus
RL = 500Ω
OutputEnableTime
xOEAB or xOEBA to Bus
OutputDisableTime
xOEAB or xOEBA to Bus
PropagationDelay
2
2
9.8
6.3
6.3
7.7
—
1.5
1.5
1.5
1.5
2
ns
ns
ns
ns
ns
ns
2
Clock to Bus
PropagationDelay
2
xSBA or xSAB to Bus
Set-Up Time, HIGH or LOW
Bus to Clock
2
tH
Hold Time, HIGH or LOW
Bus to Clock
1.5
—
0
—
tW
Clock Pulse Width, HIGH or LOW
OutputSkew(3)
5
—
3
—
ns
ns
tSK(o)
—
0.5
—
0.5
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
7
IDT74FCT16652AT/CT
FASTCMOS16-BITBUSTRANSCEIVER/REGISTER
INDUSTRIALTEMPERATURERANGE
TESTCIRCUITSANDWAVEFORMS
SWITCHPOSITION
VCC
7.0V
Test
Switch
Closed
Open
500Ω
Open Drain
Disable Low
Enable Low
VOUT
VIN
Pulse
Generator
D.U.T.
All Other Tests
50pF
500Ω
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT
CL
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
Test Circuits for All Outputs
3V
DATA
1.5V
0V
INPUT
LOW-HIGH-LOW
tH
tSU
1.5V
PULSE
3V
1.5V
0V
TIMING
INPUT
ASYNCHRONOUS CONTROL
tW
tREM
PRESET
CLEAR
ETC.
3V
1.5V
0V
HIGH-LOW-HIGH
PULSE
1.5V
SYNCHRONOUS CONTROL
PRESET
3V
1.5V
0V
CLEAR
Pulse Width
tSU
tH
CLOCK ENABLE
ETC.
Set-up, Hold, and Release Times
ENABLE
DISABLE
3V
1.5V
0V
3V
SAME PHASE
CONTROL
INPUT
1.5V
0V
INPUT TRANSITION
tPLH
tPLH
tPHL
tPHL
tPZL
tPLZ
VOH
1.5V
VOL
OUTPUT
3.5V
1.5V
3.5V
VOL
OUTPUT
NORMALLY
LOW
SWITCH
CLOSED
0.3V
0.3V
3V
1.5V
0V
tPZH
tPHZ
OPPOSITE PHASE
INPUT TRANSITION
VOH
OUTPUT
NORMALLY
HIGH
SWITCH
OPEN
1.5V
0V
0V
Propagation Delay
Enable and Disable Times
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.
8
IDT74FCT16652AT/CT
FASTCMOS16-BITBUSTRANSCEIVER/REGISTER
INDUSTRIALTEMPERATURERANGE
ORDERINGINFORMATION
IDT
XX
FCT
XXXX
XXX
XX
Temp. Range
Family
Package
Device Type
Shrink Small Outline Package
Thin Shrink Small Outline Package
PV
PA
16-Bit Bus Transceiver/Register
652AT
652CT
16
74
Double-Density, 5 Volt, High Drive
– 40°C to +85°C
DATASHEETDOCUMENTHISTORY
1/21/2002
6/21/2002
RemovedMilitarytempgrade
Updated as per PDNs Logic-00-07 and Logic-01-04
CORPORATE HEADQUARTERS
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Santa Clara, CA 95054
for SALES:
800-345-7015 or 408-727-6116
fax: 408-492-8674
for Tech Support:
logichelp@idt.com
(408) 654-6459
www.idt.com
9
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