IDT74FCT16827ET [IDT]
FAST CMOS 20-BIT BUFFERS; FAST CMOS 20位缓冲器
| 型号： | IDT74FCT16827ET |
| 厂家： | 
INTEGRATED DEVICE TECHNOLOGY |
| 描述： | FAST CMOS 20-BIT BUFFERS |
| 文件： | 总8页 (文件大小：124K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
IDT54/74FCT16827AT/BT/CT/ET
IDT54/74FCT162827AT/BT/CT/ET
FAST CMOS 20-BIT
BUFFERS
Integrated Device Technology, Inc.
FEATURES:
• Common features:
– 0.5 MICRON CMOS Technology
– High-speed, low-power CMOS replacement for
ABT functions
DESCRIPTION:
The FCT16827AT/BT/CT/ET and FCT162827AT/BT/CT/
ET 20-bit buffers are built using advanced dual metal CMOS
technology. These 20-bit bus drivers provide high-perfor-
mance bus interface buffering for wide data/address paths or
busses carrying parity. Two pair of NAND-ed output enable
controls offer maximum control flexibility and are organized to
operate the device as two 10-bit buffers or one 20-bit buffer.
Flow-through organization of signal pins simplifies layout. All
inputs are designed with hysteresis for improved noise mar-
gin.
The FCT16827AT/BT/CT/ET are ideally suited for driving
high capacitance loads and low impedance backplanes. The
output buffers are designed with power off disable capability
to allow "live insertion" of boards when used as backplane
drivers.
The FCT162827AT/BT/CT/ET have balanced output drive
with current limiting resistors. This offers low ground bounce,
minimalundershoot,andcontrolledoutputfalltimes–reducing
the need for external series terminating resistors. The
FCT162827AT/BT/CT/ET are plug-in replacements for the
FCT16827AT/BT/CT/ET and ABT16827 for on-board inter-
face applications.
– Typical tSK(o) (Output Skew) < 250ps
– Low input and output leakage ≤1µA (max.)
– ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
– Packages include 25 mil pitch SSOP, 19.6 mil pitch
TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch Cerpack
– Extended commercial range of -40°C to +85°C
– VCC = 5V ±10%
• Features for FCT16827AT/BT/CT/ET:
– High drive outputs (-32mA IOH, 64mA IOL)
– Power off disable outputs permit “live insertion”
– Typical VOLP (Output Ground Bounce) < 1.0V at
VCC = 5V, TA = 25°C
• Features for FCT162827AT/BT/CT/ET:
– Balanced Output Drivers: ±24mA (commercial),
±16mA (military)
– Reduced system switching noise
– Typical VOLP (Output Ground Bounce) < 0.6V at
VCC = 5V,TA = 25°C
FUNCTIONAL BLOCK DIAGRAM
1OE
1
2OE
1
1OE
2
2OE
2
1A
1
1Y1
2A
1
2Y1
TO 9 OTHER CHANNELS
TO 9 OTHER CHANNELS
2773 drw 01
2773 drw 02
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
AUGUST 1996
1996 Integrated Device Technology, Inc.
5.17
DSC-2773/7
1
IDT54/74FCT16827AT/BT/CT/ET, 162827AT/BT/CT/ET
FAST CMOS 20-BIT BUFFERS
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATIONS
1
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
1OE2
1A1
1
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
1
1
1
OE2
1OE1
1Y1
1
OE
1
1
1
Y
Y
2
A
1
2
2
1
2
3
A
1Y2
GND
1Y3
3
1A2
GND
4
GND
4
GND
1A3
1
1
Y
3
4
5
1
1
A
3
4
5
Y
6
A
1Y4
6
1A4
VCC
7
VCC
VCC
1Y5
7
VCC
1A5
1
Y
Y
Y
5
6
7
8
1
A
5
6
7
8
1
9
1
1
A
1Y6
1Y7
9
1A6
1A7
1
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
A
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
GND
GND
GND
GND
1
1
Y
8
9
1
1
1
2
A
A
A
A
8
1Y8
1Y9
1A8
1A9
1A10
2A1
Y
9
1
Y10
10
1
SO56-1
SO56-2
SO56-3
1Y10
2Y1
E56-1
2
2
Y
1
Y
Y
2
2
A2
2Y2
2A2
2A3
2Y3
2
3
2A3
GND
GND
2Y4
GND
GND
2A4
2
2
A
A
A
4
2
2
2
Y
Y
Y
4
5
6
5
2Y5
2A5
2A6
VCC
2A7
2
6
2Y6
VCC
VCC
VCC
2
2
Y
7
8
2
2
A7
2Y7
2Y8
Y
A8
2A8
GND
GND
GND
2A9
GND
2Y9
2
A9
2
Y
9
2
Y10
2
A10
2Y10
2OE1
2A10
2
OE
2
2
OE1
2OE2
SSOP/
TSSOP/TVSOP
TOP VIEW
CERPACK
TOP VIEW
2773 drw 03
2773 drw 04
5.17
2
IDT54/74FCT16827AT/BT/CT/ET, 162827AT/BT/CT/ET
FAST CMOS 20-BIT BUFFERS
MILITARY AND COMMERCIAL TEMPERATURE RANGES
FUNCTION TABLE(1)
PIN DESCRIPTION
Pin Names
Description
Inputs
Outputs
xOEx
Output Enable Inputs (Active LOW)
x
1
x
2
xAx
L
xYx
OE
OE
xAx
xYx
Data Inputs
L
L
L
L
H
Z
Z
3-State Outputs
L
H
2773 tbl 01
H
X
X
X
H
X
ABSOLUTE MAXIMUM RATINGS(1)
NOTE:
2773 tbl 02
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Symbol
Description
Max.
Unit
(2) Terminal Voltage with Respect to
VTERM
–0.5 to +7.0
V
Z = High Impedance
GND
(3) Terminal Voltage with Respect to
GND
VTERM
–0.5 to
VCC +0.5
V
TSTG
IOUT
Storage Temperature
DC Output Current
–65 to +150 °C
CAPACITANCE (TA = +25°C, f = 1.0MHz)
–60 to +120 mA
2773 lnk 03
Symbol
Parameter(1)
Input
Capacitance
Output
Conditions
IN = 0V
Typ. Max. Unit
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT-
INGS may cause permanent damage to the device. This is a stress rating
onlyandfunctionaloperationofthedeviceattheseoranyotherconditions
above those indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability.
CIN
V
3.5
6.0
pF
COUT
VOUT = 0V
3.5
8.0
pF
Capacitance
2773 lnk 04
NOTE:
1. This parameter is measured at characterization but not tested.
2. All device terminals except FCT162XXXT Output and I/O terminals.
3. Output and I/O terminals for FCT162XXXT.
5.17
3
IDT54/74FCT16827AT/BT/CT/ET, 162827AT/BT/CT/ET
FAST CMOS 20-BIT BUFFERS
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Commercial: TA = –40°C to +85°C, VCC = 5.0V ± 10%; Military: TA = –55°C to +125°C, VCC = 5.0V ± 10%
Symbol
Parameter
Input HIGH Level
Test Conditions(1)
Min. Typ.(2) Max.
Unit
VIH
Guaranteed Logic HIGH Level
2.0
—
—
—
—
—
—
—
—
–80
—
—
—
—
—
0.8
±1
V
VIL
II H
Input LOW Level
Guaranteed Logic LOW Level
V
Input HIGH Current (Input pins)(5)
Input HIGH Current (I/O pins)(5)
Input LOW Current (Input pins)(5)
Input LOW Current (I/O pins)(5)
High Impedance Output Current
(3-State Output pins)(5)
VCC = Max.
VI = VCC
—
µA
—
±1
II L
VI = GND
—
±1
—
±1
IOZH
IOZL
VIK
VCC = Max.
VO = 2.7V
VO = 0.5V
—
±1
µA
—
±1
Clamp Diode Voltage
VCC = Min., IIN = –18mA
VCC = Max., VO = GND(3)
—
–0.7
–140
100
5
–1.2
–225
—
V
IOS
VH
Short Circuit Current
mA
mV
µA
Input Hysteresis
ICCL
ICCH
ICCZ
Quiescent Power Supply Current
VCC = Max., VIN = GND or VCC
500
2773 lnk 05
OUTPUT DRIVE CHARACTERISTICS FOR FCT16827T
Symbol
Parameter
Test Conditions(1)
= 2.5V(3)
Min. Typ.(2) Max.
Unit
I
O
Output Drive Current
V
V
V
CC = Max., V
O
–50
2.5
2.4
—
3.5
3.5
–
180
mA
VOH
Output HIGH Voltage
CC = Min.
I
OH = –3mA
—
—
V
V
IN = VIH or VIL
I
I
OH = –12mA MIL.
OH = –15mA COM'L.
I
I
OH = –24mA MIL.
2.0
—
3.0
0.2
—
—
V
V
OH = –32mA COM'L.(4)
VOL
Output LOW Voltage
V
V
CC = Min.
IN = VIH or VIL
I
I
OL = 48mA MIL.
OL = 64mA COM'L.
0.55
I
OFF
Input/Output Power Off Leakage(5)
V
CC = 0V, VIN or V
O
≤ 4.5V
—
±1
µA
2773 lnk 06
OUTPUT DRIVE CHARACTERISTICS FOR FCT162827T
Symbol
Parameter
Test Conditions(1)
Min. Typ.(2) Max.
Unit
I
I
ODL
Output LOW Current
V
CC = 5V, VIN = VIH or VIL,
CC = 5V, VIN = VIH or VIL,
V
OUT = 1.5V(3)
60
–60
2.4
115
200
mA
ODH
Output HIGH Current
Output HIGH Voltage
V
V
OUT = 1.5V(3)
–115 –200
mA
V
V
OH
OL
V
V
V
V
CC = Min.
IN = VIH or VIL
CC = Min.
I
OH = –16mA MIL.
OH = –24mA COM'L.
OL = 16mA MIL.
3.3
0.3
—
I
I
I
V
Output LOW Voltage
—
0.55
V
IN = VIH or VIL
OL = 24mA COM'L.
2773 lnk 07
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5.0V, +25°C ambient.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. Duration of the condition can not exceed one second.
5. The test limit for this parameter is ± 5µA at TA = –55°C.
5.17
4
IDT54/74FCT16827AT/BT/CT/ET, 162827AT/BT/CT/ET
FAST CMOS 20-BIT BUFFERS
MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
Symbol
Parameter
Quiescent Power Supply Current
TTL Inputs HIGH
Test Conditions(1)
Min. Typ.(2) Max.
Unit
∆ICC
VCC = Max.
VIN = 3.4V(3)
—
0.5
1.5
mA
ICCD
Dynamic Power Supply Current(4) VCC = Max.
VIN = VCC
—
60
100
µA/
Outputs Open
VIN = GND
MHz
xOE1 = xOE2 = GND
One Input Toggling
50% Duty Cycle
IC
Total Power Supply Current(6)
VCC = Max.
Outputs Open
fi = 10MHz
VIN = VCC
VIN = GND
—
—
0.6
0.9
1.5
2.3
mA
50% Duty Cycle
xOE1 = xOE2 = GND
One Bit Toggling
VIN = 3.4V
VIN = GND
VCC = Max.
Outputs Open
fi = 2.5MHz
VIN = VCC
VIN = GND
—
—
3.0
8.0
5.5(5)
50% Duty Cycle
xOE1 = xOE2 = GND
Twenty Bits Toggling
VIN = 3.4V
VIN = GND
20.5(5)
2773 tbl 08
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fCPNCP/2 + fiNi)
ICC = Quiescent Current (ICCL, ICCH and ICCZ)
∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
NCP = Number of Clock Inputs at fCP
fi = Input Frequency
Ni = Number of Inputs at fi
5.17
5
IDT54/74FCT16827AT/BT/CT/ET, 162827AT/BT/CT/ET
FAST CMOS 20-BIT BUFFERS
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
FCT16827AT/162827AT
FCT16827BT/162827BT
Com'l. Mil.
Com'l.
Mil.
Symbol
Parameter
Propagation Delay
xAx to xYx
Condition(1)
CL = 50pF
RL = 500Ω
CL = 300pF(4)
RL = 500Ω
CL = 50pF
RL = 500Ω
CL = 300pF(4)
RL = 500Ω
CL = 5pF(4)
RL = 500Ω
CL = 50pF
RL = 500Ω
Min.(2)
Max.
Min.(2)
Max.
Min.(2)
Max.
Min.(2)
Max.
Unit
tPLH
tPHL
1.5
1.5
1.5
1.5
1.5
1.5
—
8.0
1.5
9.0
1.5
1.5
1.5
1.5
1.5
1.5
—
5.0
1.5
6.5
ns
15.0
12.0
23.0
9.0
1.5
1.5
1.5
1.5
1.5
—
17.0
13.0
25.0
9.0
13.0
8.0
1.5
1.5
1.5
1.5
1.5
—
14.0
9.0
tPZH
tPZL
Output Enable Time
xOEx to xYx
ns
ns
15.0
6.0
16.0
7.0
tPHZ
tPLZ
Output Disable Time
xOEx to xYx
10.0
0.5
10.0
0.5
7.0
8.0
tSK(o) Output Skew(3)
0.5
0.5
ns
2773 tbl 09
FCT16827CT/162827CT
Com'l. Mil.
FCT16827ET/162827ET
Com'l. Mil.
Symbol
Parameter
Condition(1)
Min.(2)
Max.
Min.(2)
Max.
Min.(2)
Max.
Min.(2)
Max.
Unit
t
t
PLH
PHL
Propagation Delay
xAx to xYx
C
R
C
R
C
R
C
R
C
R
C
R
L
L
L
L
= 50pF
= 500
= 300pF(4)
= 500
= 50pF
= 500
= 300pF(4)
= 500
= 5pF(4)
= 500
= 50pF
= 500
1.5
4.4
1.5
5.0
1.5
3.2
—
—
ns
Ω
1.5
1.5
1.5
1.5
1.5
—
10.0
7.0
1.5
1.5
1.5
1.5
1.5
—
11.0
8.0
1.5
1.5
1.5
1.5
1.5
—
7.0
4.8
9.0
4.0
4.0
0.5
—
—
—
—
—
—
—
—
—
—
—
—
Ω
t
t
PZH
PZL
Output Enable Time
xOEx to xYx
L
L
L
L
L
L
L
L
ns
ns
Ω
14.0
5.7
15.0
6.7
Ω
t
t
PHZ
PLZ
Output Disable Time
xOEx to xYx
Ω
6.0
7.0
Ω
t
SK(o) Output Skew(3)
0.5
0.5
ns
2773 tbl 10
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
4. This condition is guaranteed but not tested.
5.17
6
IDT54/74FCT16827AT/BT/CT/ET, 162827AT/BT/CT/ET
FAST CMOS 20-BIT BUFFERS
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS
SWITCH POSITION
Test
Switch
VCC
Open Drain
Disable Low
7.0V
Closed
500Ω
Enable Low
VOUT
VIN
Open
All Other Tests
Pulse
Generator
2773 lnk 11
D.U.T.
DEFINITIONS:
CL= Load capacitance: includes jig and probe capacitance.
50pF
RT = Termination resistance: should be equal to ZOUT of the Pulse
500Ω
T
R
Generator.
C
L
2773 drw 05
SET-UP, HOLD AND RELEASE TIMES
PULSE WIDTH
3V
DATA
1.5V
0V
INPUT
LOW-HIGH-LOW
t
H
tSU
1.5V
PULSE
3V
1.5V
0V
TIMING
INPUT
ASYNCHRONOUS CONTROL
tW
tREM
PRESET
CLEAR
ETC.
3V
1.5V
0V
HIGH-LOW-HIGH
PULSE
1.5V
SYNCHRONOUS CONTROL
PRESET
2773 drw 07
3V
1.5V
0V
CLEAR
tSU
tH
CLOCK ENABLE
ETC.
2773 drw 06
PROPAGATION DELAY
ENABLE AND DISABLE TIMES
ENABLE
DISABLE
3V
1.5V
0V
3V
SAME PHASE
INPUT TRANSITION
CONTROL
INPUT
1.5V
0V
t
PLH
tPHL
t
PZL
tPLZ
VOH
OUTPUT
3.5V
1.5V
3.5V
1.5V
OUTPUT
NORMALLY
LOW
SWITCH
CLOSED
VOL
tPLH
tPHL
0.3V
0.3V
VOL
3V
1.5V
0V
t
PZH
tPHZ
OPPOSITE PHASE
INPUT TRANSITION
VOH
OUTPUT
NORMALLY
HIGH
SWITCH
OPEN
1.5V
0V
0V
2773 drw 09
2773 drw 08
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control
Disable-HIGH
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns
5.17
7
IDT54/74FCT16827AT/BT/CT/ET, 162827AT/BT/CT/ET
FAST CMOS 20-BIT BUFFERS
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ORDERING INFORMATION
IDT
XX
FCT
XXXX
X
X
Temp. Range
Package
Device Type
Process
Blank
B
Commercial
MIL-STD-883, Class B
PV
PA
PF
E
Shrink Small Outline Package (SO56-1)
Thin Shrink Small Outline Package (SO56-2)
Thin Very Small Outline Package (SO56-3)
CERPACK (E56-1)
16827AT Non-Inverting 20-Bit Buffers
16827BT
16827CT
16827ET
162827AT
162827BT
162827CT
162827ET
54
74
–55°C to +125°C
–40°C to +85°C
2773 drw 10
5.17
8
相关型号：
IDT74FCT16827ETPAT/R
Bus Driver, FCT Series, 2-Func, 10-Bit, True Output, CMOS, PDSO56, 6.10 MM, 0.50 MM PITCH, TSSOP-56
IDT
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