IDT74FCT16952ETPVG [IDT]

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IDT74FCT16952ETPVG
型号: IDT74FCT16952ETPVG
厂家: INTEGRATED DEVICE TECHNOLOGY    INTEGRATED DEVICE TECHNOLOGY
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IDT74FCT16952AT/CT/ET  
FAST CMOS  
16-BIT REGISTERED  
TRANSCEIVER  
FEATURES:  
DESCRIPTION:  
• 0.5 MICRON CMOS Technology  
The FCT16952T 16-bit registered transceiver is built using advanced  
dual metal CMOS technology. These high-speed, low-power devices are  
organized as two independent 8-bit D-type registered transceivers with  
separateinputandoutputcontrolforindependentcontrolofdataflowineither  
direction. For example, the A-to-B Enable (xCEAB) must be low to enter  
datafromtheAport.xCLKABcontrolstheclockingfunction.WhenxCLKAB  
togglesfromlow-to-high, thedatapresentontheAportwillbeclockedinto  
theregister. xOEABperformsthe outputenablefunctionontheBport.Data  
flowfromtheBporttoAportissimilarbutrequiresusingxCEBA, xCLKBA,  
andxOEBAinputs. Full16-bitoperationisachievedbytyingthecontrolpins  
of the independent transceivers together.  
• High-speed, low-power CMOS replacement for ABT functions  
• Typical tSK(o) (Output Skew) < 250ps  
• Low input and output leakage 1µA (max.)  
• High drive outputs (-32mA IOH, 64mA IOL)  
• Power off disable outputs permit “live insertion”  
• Typical VOLP (Output Ground Bounce) < 1.0V at VCC = 5V,  
TA = 25°C  
• Available in SSOP and TSSOP packages  
TheFCT16952Tisideallysuitedfordrivinghigh-capacitanceloadsand  
low-impedancebackplanes.Theoutputbuffersaredesignedwithpoweroff  
disablecapabilityallowing"liveinsertion"ofboardswhenusedasbackplane  
drivers.  
FUNCTIONALBLOCKDIAGRAM  
54  
31  
2CEBA  
1CEBA  
30  
55  
2CLKBA  
1CLKBA  
28  
1
2OEAB  
1OEAB  
26  
3
2CEAB  
1CEAB  
2
27  
2CLKAB  
1CLKAB  
29  
56  
2OEBA  
1OEBA  
C
C
5
15  
CE  
CE  
2A1  
1A1  
42  
52  
D
D
1B1  
2B1  
C
CE  
D
C
CE  
D
TO SEVEN OTHER CHANNELS  
TO SEVEN OTHER CHANNELS  
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.  
INDUSTRIAL TEMPERATURE RANGE  
JUNE 2002  
1
2002 Integrated Device Technology, Inc.  
DSC-5442/2  
IDT74FCT16925AT/CT/ET  
FASTCMOS16-BITREGISTEREDTRANSCEIVER  
INDUSTRIALTEMPERATURERANGE  
ABSOLUTEMAXIMUMRATINGS(1)  
PINCONFIGURATION  
Symbol  
Description  
Max  
Unit  
V
(2)  
VTERM  
Terminal Voltage with Respect to GND  
–0.5 to +7  
1
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
1OEAB  
1OEBA  
(3)  
VTERM  
Terminal Voltage with Respect to GND –0.5 to VCC+0.5  
V
2
1CLKAB  
1CLKBA  
TSTG  
IOUT  
Storage Temperature  
DC Output Current  
–65 to +150  
–60 to +120  
°C  
mA  
3
1CEAB  
GND  
1CEBA  
GND  
4
NOTES:  
5
1A1  
1B1  
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause  
permanent damage to the device. This is a stress rating only and functional operation  
of the device at these or any other conditions above those indicated in the operational  
sections of this specification is not implied. Exposure to absolute maximum rating  
conditions for extended periods may affect reliability.  
6
1A2  
1B2  
VCC  
7
VCC  
8
1A3  
1A4  
1B3  
1B4  
2. All device terminals except FCT162XXX Output and I/O terminals.  
3. Output and I/O terminals for FCT162XXX.  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
1A5  
1B5  
GND  
GND  
CAPACITANCE (TA = +25°C, F = 1.0MHz)  
Symbol  
1A6  
1A7  
1A8  
2A1  
2A2  
1B6  
1B7  
1B8  
2B1  
2B2  
Parameter(1)  
Conditions  
Typ.  
Max. Unit  
CIN  
Input Capacitance  
Output Capacitance  
VIN = 0V  
3.5  
6
8
pF  
pF  
COUT  
VOUT = 0V  
3.5  
NOTE:  
1. This parameter is measured at characterization but not tested.  
2A3  
2B3  
GND  
GND  
2A4  
2A5  
2B4  
2B5  
FUNCTIONTABLE(1,3)  
2A6  
2B6  
Inputs  
Outputs  
VCC  
VCC  
xCEAB  
xCLKAB  
xOEAB  
xAx  
X
xBx  
B(2)  
B(2)  
L
H
X
L
X
L
L
L
2A7  
2B7  
X
2A8  
2B8  
X
L
L
GND  
GND  
L
L
H
H
2CEBA  
2CEAB  
X
H
X
Z
2CLKAB  
2CLKBA  
NOTES:  
2OEAB  
2OEBA  
1. A-to-B data flow is shown: B-to-A data flow is similar but uses xCEBA, xCLKBA, and  
xOEBA.  
SSOP/ TSSOP  
TOP VIEW  
2. Level of B before the indicated steady-state input conditions were established.  
3. H = HIGH Voltage Level  
L = LOW Voltage Level  
X = Don't Care  
= LOW-to-HIGH Transition  
Z = High-impedance  
PINDESCRIPTION  
Pin Names  
Description  
xOEAB  
xOEBA  
xCEAB  
xCEBA  
xCLKAB  
xCLKBA  
xAx  
A-to-BOutputEnableInput(ActiveLOW)  
B-to-AOutputEnableInput(ActiveLOW)  
A-to-B Clock Enable Input (Active LOW)  
B-to-A Clock Enable Input (Active LOW)  
A-to-B Clock Input  
B-to-A Clock Input  
A-to-BDataInputsorB-to-A3-StateOutputs  
B-to-ADataInputsorA-to-B3-StateOutputs  
xBx  
2
IDT74FCT16925AT/CT/ET  
FASTCMOS16-BITREGISTEREDTRANSCEIVER  
INDUSTRIALTEMPERATURERANGE  
DCELECTRICALCHARACTERISTICSOVEROPERATINGRANGE  
FollowingConditionsApplyUnlessOtherwiseSpecified:  
Industrial: TA = –40°C to +85°C, VCC = 5.0V ±10%  
Symbol  
VIH  
Parameter  
Input HIGH Level  
Test Conditions(1)  
Guaranteed Logic HIGH Level  
Min.  
2
Typ.(2)  
Max.  
Unit  
V
VIL  
InputLOWLevel  
GuaranteedLogicLOWLevel  
VCC = Max.  
–80  
0.8  
±1  
V
IIH  
InputHIGHCurrent(Inputpins)(5)  
Input HIGH Current (I/O pins)(5)  
InputLOWCurrent(Inputpins)(5)  
InputLOWCurrent(I/Opins)(5)  
HighImpedanceOutputCurrent  
(3-StateOutputpins)(5)  
VI = VCC  
µA  
±1  
IIL  
VI = GND  
±1  
±1  
IOZH  
IOZL  
VIK  
VCC = Max.  
VO = 2.7V  
VO = 0.5V  
±1  
µA  
±1  
ClampDiodeVoltage  
VCC = Min., IIN = –18mA  
VCC = Max., VO = GND(3)  
–0.7  
–140  
100  
5
–1.2  
–250  
V
IOS  
ShortCircuitCurrent  
mA  
mV  
µA  
VH  
InputHysteresis  
ICCL  
ICCH  
ICCZ  
Quiescent Power Supply Current  
VCC = Max.  
VIN = GND or VCC  
500  
OUTPUTDRIVECHARACTERISTICS  
Symbol  
Parameter  
OutputDriveCurrent  
Output HIGH Voltage  
Test Conditions(1)  
VCC = Max., VO = 2.5V(3)  
Min.  
Typ.(2) Max.  
Unit  
IO  
–50  
2.5  
2.4  
2
3.5  
3.5  
3
–180  
mA  
VOH  
VCC = Min.  
IOH = –3mA  
IOH = –15mA  
IOH = –32mA(4)  
IOL = 64mA  
VIN = VIH or VIL  
V
VOH  
OutputLOWVoltage  
VCC = Min.  
0.2  
0.55  
V
VIN = VIH or VIL  
IOFF  
Input/OutputPowerOffLeakage(5)  
VCC = 0V, VIN or VO 4.5V  
±1  
µA  
NOTES:  
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.  
2. Typical values are at VCC = 5.0V, +25°C ambient.  
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.  
4. Duration of the condition can not exceed one second.  
5. The test limit for this parameter is ±5µA at TA = -55°C.  
3
IDT74FCT16925AT/CT/ET  
FASTCMOS16-BITREGISTEREDTRANSCEIVER  
INDUSTRIALTEMPERATURERANGE  
POWERSUPPLYCHARACTERISTICS  
Symbol  
Parameter  
Quiescent Power Supply  
TestConditions(1)  
Min.  
Typ.(2)  
Max.  
Unit  
ICC  
VCC = Max.  
VIN = 3.4V(3)  
0.5  
1.5  
mA  
Current TTL Inputs HIGH  
Dynamic Power Supply Current(4)  
ICCD  
VCC = Max.,  
VIN = VCC  
75  
120  
µA/  
OutputsOpen  
VIN = GND  
MHz  
xOEAB = xOEBA = GND  
OneInputToggling  
50% Duty Cycle  
VCC = Max., Outputs Open  
fCP = 10MHz (xCLKAB)  
50% Duty Cycle  
xOEAB = xCEAB = GND  
xOEBA = VCC  
IC  
TotalPowerSupplyCurrent(6)  
VIN = VCC  
VIN = GND  
0.8  
1.3  
3.8  
8.3  
1.7  
3.2  
mA  
VIN = 3.4V  
VIN = GND  
fi = 5MHz  
50% Duty Cycle  
OneBitToggling  
VCC = Max., Outputs Open  
fCP = 10MHz (xCLKAB)  
50% Duty Cycle  
xOEAB = xCEAB = GND  
xOEBA = VCC  
VIN = VCC  
VIN = GND  
6.5(5)  
VIN = 3.4V  
VIN = GND  
20(5)  
fi = 2.5MHz  
50% Duty Cycle  
SixteenBitsToggling  
NOTES:  
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.  
2. Typical values are at VCC = 5.0V, +25°C ambient.  
3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND.  
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.  
5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.  
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC  
IC = ICC + ICC DHNT + ICCD (fCPNCP/2 + fiNi)  
ICC = Quiescent Current (ICCL, ICCH and ICCZ)  
ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)  
DH = Duty Cycle for TTL Inputs High  
NT = Number of TTL Inputs at DH  
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)  
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)  
NCP = Number of Clock Inputs at fCP  
fi = Input Frequency  
Ni = Number of Inputs at fi  
4
IDT74FCT16925AT/CT/ET  
FASTCMOS16-BITREGISTEREDTRANSCEIVER  
INDUSTRIALTEMPERATURERANGE  
SWITCHINGCHARACTERISTICSOVEROPERATINGRANGE-INDUSTRIAL  
FCT16952AT FCT16952CT FCT16952ET  
Symbol  
Parameter  
Condition(1)  
Min.(2) Max. Min.(2) Max. Min.(2) Max. Unit  
tPLH  
tPHL  
Propagation Delay  
xCLKAB, xCLKBA to xBx, xAx  
CL = 50pF  
RL = 500Ω  
2
10  
10.5  
10  
2
6.3  
1.5  
1.5  
1.5  
1.5  
3.7  
4.4  
3.6  
ns  
ns  
ns  
ns  
tPZH  
tPZL  
Output EnableTime  
xOEBA, xOEAB to xAx, xBx  
Output Disable Time  
xOEBA, xOEAB to xAx, xBx  
1.5  
1.5  
2.5  
1.5  
1.5  
2.5  
7
tPHZ  
tPLZ  
6.5  
tSU  
Set-up Time, HIGH or LOW  
xAx, xBx to xCLKAB, xCLKBA  
Hold Time, HIGH or LOW  
tH  
2
3
2
1.5  
3
0
2
0
ns  
ns  
ns  
xAx, xBx to xCLKAB, xCLKBA  
Set-up Time, HIGH or LOW  
tSU  
tH  
xCEBA, xCEAB, to xCLKAB, xCLKBA  
Hold Time, HIGH or LOW  
2
xCEBA, xCEAB, to xCLKAB, xCLKBA  
Pulse Width HIGH or LOW, xCLKAB or xCLKBA  
Output Skew(4)  
(3)  
tW  
3
3
3
ns  
ns  
tSK(o)  
0.5  
0.5  
0.5  
NOTES:  
1. See test circuit and waveforms.  
2. Minimum limits are guaranteed but not tested on Propagation Delays.  
3. This limit is guaranteed but not tested.  
4. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design.  
5
IDT74FCT16925AT/CT/ET  
FASTCMOS16-BITREGISTEREDTRANSCEIVER  
INDUSTRIALTEMPERATURERANGE  
TESTCIRCUITSANDWAVEFORMS  
V CC  
SWITCHPOSITION  
7.0V  
Test  
Switch  
Closed  
Open  
500  
Open Drain  
Disable Low  
Enable Low  
V OUT  
VIN  
Pulse  
Generator  
D.U.T.  
50pF  
CL  
All Other Tests  
500Ω  
RT  
DEFINITIONS:  
CL = Load capacitance: includes jig and probe capacitance.  
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.  
Test Circuits for All Outputs  
3V  
1.5V  
0V  
DATA  
INPUT  
LOW-HIGH-LOW  
tH  
tSU  
1.5V  
PULSE  
3V  
1.5V  
0V  
TIMING  
INPUT  
tW  
ASYNCHRONOUS CONTROL  
tREM  
PRESET  
3V  
CLEAR  
ETC.  
1.5V  
0V  
HIGH-LOW-HIGH  
PULSE  
1.5V  
SYNCHRONOUS CONTROL  
PRESET  
3V  
1.5V  
0V  
CLEAR  
CLOCK ENABLE  
ETC.  
tSU  
tH  
Pulse Width  
Set-up, Hold, and Release Times  
ENABLE  
DISABLE  
3V  
3V  
SAME PHASE  
INPUT TRANSITION  
1.5V  
0V  
CONTROL  
INPUT  
1.5V  
0V  
tPLH  
tPLH  
tPHL  
tPHL  
tPZL  
tPLZ  
VOH  
1.5V  
VOL  
OUTPUT  
3.5V  
1.5V  
3.5V  
VOL  
OUTPUT  
NORMALLY  
LOW  
SWITCH  
CLOSED  
0.3V  
0.3V  
3V  
tPZH  
tPHZ  
OPPOSITE PHASE  
INPUT TRANSITION  
1.5V  
0V  
VOH  
OUTPUT  
NORMALLY  
HIGH  
SWITCH  
OPEN  
1.5V  
0V  
0V  
Propagation Delay  
Enable and Disable Times  
NOTES:  
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.  
2. Pulse Generator for All Pulses: Rate 1.0MHz; tF 2.5ns; tR 2.5ns.  
6
IDT74FCT16925AT/CT/ET  
FASTCMOS16-BITREGISTEREDTRANSCEIVER  
INDUSTRIALTEMPERATURERANGE  
ORDERINGINFORMATION  
IDT  
XX  
FCT  
XXXX  
XXX  
XX  
Temp. Range  
Family  
Package  
Device Type  
PV  
PA  
Shrink Small Outline Package  
Thin Shrink Small Outline Package  
952AT 16-Bit Registered Transceiver  
952CT  
952ET  
16  
74  
Double-Density, 5 Volt, High Drive  
40°C to +85°C  
DATASHEETDOCUMENTHISTORY  
6/24/2002 Updated as per PDNs Logic-00-07 and Logic-01-04  
CORPORATE HEADQUARTERS  
2975StenderWay  
Santa Clara, CA 95054  
for SALES:  
800-345-7015 or 408-727-6116  
fax: 408-492-8674  
for Tech Support:  
logichelp@idt.com  
(408) 654-6459  
www.idt.com  
7

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