IDT74FCT574DTP [IDT]
Bus Driver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, PDIP20, PLASTIC, DIP-20;
| 型号： | IDT74FCT574DTP |
| 厂家： | 
INTEGRATED DEVICE TECHNOLOGY |
| 描述： | Bus Driver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, PDIP20, PLASTIC, DIP-20 驱动 光电二极管 逻辑集成电路 触发器 |
| 文件： | 总8页 (文件大小：169K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
IDT54/74FCT374T/AT/CT/DT - 2374T/AT/CT
IDT54/74FCT534T/AT/CT
IDT54/74FCT574T/AT/CT/DT - 2574T/AT/CT
FAST CMOS OCTAL D
REGISTERS (3-STATE)
Integrated Device Technology, Inc.
FEATURES:
• Common features:
– Low input and output leakage ≤1µA (max.)
– CMOS power levels
– True TTL input and output compatibility
– VOH = 3.3V (typ.)
DESCRIPTION
The FCT374T/FCT2374T, FCT534T and FCT574T/
FCT2574T are 8-bit registers built using an advanced dual
metal CMOS technology. These registers consist of eight D-
type flip-flops with a buffered common clock and buffered 3-
state output control. When the output enable (OE) input is
LOW, the eight outputs are enabled. When the OE input is
HIGH, the outputs are in the high-impedance state.
Input data meeting the set-up and hold time requirements
of the D inputs is transferred to the Q outputs on the LOW-to-
HIGH transition of the clock input.
TheFCT2374TandFCT2574Thavebalancedoutputdrive
with current limiting resistors. This offers low ground bounce,
minimal undershoot and controlled output fall times-reducing
the need for external series terminating resistors. FCT2xxxT
parts are plug-in replacements for FCTxxxT parts.
– VOL = 0.3V (typ.)
– Meets or exceeds JEDEC standard 18 specifications
– Product available in Radiation Tolerant and Radiation
Enhanced versions
– Military product compliant to MIL-STD-883, Class B
and DESC listed (dual marked)
– Available in DIP, SOIC, SSOP, QSOP, CERPACK
and LCC packages
• Features for FCT374T/FCT534T/FCT574T:
– Std., A, C and D speed grades
– High drive outputs (-15mA IOH, 48mA IOL)
• Features for FCT2374T/FCT2574T:
– Std., A, and C speed grades
– Resistor outputs (-15mA IOH, 12mA IOL Com.)
(-12mA IOH, 12mA IOL Mil.)
– Reduced system switching noise
FUNCTIONAL BLOCK DIAGRAM FCT374/FCT2374T AND FCT574/FCT2574T
D0
D1
D2
D3
D4
D5
D6
D7
CP
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
CP
CP
CP
CP
CP
CP
CP
CP
OE
Q0
Q1
Q2
Q3
D3
Q4
D4
Q5
D5
Q6
D6
Q7
2569 drw 01
FUNCTIONAL BLOCK DIAGRAM FCT534T
D0
D1
D2
D7
CP
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
D
CP
CP
CP
CP
CP
CP
CP
CP
Q
OE
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
2569 drw 02
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
AUGUST 1995
1995 Integrated Device Technology, Inc.
6.13
DSC-4214/5
1
IDT54/74FCT374T/AT/CT/DT - 2374T/AT/CT, IDT54/74FCT534T/AT/CT, IDT54/74FCT574T/AT/CT/DT - 2574T/AT/CT
FAST CMOS OCTAL D REGISTERS (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATIONS
IDT54/74FCT374T
INDEX
1
20
19
18
17
16
15
14
VCC
OE
Q0
2
3
4
Q7
D7
D6
Q6
Q5
3
2
20 19
D0
D1
1
P20-1
D20-1
SO20-2
SO20-7
SO20-8
&
4
5
6
7
8
18
D7
D
Q
Q
1
17
16
15
14
D6
1
2
Q1
Q2
D2
D3
5
Q6
L20-2
6
Q5
D2
7
D5
D4
D3
D5
8
E20-1 13
9 10 11 12 13
9
12
11
Q3
GND
Q4
10
CP
2569 drw 03
DIP/SOIC/SSOP/QSOP/CERPACK
TOP VIEW
LCC
TOP VIEW
IDT54/74FCT574T
INDEX
1
20
19
18
17
16
15
14
13
12
11
VCC
OE
D0
2
3
4
Q0
Q1
Q2
Q3
Q4
3
2
20 19
D1
D2
P20-1
D20-1
SO20-2
SO20-7
SO20-8
&
1
4
D2
D3
D4
18
17
16
15
14
Q1
Q2
Q3
Q4
Q5
5
6
7
8
D3
5
L20-2
D4
6
D5
D6
D5
7
Q
5
6
E20-1
Q
D6
8
9 10 11 12 13
9
Q7
D7
GND
10
CP
2569 drw 04
DIP/SOIC/SSOP/QSOP/CERPACK
TOP VIEW
LCC
TOP VIEW
IDT54/74FCT534T
INDEX
1
20
19
18
17
16
15
14
13
12
11
VCC
OE
3
2
20 19
2
3
4
Q0
D0
Q7
D7
1
D1
4
5
6
7
8
D7
D6
18
17
16
15
14
Q1
Q2
D2
D3
P20-1
D20-1
SO20-2
SO20-8
&
D1
D6
L20-2
Q6
5
Q1
Q6
Q5
D5
D4
Q5
D5
6
Q2
D2
7
9 10 11 12 13
E20-1
D3
8
9
Q3
GND
Q4
2569 drw 05
10
CP
LCC
TOP VIEW
DIP/SOIC/QSOP/CERPACK
TOP VIEW
6.13
2
IDT54/74FCT374T/AT/CT/DT - 2374T/AT/CT, IDT54/74FCT534T/AT/CT, IDT54/74FCT574T/AT/CT/DT - 2574T/AT/CT
FAST CMOS OCTAL D REGISTERS (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN DESCRIPTION
Pin Names
Description
DN
D flip-flop data inputs
CP
Clock Pulse for the register. Enters data on
LOW-to-HIGH transition.
QN
QN
OE
3-state outputs, (true)
3-state outputs, (inverted)
Active LOW 3-state Output Enable input
2569 tbl 01
FUNCTION TABLE(1)
534
374/574
Inputs
CP
Outputs
Internal
QN
Outputs
QN
Internal
Function
DN
N
N
HI-Z
H
H
L
L
H
H
L
H
↑
↑
↑
↑
X
X
L
H
L
Z
Z
H
L
Z
Z
NC
NC
L
H
L
Z
Z
L
H
Z
Z
NC
NC
H
L
H
LOAD REGISTER
H
H
L
NOTE:
2569 tbl 02
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High Impedance
NC = No Change
↑ = LOW-to-HIGH transition
ABSOLUTE MAXIMUM RATINGS(1)
CAPACITANCE (TA = +25°C, f = 1.0MHz)
Symbol
Parameter(1)
Conditions Typ. Max. Unit
Symbol
Rating
Commercial
Military
Unit
(2)
CIN
Input
Capacitance
Output
VIN = 0V
6
8
10
pF
VTERM
Terminal Voltage
with Respect to
GND
–0.5 to +7.0 –0.5 to +7.0
V
COUT
VOUT = 0V
12
pF
(3)
VTERM
Terminal Voltage
with Respect to
GND
–0.5 to
–0.5 to
V
Capacitance
VCC +0.5
VCC +0.5
2569 lnk 04
NOTE:
1. This parameter is measured at characterization but not tested.
TA
Operating
0 to +70
–55 to +125 °C
Temperature
Temperature
Under Bias
Storage
TBIAS
TSTG
–55 to +125 –65 to +135 °C
–55 to +125 –65 to +150 °C
Temperature
Power Dissipation
PT
0.5
0.5
W
IOUT
DC Output
Current
–60 to +120 –60 to +120 mA
2569 lnk 03
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT-
INGS may cause permanent damage to the device. This is a stress rating
onlyandfunctionaloperationofthedeviceattheseoranyotherconditions
above those indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability. No terminal voltage may exceed
VCC by +0.5V unless otherwise noted.
2. Input and VCC terminals only.
3. Outputs and I/O terminals only.
6.13
3
IDT54/74FCT374T/AT/CT/DT - 2374T/AT/CT, IDT54/74FCT534T/AT/CT, IDT54/74FCT574T/AT/CT/DT - 2574T/AT/CT
FAST CMOS OCTAL D REGISTERS (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Commercial: TA = 0°C to +70°C, VCC = 5.0V ± 5%; Military: TA = –55°C to +125°C, VCC = 5.0V ± 10%
Symbol
Parameter
Input HIGH Level
Test Conditions(1)
Min. Typ.(2) Max.
Unit
VIH
Guaranteed Logic HIGH Level
2.0
—
—
—
—
—
—
—
—
—
—
—
—
V
VIL
Input LOW Level
Guaranteed Logic LOW Level
0.8
V
I
I
I
I
I
I H
I L
Input HIGH Current(4)
Input LOW Current(4)
High Impedance Output Current
(3-State Output pins)(4)
Input HIGH Current(4)
Clamp Diode Voltage
Input Hysteresis
V
CC = Max.
CC = Max.
CC = Max., V
V
V
V
V
I
I
= 2.7V
= 0.5V
—
±1
±1
±1
±1
±1
µA
µA
µA
—
OZH
OZL
I
V
O
O
= 2.7V
= 0.5V
—
—
V
V
I
= VCC (Max.)
—
V
IK
H
CC = Min., IIN = –18mA
—
–0.7
200
0.01
–1.2
—
V
V
mV
I
CC
Quiescent Power Supply Current
V
CC = Max., VIN = GND or VCC
1
mA
2569 lnk 05
OUTPUT DRIVE CHARACTERISTICS FOR FCT374T/534T/574T
Symbol
Parameter
Test Conditions(1)
Min. Typ.(2) Max.
Unit
V
OH
Output HIGH Voltage
V
V
CC = Min.
I
I
I
I
I
I
OH = –6mA MIL.
2.4
2.0
—
3.3
3.0
0.3
—
V
IN = VIH or VIL
OH = –8mA COM'L.
OH = –12mA MIL.
OH = –15mA COM'L.
OL = 32mA MIL.
—
V
V
VOL
Output LOW Voltage
Short Circuit Current
V
V
V
CC = Min.
IN = VIH or VIL
0.5
OL = 48mA COM'L.
I
OS
CC = Max., V
O
= GND(3)
–60
–120 –225
mA
2569 lnk 06
OUTPUT DRIVE CHARACTERISTICS FOR FCT2374T/2574T
Symbol
Parameter
Test Conditions(1)
Min. Typ.(2) Max.
Unit
IODL
Output LOW Current
VCC = 5V, VIN = VIH or VIL, VOUT= 1.5V(3)
VCC = 5V, VIN = VIH or VIL, VOUT= 1.5V(3)
16
–16
2.4
48
–48
3.3
—
—
—
mA
IODH
VOH
Output HIGH Current
Output HIGH Voltage
mA
V
VCC = Min.
VIN = VIH or VIL
VCC = Min.
IOH = –12mA MIL.
IOH = –15mA COM'L.
IOL = 12mA
VOL
Output LOW Voltage
—
0.3
0.50
V
VIN = VIH or VIL
2569 lnk 07
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5.0V, +25°C ambient.
3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second.
4. The test limit for this parameter is ±5µA at TA = –55°C.
6.13
4
IDT54/74FCT374T/AT/CT/DT - 2374T/AT/CT, IDT54/74FCT534T/AT/CT, IDT54/74FCT574T/AT/CT/DT - 2574T/AT/CT
FAST CMOS OCTAL D REGISTERS (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
Symbol
Parameter
Quiescent Power Supply Current
TTL Inputs HIGH
Test Conditions(1)
Min. Typ.(2) Max.
Unit
∆ICC
VCC = Max.
VIN = 3.4V(3)
—
—
—
0.5
2.0
mA
ICCD
Dynamic Power Supply
Current(4)
VCC = Max.
Outputs Open
OE = GND
VIN = VCC FCTxxxT
VIN = GND
0.15
0.06
0.25
0.12
mA/
MHz
FCT2xxxT
One Input Toggling
50% Duty Cycle
VCC = Max.
Outputs Open
fCP = 10MHz
50% Duty Cycle
OE = GND
IC
Total Power Supply Current(6)
VIN = VCC FCTxxxT
VIN = GND
—
—
—
1.5
0.6
2.0
1.1
3.8
1.5
6.0
3.8
3.5
2.2
mA
FCT2xxxT
VIN = 3.4
FCTxxxT
5.5
fi = 5MHz
VIN = GND
50% Duty Cycle
One Bit Toggling
VCC = Max.
Outputs Open
fCP = 10MHz
50% Duty Cycle
OE = GND
FCT2xxxT
4.2
VIN = VCC FCTxxxT
VIN = GND
—
—
—
—
7.3(5)
4.0(5)
16.3(5)
13.0(5)
FCT2xxxT
VIN = 3.4
FCTxxxT
Eight Bits Toggling
fi = 2.5MHz
VIN = GND
FCT2xxxT
50% Duty Cycle
2569 tbl 08
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fCP/2 + fiNi)
ICC = Quiescent Current
∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
fi = Input Frequency
Ni = Number of Inputs at fi
All currents are in milliamps and all frequencies are in megahertz.
6.13
5
IDT54/74FCT374T/AT/CT/DT - 2374T/AT/CT, IDT54/74FCT534T/AT/CT, IDT54/74FCT574T/AT/CT/DT - 2574T/AT/CT
FAST CMOS OCTAL D REGISTERS (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
FCT374T/534T/574T
FCT374AT/534AT/574AT
FCT2374AT/2574AT
FCT2374T/2574T
Com'l.
Mil.
Min.(2)
Com'l.
Mil.
Min.(2)
Min.(2)
Max.
Max.
Min.(2)
Max.
Max.
Symbol
Parameter
Conditions(1)
CL = 50pF
Unit
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tSU
Propagation Delay
2.0
1.5
1.5
2.0
1.5
7.0
10.0
2.0
1.5
1.5
2.0
1.5
7.0
11.0
2.0
1.5
1.5
2.0
1.5
5.0
6.5
2.0
1.5
1.5
2.0
1.5
6.0
7.2
ns
(3)
CP to QN
RL = 500Ω
Output Enable Time
Output Disable Time
12.5
8.0
—
14.0
8.0
—
6.5
5.5
—
7.5
6.5
—
ns
ns
ns
ns
Set-up Time HIGH
or LOW, DN to CP
Hold Time HIGH
or LOW, DN to CP
CP Pulse Width
HIGH or LOW
tH
—
—
—
—
tW
—
—
—
—
ns
2569 tbl 09
FCT374CT/534CT/574CT
FCT2374CT/2574CT
FCT374DT/574DT
Com'l. Mil.
Min.(2)
Com'l.
Mil.
Min.(2)
Min.(2)
Max.
Max.
Min.(2)
Max.
Max.
Symbol
Parameter
Conditions(1)
CL = 50pF
Unit
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tSU
Propagation Delay
2.0
1.5
1.5
2.0
1.5
5.0
5.2
2.0
1.5
1.5
2.0
1.5
6.0
6.2
2.0
4.2
—
—
—
—
—
—
—
ns
(3)
CP to QN
RL = 500Ω
Output Enable Time
Output Disable Time
5.5
5.0
—
6.2
5.7
—
1.5
1.5
2.0
1.0
3.0
4.8
4.0
—
—
—
—
—
—
ns
ns
ns
ns
Set-up Time HIGH
or LOW, DN to CP
Hold Time HIGH
or LOW, DN to CP
CP Pulse Width
HIGH or LOW(4)
tH
—
—
—
tW
—
—
—
ns
NOTES:
2569 tbl 10
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. ON for FCT374/2374T and FCT574/2574T, ON for FCT534T.
4. This parameter is guaranteed but not tested.
6.13
6
IDT54/74FCT374T/AT/CT/DT - 2374T/AT/CT, IDT54/74FCT534T/AT/CT, IDT54/74FCT574T/AT/CT/DT - 2574T/AT/CT
FAST CMOS OCTAL D REGISTERS (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TEST CIRCUITS AND WAVEFORMS
SWITCH POSITION
TEST CIRCUITS FOR ALL OUTPUTS
Test
Switch
VCC
7.0V
Open Drain
Disable Low
Closed
500
Ω
Ω
VOUT
VIN
Enable Low
Pulse
Generator
Open
D.U.T.
All Other Tests
DEFINITIONS:
50pF
500
CL= Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse
Generator.
T
R
C
L
2569 drw 06
SET-UP, HOLD AND RELEASE TIMES
PULSE WIDTH
3V
DATA
1.5V
0V
INPUT
LOW-HIGH-LOW
t
H
t
SU
1.5V
PULSE
3V
1.5V
0V
TIMING
INPUT
ASYNCHRONOUS CONTROL
t
W
t
REM
PRESET
CLEAR
ETC.
3V
1.5V
0V
HIGH-LOW-HIGH
PULSE
1.5V
SYNCHRONOUS CONTROL
PRESET
3V
1.5V
0V
CLEAR
t
SU
tH
CLOCK ENABLE
ETC.
2569 drw 08
2569 drw 07
PROPAGATION DELAY
ENABLE AND DISABLE TIMES
ENABLE
DISABLE
3V
1.5V
0V
3V
SAME PHASE
CONTROL
INPUT
1.5V
0V
INPUT TRANSITION
t
PLH
t
t
PHL
PHL
t
PZL
tPLZ
VOH
OUTPUT
3.5V
1.5V
3.5V
1.5V
OUTPUT
NORMALLY
LOW
SWITCH
CLOSED
VOL
tPLH
0.3V
0.3V
V
OL
3V
1.5V
0V
t
PZH
tPHZ
OPPOSITE PHASE
INPUT TRANSITION
V
OH
OUTPUT
NORMALLY
HIGH
SWITCH
OPEN
1.5V
0V
2569 drw 09
0V
2569 drw 10
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-
HIGH
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns
6.13
7
IDT54/74FCT374T/AT/CT/DT - 2374T/AT/CT, IDT54/74FCT534T/AT/CT, IDT54/74FCT574T/AT/CT/DT - 2574T/AT/CT
FAST CMOS OCTAL D REGISTERS (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ORDERING INFORMATION
IDT
XX
FCT
X
XXXX
X
X
Temp. Range
Family
Device Type
Package
Process
Blank
B
Commercial
MIL-STD-883, Class B
P
Plastic DIP
D
CERDIP
SO
L
E
Small Outline IC
Leadless Chip Carrier
CERPACK
PY
Q
Shrink Small Outline Package
Quarter-size Small Outline Package
374T
574T
534T
Non-Inverting Octal D Register
Non-Inverting Octal D Register
Inverting Octal D Register
374AT
574AT
534AT
374CT
574CT
534CT
374DT
574DT
Blank
2
High Drive
Balanced Drive
54
74
–55
°C to +125°C
0°
C to +70°C
2569 drw 11
6.13
8
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