IDT74FCT841ATPYG [IDT]
Bus Driver, FCT Series, 1-Func, 10-Bit, True Output, CMOS, PDSO24, SSOP-24;
| 型号： | IDT74FCT841ATPYG |
| 厂家： | 
INTEGRATED DEVICE TECHNOLOGY |
| 描述： | Bus Driver, FCT Series, 1-Func, 10-Bit, True Output, CMOS, PDSO24, SSOP-24 锁存器 |
| 文件： | 总7页 (文件大小：144K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
IDT54/74FCT841A/B/C
HIGH-PERFORMANCE
CMOS BUS INTERFACE
LATCHES
Integrated Device Technology, Inc.
FEATURES:
DESCRIPTION:
The IDT54/74FCT800 series is built using an advanced
dual metal CMOS technology.
• Equivalent to AMD’s Am29841-46 bipolar registers in
pinout/function, speed and output drive over full tem-
perature and voltage supply extremes
The IDT54/74FCT840 series bus interface latches are
designed to eliminate the extra packages required to buffer
existinglatchesandprovideextradatawidthforwider address/
data paths or buses carrying parity. The IDT54/74FCT841 is
a buffered, 10-bit wide version of the popular ‘373 function.
All of the IDT54/74FCT800 high-performance interface
familyaredesignedforhigh-capacitanceloaddrivecapability,
while providing low-capacitance bus loading at both inputs
and outputs. All inputs have clamp diodes and all outputs are
designed for low-capacitance bus loading in the high-imped-
ance state.
• IDT54/74FCT841A equivalent to FAST speed
• IDT54/74FCT841B 25% faster than FAST
• IDT54/74FCT841C 40% faster than FAST
• Buffered common latch enable, clear and preset inputs
• IOL = 48mA (commercial) and 32mA (military)
• Clamp diodes on all inputs for ringing suppression
• CMOS power levels (1mW typ. static)
• TTL input and output level compatible
• CMOS output level compatible
• Substantially lower input current levels than AMD’s
bipolar Am29800 series (5µA max.)
• Product available in Radiation Tolerant and Radiation
Enhanced versions
• Military product compliant to MIL-STD-883, Class B
FUNCTIONAL BLOCK DIAGRAM
D0
DN
PRE
P
D
P
D
Q
Q
LE
LE
CLR
CLR
CLR
LE
OE
Y0
YN
2607 drw 01
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
FAST is a trademark of National Semiconductor Co.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
APRIL 1994
1994 Integrated Device Technology, Inc.
7.22
DSC-4603/2
1
IDT54/74FCT841A/B/C
HIGH-PERFORMANCE CMOS BUS INTERFACE LATCHES
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATIONS
INDEX
1
2
3
4
5
24
23
22
VCC
Y0
Y1
Y2
Y3
OE
D0
D1
D2
D3
D4
D5
D6
D7
D8
4
3
2
28 27 26
21
20
1
P24-1
D24-1
D2
D3
D4
5
25
24
Y2
Y3
Y4
NC
Y5
Y6
Y7
6
E24-1 19
6
7
Y4
Y5
Y6
Y7
Y8
7
23
22
&
18
17
16
8
NC
D5
D6
D7
L28-1
SO24-2
8
9
21
20
19
9
10
10
15
14
13
11
12 13 14 15 16 17 18
D9
GND
11
12
Y9
LE
LCC
TOP VIEW
DIP/CERPACK/SOIC
TOP VIEW
2607 drw 02
2607 drw 03
FUNCTION TABLE(1)
PIN DESCRIPTION
Name
CLR
I/O
Description
Inter- Out-
I
When CLR is LOW, the outputs are
LOW if OE is LOW. When CLR is HIGH,
data can be entered into the latch.
The latch data inputs.
Inputs
nal
puts
LE
X
H
H
L
D
I
Q
I
YI
Function
CLR PRE OE
H
H
H
H
H
H
H
H
L
H
H
H
H
L
X
L
X
L
Z
Z
Z
Z
L
High Z
High Z
High Z
DI
I
I
H
LE
The latch enable input. The latches are
transparent when LE is HIGH. Input
data is latched on the HIGH-to-LOW
transition.
H
H
X
L
H
H
NC
L
Latched (High Z)
Transparent
H
H
H
L
YI
O
I
The 3-state latch outputs.
H
L
H
X
X
X
X
X
X
H
H
Transparent
OE
The output enable control. When OE is
LOW, the outputs are enabled. When
OE is HIGH, the outputs (Y I) are in the
high-impedance (off) state.
H
L
NC
H
NC Latched
H
L
X
X
X
L
H
L
Preset
L
H
L
L
L
Clear
L
L
L
H
H
Z
Z
Preset
PRE
I
Preset line. When PRE is LOW, the
outputs are HIGH if OE is LOW. Preset
overrides CLR.
H
L
H
H
L
Latched (High Z)
Latched (High Z)
H
L
H
2607 tbl 01
NOTE:
2607 tbl 02
1. H = HIGH, L = LOW, X = Don’t Care, NC = No Change,
Z = High Impedance
7.22
2
IDT54/74FCT841A/B/C
HIGH-PERFORMANCE CMOS BUS INTERFACE LATCHES
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ABSOLUTE MAXIMUM RATINGS(1)
CAPACITANCE (TA = +25°C, f = 1.0MHz)
(1)
Symbol
Rating
Commercial
Military
Unit
Symbol Parameter
Conditions
IN = 0V
Typ. Max. Unit
(2)
CIN
Input
V
6
8
10
pF
VTERM
Terminal Voltage –0.5 to +7.0 –0.5 to +7.0
V
with Respect to
GND
Capacitance
Output
COUT
VOUT = 0V
12
pF
(3)
VTERM
Terminal Voltage –0.5 to VCC
with Respect to
–0.5 to VCC
V
Capacitance
NOTE:
1. This parameter is measured at characterization but not tested.
2607 tbl 04
GND
TA
Operating
0 to +70
–55 to +125 °C
Temperature
Temperature
Under Bias
Storage
TBIAS
TSTG
–55 to +125 –65 to +135 °C
–55 to +125 –65 to +150 °C
Temperature
Power Dissipation
PT
0.5
0.5
W
IOUT
DC Output
Current
120
120
mA
NOTE:
2607 tbl 03
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability. No terminal voltage
may exceed VCC by +0.5V unless otherwise noted.
2. Input and VCC terminals only.
3. Outputs and I/O terminals only.
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: VLC = 0.2V; VHC = VCC – 0.2V
Commercial: TA = 0°C to +70°C, VCC = 5.0V ± 5%; Military: TA = –55°C to +125°C, VCC = 5.0V ± 10%
Symbol
Parameter
Input HIGH Level
Test Conditions(1)
Min. Typ.(2) Max.
Unit
VIH
Guaranteed Logic HIGH Level
2.0
—
—
—
—
0.8
5
V
VIL
II H
Input LOW Level
Guaranteed Logic LOW Level
V
Input HIGH Current
VCC = Max.
VI = VCC
—
—
µA
VI = 2.7V
VI = 0.5V
VI = GND
VO = VCC
VO = 2.7V
VO = 0.5V
VO = GND
—
—
5(4)
–5(4)
–5
II L
Input LOW Current
—
—
—
—
IOZH
IOZL
Off State (High Impedance)
Output Current
VCC = Max.
—
—
10
µA
—
—
10(4)
–10(4)
–10
–1.2
—
—
—
—
—
VIK
IOS
Clamp Diode Voltage
Short Circuit Current
Output HIGH Voltage
VCC = Min., IN = –18mA
VCC = Max.(3), VO = GND
—
–0.7
–120
VCC
VCC
4.3
4.3
GND
V
mA
V
–75
VHC
VHC
2.4
2.4
—
VOH
VCC = 3V, VIN = VLC or VHC, IOH = –32µA
—
VCC = Min.
IOH = –300µA
—
VIN = VIH or VIL
IOH = –15mA MIL.
IOH = –24mA COM'L.
—
—
VOL
Output LOW Voltage
VCC = 3V, VIN = VLC or VHC, IOL = 300µA
VLC
(4)
V
2607 tbl 05
3
VCC = Min.
IOL = 300µA
—
GND VLC
VIN = VIH or VIL
IOL = 32mA MIL.
IOL = 48mA COM'L.
—
0.3
0.3
0.5
0.5
—
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient and maximum loading.
3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second.
4. This parameter is guaranteed but not tested.
7.22
IDT54/74FCT841A/B/C
HIGH-PERFORMANCE CMOS BUS INTERFACE LATCHES
MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
VLC = 0.2V; VHC = VCC – 0.2V
Symbol
Parameter
Test Conditions(1)
Min. Typ.(2) Max.
Unit
Quiescent Power Supply Current
VCC = Max.
VIN ≥ VHC; V IN ≤ VLC
ICC
—
0.2
1.5
mA
Quiescent Power Supply Current
TTL Inputs HIGH
VCC = Max.
∆ICC
—
—
0.5
2.0
mA
VIN = 3.4V(3)
VCC = Max.
ICCD
Dynamic Power Supply
Current(4)
VIN ≥ VHC
VIN ≤ VLC
0.15
0.25
mA/
MHz
Outputs Open
OE = GND
LE = VCC
One Input Toggling
50% Duty Cycle
VCC = Max.
Outputs Open
fi = 10MHz
IC
Total Power Supply Current(6)
VIN ≥ VHC
VIN ≤ VLC
(FCT)
—
1.7
4.0
mA
50% Duty Cycle
OE = GND
LE = VCC
One Bit Toggling
VCC = Max.
Outputs Open
fi = 2.5MHz
VIN = 3.4V
VIN = GND
—
—
2.0
3.2
5.0
VIN ≥ VHC
VIN ≤ VLC
(FCT)
6.5(5)
50% Duty Cycle
OE = GND
LE = VCC
VIN = 3.4V
VIN = GND
—
5.2
14.5(5)
Eight Bits Toggling
NOTES:
2607 tbl 06
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V); all other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fCP/2 + fiNi)
ICC = Quiescent Current
∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
fi = Input Frequency
Ni = Number of Inputs at fi
All currents are in milliamps and all frequencies are in megahertz.
7.22
4
IDT54/74FCT841A/B/C
HIGH-PERFORMANCE CMOS BUS INTERFACE LATCHES
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
FCT841A
FCT841B
FCT841C
Com'l. Mil.
Com'l.
Mil.
Com'l. Mil.
(2)
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Min.
Conditions(1)
CL = 50pF
Min.
Max.
Unit
Symbol
tPLH
Parameter
Propagation Delay
1.5 9.0 1.5 10.0 1.5 6.5 1.5 7.5 1.5 5.5 1.5 6.3 ns
1.5 13.0 1.5 15.0 1.5 13.0 1.5 15.0 1.5 13.0 1.5 15.0
1.5 12.0 1.5 13.0 1.5 8.0 1.5 10.5 1.5 6.4 1.5 6.8 ns
1.5 16.0 1.5 20.0 1.5 15.5 1.5 18.0 1.5 15.0 1.5 16.0
tPHL
DI to YI (LE = HIGH)
RL = 500Ω
CL = 300pF(4)
RL = 500Ω
CL = 50pF
tPLH
tPHL
Propagation Delay
LE to YI
RL = 500Ω
CL = 300pF(4)
RL = 500Ω
CL = 50pF
tPLH
tPHL
tPHL
tPLH
Propagation Delay, PRE to YI
Propagation Delay, CLR to YI
Output Enable Time OE to YI
1.5 12.0 1.5 14.0 1.5 8.0 1.5 10.0 1.5 7.0 1.5 9.0 ns
1.5 14.0 1.5 17.0 1.5 10.0 1.5 13.0 1.5 9.0 1.5 12.0
1.5 13.0 1.5 14.0 1.5 10.0 1.5 11.0 1.5 9.0 1.5 10.0 ns
1.5 14.0 1.5 17.0 1.5 10.0 1.5 10.0 1.5 9.0 1.5 9.0
RL = 500Ω
tPZH
tPZL
CL = 50pF
RL = 500Ω
CL = 300pF(4)
RL = 500Ω
CL = 5pF(4)
RL = 500Ω
CL = 50pF
RL = 500Ω
CL = 50pF
1.5 11.5 1.5 13.0 1.5 8.0 1.5 8.5 1.5 6.5 1.5 7.3 ns
1.5 23.0 1.5 25.0 1.5 14.0 1.5 15.0 1.5 12.0 1.5 13.0
1.5 7.0 1.5 9.0 1.5 6.0 1.5 6.5 1.5 5.7 1.5 6.0 ns
1.5 8.0 1.5 10.0 1.5 7.0 1.5 7.5 1.5 6.0 1.5 6.3
tPHZ
tPLZ
Output Disable Time OE to Y I
Data to LE Set-up Time
tSU
tH
2.5
2.5
4.0
5.0
4.0
4.0
3.0
—
—
—
—
—
—
—
2.5
3.0
5.0
7.0
5.0
4.0
3.0
—
—
—
—
—
—
—
2.5
2.5
4.0
4.0
4.0
4.0
3.0
—
—
—
—
—
—
—
2.5
2.5
4.0
4.0
4.0
4.0
3.0
—
—
—
—
—
—
—
2.5
2.5
4.0
4.0
4.0
4.0
3.0
—
—
—
—
—
—
—
2.5
2.5
4.0
4.0
4.0
4.0
3.0
—
—
—
—
—
—
—
ns
ns
ns
ns
ns
ns
ns
Data to LE Hold Time
(3)
RL = 500Ω
tW
LE Pulse Width
PRE Pulse Width
HIGH
LOW
LOW
(3)
(3)
tW
tW
CLR Pulse Width
tREM
Recovery Time PRE to LE
Recovery Time CLR to LE
tREM
NOTES:
2607 tbl 07
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. These parameters are guaranteed but not tested.
4. These conditions are guaranteed but not tested.
7.22
5
IDT54/74FCT841A/B/C
HIGH-PERFORMANCE CMOS BUS INTERFACE LATCHES
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS
VCC
SWITCH POSITION
Test
Switch
Closed
Open
7.0V
Open Drain
Disable Low
Enable Low
500Ω
VOUT
VIN
Pulse
Generator
All Other Tests
D.U.T.
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse
Generator.
2607 tbl 08
50pF
C L
500Ω
T
R
SET-UP, HOLD AND RELEASE TIMES
PULSE WIDTH
3V
DATA
1.5V
0V
INPUT
LOW-HIGH-LOW
tH
tSU
1.5V
PULSE
3V
1.5V
0V
TIMING
INPUT
ASYNCHRONOUS CONTROL
tW
tREM
PRESET
CLEAR
ETC.
3V
1.5V
0V
HIGH-LOW-HIGH
PULSE
1.5V
SYNCHRONOUS CONTROL
PRESET
3V
1.5V
0V
CLEAR
tSU
tH
CLOCK ENABLE
ETC.
PROPAGATION DELAY
ENABLE AND DISABLE TIMES
ENABLE
DISABLE
3V
1.5V
0V
3V
SAME PHASE
CONTROL
INPUT
1.5V
0V
INPUT TRANSITION
tPLH
tPHL
tPHL
tPZL
tPLZ
VOH
1.5V
VOL
OUTPUT
3.5V
1.5V
3.5V
VOL
OUTPUT
NORMALLY
LOW
SWITCH
CLOSED
tPLH
0.3V
0.3V
3V
1.5V
0V
tPZH
tPHZ
OPPOSITE PHASE
INPUT TRANSITION
VOH
OUTPUT
NORMALLY
HIGH
SWITCH
OPEN
1.5V
0V
0V
2607 drw 04
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-
HIGH
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns
7.22
6
IDT54/74FCT841A/B/C
HIGH-PERFORMANCE CMOS BUS INTERFACE LATCHES
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ORDERING INFORMATION
IDT
XX
FCT
XXXX
X
X
Temp. Range
Device Type
Package
Process
Blank
Commercial
B
MIL-STD-883, Class B
P
Plastic DIP
D
CERDIP
E
CERPACK
L
SO
Leadless Chip Carrier
Small Outline IC
841A
841B
841C
10-Bit Non-Inverting Latch
54
74
–55°C to +125°C
0°C to +70°C
2607 drw 05
7.22
7
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