IDT74LVCH244ASO [IDT]

3.3V CMOS OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS AND BUS-HOLD; 3.3V CMOS八路缓冲器/驱动器，具有三态输出和总线HOLD


型号：	IDT74LVCH244ASO
厂家：	INTEGRATED DEVICE TECHNOLOGY
描述：	3.3V CMOS OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS AND BUS-HOLD 3.3V CMOS八路缓冲器/驱动器，具有三态输出和总线HOLD 总线驱动器总线收发器逻辑集成电路光电二极管输出元件
文件：	总6页 (文件大小：67K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

IDT74LVCH244A

INDUSTRIALTEMPERATURERANGE

3.3VCMOSOCTALBUFFER/DRIVERWITH3-STATEOUTPUTS

3.3V CMOS

OCTAL BUFFER/DRIVER

IDT74LVCH244A

WITH 3-STATE OUTPUTS

AND BUS-HOLD

FEATURES:

DESCRIPTION:

• 0.5 MICRON CMOS Technology

The LVCH244A octal buffer/driver is built using advanced dual metal

CMOS technology. This device is organized as two 4-bit line drivers with

separate output-enable (OE) inputs. When OE is low, the device passes

data from the A inputs to the Y outputs. When OE is high, the outputs are

inthehigh-impedancestate.

• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using

machine model (C = 200pF, R = 0)

• VCC = 3.3V ± 0.3V, Normal Range

• VCC = 2.7V to 3.6V, Extended Range

• CMOS power levels (0.4µ W typ. static)

• Rail-to-rail output swing for increased noise margin

• All inputs, outputs, and I/O are 5V tolerant

• Supports hot insertion

The LVCH244A has been designed with a ±24mA output driver. This

driver is capable of driving a moderate to heavy load while maintaining

speedperformance.

To ensure the high-impedance state during power up or power down,

OE should be tied to VCC through a pullup resistor; the minimum value of

the resistor is determined by the current-sinking capability of the driver.

Inputs can be driven from either 3.3V or 5V devices. This feature allows

theuseofthisdeviceasatranslatorinamixed3.3V/5Vsystemenvironment.

The LVCH244A has “bus-hold” which retains the inputs’ last state

whenevertheinputgoestoahighimpedance.This preventsfloatinginputs

and eliminates the need for pull-up/down resistors.

• Available in SOIC, SSOP, QSOP, and TSSOP packages

DRIVE FEATURES:

• High Output Drivers: ±24mA

• Reduced system switching noise

APPLICATIONS:

• 5V and 3.3V mixed voltage systems

• Data communication and telecommunication systems

FUNCTIONALBLOCKDIAGRAM

¹OE

²OE

¹Y1

¹Y2

¹Y3

¹Y4

1A1

²Y1

2Y2

²Y3

²Y4

2A1

²A2

²A3

²A4

¹A2

¹A3

¹A4

TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.

INDUSTRIAL TEMPERATURE RANGE

AUGUST 1999

DSC-4625/1

IDT74LVCH244A

3.3VCMOSOCTALBUFFER/DRIVERWITH3-STATEOUTPUTS

INDUSTRIALTEMPERATURERANGE

ABSOLUTEMAXIMUMRATINGS⁽¹⁾

PINCONFIGURATION

Symbol

VTERM

TSTG

Description

Terminal Voltage with Respect to GND

Storage Temperature

Max

Unit

–0.5 to +6.5

–65 to +150

–50 to +50

–50

°C

VCC

2OE

1Y1

²A4

¹Y2

2A3

¹Y3

²A2

1Y4

²A1

1OE

1A1

2Y4

¹A2

2Y3

¹A3

IOUT

DC Output Current

IIK

IOK

Continuous Clamp Current,

VI < 0 or VO < 0

ICC

ISS

Continuous Current through each

VCC or GND

±100

NOTE:

1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause

permanent damage to the device. This is a stress rating only and functional operation

of the device at these or any other conditions above those indicated in the operational

sections of this specification is not implied. Exposure to absolute maximum rating

conditions for extended periods may affect reliability.

2Y2

1A4

CAPACITANCE (TA = +25°C, F = 1.0MHz)

Symbol

Parameter⁽¹⁾

Conditions

VIN = 0V

VOUT = 0V

VIN = 0V

Typ.

Max. Unit

²Y1

CIN

Input Capacitance

Output Capacitance

I/O Port Capacitance

4.5

COUT

CI/O

5.5

GND

6.5

NOTE:

1. As applicable to the device type.

SOIC/ SSOP/ QSOP/ TSSOP

TOP VIEW

PINDESCRIPTION

Pin Names

Description

xAx

xYx

xOE

Data Inputs⁽¹⁾

3-State Outputs

Output Enable Inputs⁽¹⁾(Active LOW)

NOTE:

1. These pins have "Bus-Hold". All other pins are standard inputs, outputs, or I/Os.

(1)

FUNCTION TABLE (EACH BUFFER)

Inputs

Outputs

xYx

xOE

xAx

NOTES:

1. H = HIGH Voltage Level

X = Don’t Care

L = LOW Voltage Level

Z = High-Impedance

IDT74LVCH244A

INDUSTRIALTEMPERATURERANGE

3.3VCMOSOCTALBUFFER/DRIVERWITH3-STATEOUTPUTS

DCELECTRICALCHARACTERISTICSOVEROPERATINGRANGE

FollowingConditionsApplyUnlessOtherwiseSpecified:

Operating Condition: TA = –40°C to +85°C

Symbol

Parameter

Test Conditions

Min.

1.7

Typ.⁽¹⁾

—

Max.

—

Unit

VIH

Input HIGH Voltage Level

VCC = 2.3V to 2.7V

VCC = 2.7V to 3.6V

—

VIL

Input LOW Voltage Level

Input Leakage Current

VCC = 2.3V to 2.7V

VCC = 2.7V to 3.6V

—

0.7

0.8

IIH

IIL

VCC = 3.6V

VI = 0 to 5.5V

—

±5

µA

IOZH

IOZL

High Impedance Output Current

(3-State Output pins)

VCC = 3.6V

VO = 0 to 5.5V

—

±10

IOFF

VIK

Input/Output Power Off Leakage

Clamp Diode Voltage

VCC = 0V, VIN or VO ≤ 5.5V

—

±50

µA

VCC = 2.3V, IIN = –18mA

–0.7

–1.2

Input Hysteresis

VCC = 3.3V

VCC = 3.6V

—

100

—

µA

ICCL

ICCH

ICCZ

Quiescent Power Supply Current

VIN = GND or VCC

3.6 ≤ VIN ≤ 5.5V⁽²⁾

—

500

∆ICC

Quiescent Power Supply Current

Variation

One input at VCC - 0.6V, other inputs at VCC or GND

µA

NOTES:

1. Typical values are at VCC = 3.3V, +25°C ambient.

2. This applies in the disabled state only.

BUS-HOLDCHARACTERISTICS

Symbol

IBHH

Parameter⁽¹⁾

Test Conditions

VI = 2V

Min.

–75

Typ.⁽²⁾

—

Max.

—

Unit

Bus-HoldInputSustainCurrent

VCC = 3V

µA

IBHL

VI = 0.8V

—

IBHH

Bus-HoldInputSustainCurrent

Bus-Hold Input Overdrive Current

VCC = 2.3V

VCC = 3.6V

VI = 1.7V

—

µA

IBHL

VI = 0.7V

—

IBHHO

VI = 0 to 3.6V

—

±500

IBHLO

NOTES:

1. Pins with Bus-Hold are identified in the pin description.

2. Typical values are at VCC = 3.3V, +25°C ambient.

IDT74LVCH244A

3.3VCMOSOCTALBUFFER/DRIVERWITH3-STATEOUTPUTS

INDUSTRIALTEMPERATURERANGE

OUTPUTDRIVECHARACTERISTICS

Symbol

Parameter

TestConditions⁽¹⁾

Min.

VCC – 0.2

Max.

—

Unit

VOH

Output HIGH Voltage

VCC = 2.3V to 3.6V

IOH = – 0.1mA

IOH = – 6mA

IOH = – 12mA

VCC = 2.3V

VCC = 2.7V

VCC = 3V

—

1.7

—

2.2

—

2.4

—

VCC = 3V

IOH = – 24mA

IOL = 0.1mA

IOL = 6mA

2.2

—

VOL

OutputLOWVoltage

VCC = 2.3V to 3.6V

VCC = 2.3V

—

0.2

0.4

0.7

0.4

0.55

—

IOL = 12mA

IOL = 24mA

—

VCC = 2.7V

VCC = 3V

—

NOTE:

1. VIH and VIL must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the appropriate VCC range.

TA = – 40°C to + 85°C.

OPERATING CHARACTERISTICS, VCC = 3.3V ± 0.3V, TA = 25°C

Symbol

Parameter

Test Conditions

Typical

Unit

CPD

PowerDissipationCapacitanceperBuffer/DriverOutputsenabled

PowerDissipationCapacitanceperBuffer/DriverOutputsdisabled

CL = 0pF, f = 10Mhz

CPD

SWITCHINGCHARACTERISTICS⁽¹⁾

VCC = 2.7V

Max.

VCC = 3.3V ± 0.3V

Symbol

tPLH

Parameter

Min.

Max.

Unit

PropagationDelay

xAx to xYx

—

6.9

1.5

5.9

tPHL

tPZH

OutputEnableTime

xOE to xYx

—

8.6

6.8

—

7.6

5.8

500

tPZL

tPHZ

OutputDisableTime

1.5

—

tPLZ

xOE to xYx

OutputSkew⁽²⁾

tSK(o)

NOTES:

1. See TEST CIRCUITS AND WAVEFORMS. TA = – 40°C to + 85°C.

2. Skew between any two outputs of the same package and switching in the same direction.

IDT74LVCH244A

INDUSTRIALTEMPERATURERANGE

3.3VCMOSOCTALBUFFER/DRIVERWITH3-STATEOUTPUTS

TESTCIRCUITSANDWAVEFORMS

TESTCONDITIONS

VIH

SAME PHASE

INPUT TRANSITION

Symbol VCC⁽¹⁾=3.3V±0.3V VCC⁽¹⁾=2.7V VCC⁽²⁾=2.5V±0.2V

Unit

tPHL

tPLH

VOH

VOL

OUTPUT

VLOAD

VIH

2 x Vcc

Vcc

2.7

1.5

300

2.7

1.5

300

tPLH

tPHL

Vcc / 2

150

VIH

OPPOSITE PHASE

INPUT TRANSITION

VLZ

VHZ

150

LVC Link

Propagation Delay

VLOAD

Open

GND

VCC

DISABLE

ENABLE

VIH

CONTROL

INPUT

500Ω

tPZL

tPLZ

VIN

VOUT

(1, 2)

Pulse

D.U.T.

VLOAD/2

Generator

OUTPUT

NORMALLY

LOW

SWITCH

VLOAD

V^OL+VLZ

VOL

500Ω

tPHZ

tPZH

VOH

VOH-VHZ

OUTPUT

NORMALLY

HIGH

SWITCH

GND

LVC Link

Test Circuit for All Outputs

LVC Link

DEFINITIONS:

CL = Load capacitance: includes jig and probe capacitance.

RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.

Enable and Disable Times

NOTE:

1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.

NOTES:

1. Pulse Generator for All Pulses: Rate ≤ 10MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.

2. Pulse Generator for All Pulses: Rate ≤ 10MHz; tF ≤ 2ns; tR ≤ 2ns.

VIH

DATA

INPUT

SWITCHPOSITION

Test

Switch

V^LOAD

GND

t^SU

VIH

TIMING

INPUT

Open Drain

Disable Low

Enable Low

tREM

ASYNCHRONOUS

CONTROL

Disable High

Enable High

SYNCHRONOUS

CONTROL

All Other Tests

Open

tSU

VIH

LVC Link

Set-up, Hold, and Release Times

INPUT

tPLH1

t^PHL1

V^OH

VOL

LOW-HIGH-LOW

OUTPUT 1

PULSE

tSK (x)

VOH

VOL

HIGH-LOW-HIGH

PULSE

OUTPUT 2

LVC Link

tPLH2

tPHL2

Pulse Width

tSK(x) = tPLH2 - tPLH1 or tPHL2 - tPHL1

LVC Link

Output Skew - tSK(X)

NOTES:

1. For tSK(o) OUTPUT1 and OUTPUT2 are any two outputs.

2. For tSK(b) OUTPUT1 and OUTPUT2 are in the same bank.

IDT74LVCH244A

3.3VCMOSOCTALBUFFER/DRIVERWITH3-STATEOUTPUTS

INDUSTRIALTEMPERATURERANGE

ORDERINGINFORMATION

LVC

IDT

XXXX

Temp. Range

Bus-Hold Device Type Package

Small Outline IC (gull wing)

Shrink Small Outline Package

Quarter Size Small Outline Package

Thin Shrink Small Outline Package

244A

Octal Buffer/Driver with 3-State Outputs, ±24mA

Bus-hold

–40°C to +85°C

CORPORATE HEADQUARTERS

for SALES:

for Tech Support:

2975StenderWay

Santa Clara, CA 95054

800-345-7015 or 408-727-6116

fax: 408-492-8674

www.idt.com

logichelp@idt.com

(408) 654-6459

IDT74LVCH244ASO [IDT]

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