IDTQS53805ASO [IDT]

Low Skew Clock Driver, 5 True Output(s), 0 Inverted Output(s), CMOS, PDSO20, SOIC-20;


型号：	IDTQS53805ASO
厂家：	INTEGRATED DEVICE TECHNOLOGY
描述：	Low Skew Clock Driver, 5 True Output(s), 0 Inverted Output(s), CMOS, PDSO20, SOIC-20 光电二极管
文件：	总6页 (文件大小：96K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

QS53805/A

GUARANTEEDLOWSKEW3.3VCMOSCLOCKDRIVER/BUFFER

INDUSTRIALTEMPERATURERANGE

GUARANTEED LOW SKEW

QS53805/A

3.3V CMOS CLOCK

DRIVER/BUFFER

FEATURES:

DESCRIPTION

−

10 output, low skew clock signal buffer

Pinout and function compatible with QS5805T

JEDEC compatible LVTTL inputs and outputs

Input hysteresis for better noise margin

Monitor output

TheQS53805clockbuffer/drivercircuitscanbeusedforclockbuffering

schemeswherelowskewisakeyparameter.Thisdeviceofferstwobanks

of5non-invertingoutputs.TheQS53805deviceprovideslowpropagation

delaybufferingwithon-chipskewof0.7nsforsame-transition,same-bank

signals.This clockbufferproductis designedforuseinhighperformance

workstations,embeddedandpersonalcomputingsystemsusing3Vto3.6V

supplyvoltages.Severalcanbe usedinparallelorscatteredthroughout

a system for guaranteed low skew, system-wide clock distribution net-

works. The QS53805 can accept 5V input and control signals.

Guaranteed low skew:

•

0.7ns output skew

1.1ns pulse skew

1ns part-to-part skew

−

Clock inputs are 5V tolerant

Std. and A speed grades

Available in QSOP and SOIC packages

The QS53805 is characterized for operation at -40°C to +85°C.

FUNCTIONALBLOCKDIAGRAM

OEA

INA

OA5 OA1

MON

INB

OB5 OB1

OEB

INDUSTRIAL TEMPERATURE RANGE

JULY 2000

1999 Integrated Device Technology, Inc.

DSC-5842/-

QS53805/A

GUARANTEEDLOWSKEW3.3VCMOSCLOCKDRIVER/BUFFER

INDUSTRIALTEMPERATURERANGE

ABSOLUTE MAXIMUM RATINGS ⁽¹⁾

PINCONFIGURATION

Symbol

Description

Supply Voltage to Ground

DC Output Voltage VOUT

DC Input Voltage VIN

Max.

– 0.5 to +7

– 0.5 to Vcc+0.5

– 0.5 to +7

-3

Unit

(2)

VTERM

VCCB

OB1

VCCA

OA1

OA2

(3)

VTERM

OB2

VAC

AC Input Voltage (pulse width ≤20ns)

IOUT

DC Output Current VIN < 0

DC Output Current Max. Sink Current/Pin

Storage Temperature

-20

°C

OA3

OB3

120

GNDA

GNDB

SO20-2

SO20-8

TSTG

– 65 to +150

150

OA4

OA5

Junction Temperature

OB5

MON

OEB

INB

NOTES:

GNDQ

1. Stresses greater than those listed under ABSOLUTE MAXIMUM

RATINGS may cause permanent damage to the device. This is a

stress rating only and functional operation of the device at these or

any other conditions above those indicated in the operational sections

of this specification is not implied. Exposure to absolute maximum

rating conditions for extended periods may affect reliability.

2. Vcc Terminals.

OEA

INA

QSOP/ SOIC

TOP VIEW

3. All terminals except Vcc.

CAPACITANCE

(TA = +25^OC, f = 1.0MHz, VIN = 0V, VOUT = 0V)

Pins

Typ.

Max. ⁽¹⁾

Unit

CIN

COUT

NOTE:

1. This parameter is guaranteed but not production tested.

RECOMMENDED OPERATING

CONDITIONS

Symbol

Description

Power Supply Voltage

Min.

Max Unit

VCC

3.6

5.5

VIN

Input Voltage

VOUT

Voltage Applied to Outputs

Ambient Operating Temperature

VCC

– 40

°C

PIN DESCRIPTION

Pin Names

I/O

Description

OEA, OEB

Output Enable

INA, INB

OAn, OBn

MON

Clock Inputs

Clock Outputs

Monitor Outputs (does not 3-state)

QS53805/A

GUARANTEEDLOWSKEW3.3VCMOSCLOCKDRIVER/BUFFER

INDUSTRIALTEMPERATURERANGE

DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE

Following Conditions Apply Unless Otherwise Specified:

Industrial: T^A= -40°C to +85°C, V^CC= 3.3V ± 0.3V

Symbol

Parameter

Input HIGH Voltage

Test Conditions

Min.

Typ.⁽¹⁾

Max.

Unit

VIH

Guaranteed Logic HIGH for Inputs

—

5.5

VIL

Input LOW Voltage

Clamp Diode Voltage ⁽³⁾

Guaranteed Logic LOW for Inputs

Vcc = Min., IIN = -18mA

–0.5

—

–0.7

—

0.8

–1.2

—

VIC

VOH

Output HIGH Voltage

Vcc = Min., IOH = -100µA

Vcc – 0.2

2.4

Vcc = Min., IOH = -8mA

—

VOL

Output LOW Voltage

Vcc = Min., IOL = 100µA

—

0.2

0.4

0.5

±1

Vcc = Min., IOL = 16mA

—

Vcc = Min., IOL = 24mA

—

IIN

Input Leakage Current

Output Leakage Current

Input Power Off Leakage

Output HIGH Current ⁽²⁾

Output LOW Current ⁽²⁾

Vcc = Max., VIN = Vcc or GND

Vcc = Max., VOUT = Vcc or GND

Vcc = 0V, VIN = Vcc or GND

Vcc = 3.3V, VIN = VIH or VIL, VO = 1.5V

Vcc = Max., VOUT = GND

—

µA

IOZ

—

±1

IOFF

IODH

IODL

IOS

—

±1

–30

–100

100

—

–200

200

—

(2,3)

Short Circuit Current

–

NOTES:

1. Typical values are at V^CC= 3.3V, T^A= 25°C.

2. Not more than one output should be used to test this high power condition. Duration is less than one second.

3. Guaranteed by design but not tested.

POWER SUPPLY CHARACTERISTICS

Symbol

Parameter

Test Conditions ⁽¹⁾

VCC = Max., VIN = GND or Vcc

_CC= Max., V = Vcc – 0.6V, f = 0MHz

Typ. ⁽³⁾

Max.

Unit

ICC

Quiescent Power Supply Current

0.01

100

µA

∆ICC

Supply Current per Input HIGH

0.1

ICCD

Dynamic Power Supply Current per Output ⁽²⁾VCC = Max., OEA = OEB = GND

100

µA/MHz

Outputs Toggling at 50% duty cycle

Total Power Supply Current Examples ^(2,4)

VCC = Max.,

VIN = GND or Vcc

VIN = GND or 3V

VIN = GND or Vcc

VIN = GND or 3V

3.5

1.8

5.2

2.9

OEA = OEB = GND

50% duty cycle, fI = 10MHz

five outputs

VCC = Max.,

OEA = OEB = GND

50% duty cycle, fI = 2.5MHz

All outputs toggling

NOTES:

1. For conditions shown as Min. or Max., use the appropriate values specified under DC Electrical Characteristics.

2. Guaranteed by design but not tested. C^L= 0pF.

3. Typical values are for reference only. Conditions are V^CC= 3.3V, T^A= 25°C.

4. I^C= I^CC+ (∆I^CC)(D^H)(N^I) + I^CCD(f^O)(N^O)

where:

D^H= Input Duty Cycle

N^I= Number of TTL HIGH inputs at D^H

f^O= Output Frequency

N^O= Number of outputs at f^O

QS53805/A

GUARANTEEDLOWSKEW3.3VCMOSCLOCKDRIVER/BUFFER

INDUSTRIALTEMPERATURERANGE

SKEW CHARACTERISTICS OVER OPERATING RANGE

T^A= -40°C to +85°C, V^CC= 3.3V ± 0.3V

C^LOAD= 50pF, R^LOAD= 500Ω unless otherwise noted.

QS53805

QS53805A

Min.

—

Max.

0.7

Min.

—

Max.

0.7

0.8

1.1

Symbol

Parameter ⁽¹⁾

Unit

tSK(01)

Skew between all outputs, same transition, same bank

tSK(02)

tSK(P)

Skew between two outputs, same transition, different banks

Pulse Skew; skew between opposite transitions of the same output (tPHL - tPLH)

Part-to-part skew ⁽²⁾

—

0.8

—

1.1

—

tSK(T)

—

1.5

—

NOTES:

1. This parameter is guaranteed but not production tested. Skew parameters apply to propagation delays only.

2. t^SK(T)only applies to devices of the same transition, part type, temperature, power supply voltage, loading package, and speed grade.

SWITCHING CHARACTERISTICS OVER OPERATING RANGE

T^A= -40°C to +85°C, V^CC= 3.3V ± 0.3V

C^LOAD= 50pF, R^LOAD= 500Ω unless otherwise noted.

QS53805

QS53805A

Parameter ^(1,2)

Unit

Min.

Max.

Min.

Max.

Symbol

tPLH

Propagation Delay

1.5

6.5

1.5

5.8

tPHL

Output Rise Time, 0.8V to 2V ⁽³⁾

—

Output Fall Time, 2V to 0.8V ⁽³⁾

Output Enable Time

tPZL

tPZH

tPLZ

tPHZ

1.5

Output Disable Time

NOTES:

1. Minimums guaranteed but not production tested.

2. The propagation delay other range indicated by Min. and Max. specifications results from process and environmental variables. These propagation

delays do not imply limit skew.

3. This parameter is guaranteed but not production tested.

QS53805/A

GUARANTEEDLOWSKEW3.3VCMOSCLOCKDRIVER/BUFFER

INDUSTRIALTEMPERATURERANGE

TESTCIRCUITSANDWAVEFORMS

Parameter

Tested

Switch

Position

tPLZ, tPZL

All Others

Closed

Open

500Ω

V_CC

6.0 V

V_IN

V_OUT

Pulse

Generator

DUT

500Ω

50Ω

50pF

Pulse generator for all pulses: f ≤ 1.0MHz; t_F≤ 2.5ns; t_R≤ 2.5ns

1.5V

INPUT

1.5V

tPLH

t_PHL

V_OH

2.0V

t_PLH

VOH

OUPUT

1.5V

0.8V

V_OL

OUPUT

1.5V

V_OL

t_R

t_F

t_SK(p)

= t_PHL- t_PLH

PROPAGATIONDELAY

PULSE SKEW — tSK(P)

1.5V

INPUT

tPHL1

t_PLH1

t_PHLA

t_PLHA

V_OH

1.5V

V_OL

V_OH

OUPUT 1

OUPUT 2

OUPUT A

OUPUT B

1.5V

V_OL

V_OH

t_SK(01)

t_SK(02)

t_SK(01)

t_SK(02)

1.5V

V_OL

1.5V

V_OL

t_PLHB

t_PLH2

= t_PLH2- t_PLH1or t_PHL2- t_PHL1

tPHLB

t_PHL2

t_SK(01)

tSK(02) = tPLHB - tPLHA or tPHLB - tPHLA

OUTPUT SKEW (SAME BANK) — tSK(O1)

OUPUT SKEW (DIFFERENT BANKS) — tSK(O2)

ENABLE

DISABLE

CONTROL

INPUT

1.5V

INPUT

PART 1 OUTPUT

PART 2 OUTPUT

t_PLH1

tPHL1

tPZL

t_PLZ

V_OH

OUTPUT

NORMALLY

LOW

SWITCH

CLOSED

1.5V

V_OL

V_OH

1.5V

0.3V V_OL

t_PHZ

t_SK(t)

t_PZH

V_OH

0.3V

OUTPUT

NORMALLY

HIGH

SWITCH

OPEN

1.5V

V_OL

t_PLH2

t_SK(t)

t_PHL2

t_PLH2- t_PLH1or t_PHL2- t_PHL1

PART-TO-PART SKEW — tSK(T)

ENABLE AND DISABLE TIMES

QS53805/A

GUARANTEEDLOWSKEW3.3VCMOSCLOCKDRIVER/BUFFER

INDUSTRIALTEMPERATURERANGE

ORDERINGINFORMATION

XXXX

Package

Device Type

Quarter Size Small Outline Pacakge (SO20-8)

Small Outline IC (SO20-2)

Guaranteed Low Skew 3.3V CMOS Clock Driver/Buffer

53805

53805A

CORPORATE HEADQUARTERS

2975StenderWay

Santa Clara, CA 95054

for SALES:

800-345-7015 or 408-727-6116

fax: 408-492-8674

www.idt.com*

*To search for sales office near you, please click the sales button found on our home page or dial the 800# above and press 2.

The IDT logo, QuickSwitch, and SynchroSwitch are registered trademarks of Integrated Device Technology, Inc.

IDTQS53805ASO [IDT]

相关型号：

IDTQS53805SO

IDTQS53805SO8

IDTQS5805ATQ

IDTQS5805ATQ8

IDTQS5805ATSO8

IDTQS5805BTQ

IDTQS5805BTQ8

IDTQS5805BTSO

IDTQS5806ATQ

IDTQS5917T-100TJ

IDTQS5917T-100TJ8

IDTQS5917T-100TQ8