IDTQS74FCT2821ATSO8 [IDT]
Bus Driver, FCT Series, 1-Func, 10-Bit, True Output, CMOS, PDSO24, SOIC-24;![IDTQS74FCT2821ATSO8](http://pdffile.icpdf.com/pdf2/p00241/img/icpdf/QS74FCT2821B_1456151_icpdf.jpg)
型号: | IDTQS74FCT2821ATSO8 |
厂家: | ![]() |
描述: | Bus Driver, FCT Series, 1-Func, 10-Bit, True Output, CMOS, PDSO24, SOIC-24 光电二极管 |
文件: | 总6页 (文件大小:65K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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HIGH-SPEED CMOS
BUS INTERFACE
10-BIT REGISTER
IDTQS74FCT2821AT/BT/CT
DESCRIPTION:
FEATURES:
TheIDTQS74FCT2821Tis a10-bithigh-speedCMOSTTL-compatible
• CMOS power levels: <7.5mW static
• Undershoot clamp diodes on all outputs
• True TTL input and output compatibility
• Ground bounce controlled outputs
• Reduced output swing of 0 to 3.5V
• Built-in 25Ω series resistor outputs reduce reflection and other
system noise
bufferedregisterwith3-state outputs,witha 25Ωresisterthatis usefulfor
drivingtransmissionlinesandreducingsystemnoise. The2821seriesparts
canreplacethe821series toreducenoiseinanexistingdesign. Allinputs
have clamp diodes for undershoot noise suppression. All outputs have
groundbounce suppression. Outputs willnotloadanactive bus whenVcc
is removedfromthe device.
• A, B, and C speed grades
• IOL = 12mA
• Available in SOIC and QSOP packages
FUNCTIONALBLOCKDIAGRAM
OE
Q
D
Yx
25Ω
Dx
CP
CP
INDUSTRIAL TEMPERATURE RANGE
MARCH 2002
1
c
2002 Integrated Device Technology, Inc.
DSC-5256/4
IDTQS74FCT2821AT/BT/CT
HIGH-SPEEDCMOSBUSINTERFACE10-BITREGISTER
INDUSTRIALTEMPERATURERANGE
ABSOLUTEMAXIMUMRATINGS(1)
PINCONFIGURATION
Symbol
VTERM
TSTG
IOUT
Description
Max
–0.5 to +7
–65 to +150
120
Unit
V
Terminal Voltage with Respect to GND
Storage Temperature
24
23
22
21
20
19
18
17
16
15
14
13
1
2
3
4
VCC
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
Y9
CP
OE
D0
° C
DC Output Current Max Sink Current/Pin
Input Diode Current, VIN < 0
mA
mA
mA
D1
IIK
–20
IOK
Output Diode Current, VOUT < 0
–50
D2
NOTE:
5
D3
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
6
D4
7
D5
8
D6
9
D7
10
11
12
CAPACITANCE (TA = +25°C, F = 1.0MHz)
D8
D9
Symbol
Parameter(1)
Input Capacitance
Input Capacitance
Output Capacitance
Output Capacitance
Conditions
Typ.
Max. Unit
(2)
CIN
VIN = 0V
4
8
6
8
—
—
—
—
pF
pF
pF
pF
GND
(3)
CIN
VIN = 0V
(4)
COUT
VOUT = 0V
VOUT = 0V
(5)
COUT
SOIC/ QSOP
TOP VIEW
NOTES:
1. This parameter is measured at characterization but not tested.
2. Pins 1, 3-11, 13.
3. Pin 2.
4. Pins 15-22.
5. Pins 14, 23.
PINDESCRIPTION
Pin Names
Dx
I/O
Description
I
I
DFlip-FlopDataInputs
CP
ClockPulsefortheregister. Entersdataintotheregister
ontheLOW-to-HIGHtransition.
Yx
O
I
Register3-StateOutputs
OE
Output Control. When the OE input is HIGH, the Yx
outputsareinthehighimpedancestate. WhentheOE
inputisLOW,theTRUEregisterdataispresentatthe
Yxoutputs.
FUNCTIONTABLE(1)
Inputs
Dx
L
Internal
Outputs
OE
CP
↑
Value Qx
Yx
Z
Function
High-Z
High-Z
Load
H
H
L
H
L
H
↑
Z
H
L
↑
Z
LOGICSYMBOL
H
H
↑
H
L
Z
Load
L
L
↑
L
Load
L
H
↑
H
H
Load
10
10
NOTE:
Dx
D
Q
Yx
1. H = HIGH Voltage Level
L = LOW Voltage Level
Z = High-Impedance
CP
↑ = LOW-to-HIGH transition
CP
OE
2
IDTQS74FCT2821AT/BT/CT
HIGH-SPEEDCMOSBUSINTERFACE10-BITREGISTER
INDUSTRIALTEMPERATURERANGE
DCELECTRICALCHARACTERISTICSOVEROPERATINGRANGE
FollowingConditionsApplyUnlessOtherwiseSpecified:
Industrial: TA = –40°C to +85°C, VCC = 5.0V ±5%
Symbol
VIH
Parameter
Input HIGH Level
Test Conditions
Guaranteed Logic HIGH Level
Min.
2
Typ.(1)
—
Max.
—
0.8
—
5
Unit
V
VIL
Input LOW Level
Guaranteed Logic LOW Level
VTLH - VTHL for all inputs
VCC = Max.
—
—
—
—
V
ΔVT
IIH
Input Hysteresis
0.2
V
Input HIGH Current
Input LOW Current
Off-State Output Current (Hi-Z)
Current Drive
0 ≤ VIN ≤ VCC
0 ≤ VIN ≤ VCC
—
µA
IIL
IOZ
IOR
VIC
VCC = Max
—
50
—
—
5
—
µA
mA
V
(2)
VCC = Max., VOUT = 2.0V
Input Clamp Voltage
OutputHIGHVoltage
OutputLOWVoltage
OutputResistance
VCC = Min, IIN = -18mA , TA = 25°C(2)
—
2.4
—
18
–0.7
—
–1.2
—
VOH
VOL
VCC = Min.
VCC = Min.
VCC = Min.
IOH = -15mA
IOL = 12mA
IOH = 12mA
V
—
0.5
40
V
(3)
ROUT
25
Ω
NOTES:
1. Typical values are at VCC = 5.0V, TA = 25°C.
2. This parameter is measured at characterization but not tested.
3. ROUT changed on March 8, 2002. See rear page for more information.
POWERSUPPLYCHARACTERISTICS
FollowingConditionsApplyUnlessOtherwiseSpecified:
Industrial: TA = -40°C to +85°C, VCC = 5.0V ± 5%
Symbol
Parameter
TestConditions(1)
Min.
Max.
Unit
ICC
QuiescentPowerSupplyCurrent
VCC = Max.
—
1.5
mA
freq = 0
0V ≤ VIN ≤ 0.2V or
VCC - 0.2V ≤ VIN ≤ Vcc
VCC = Max.
ΔICC
Supply Current per Input TTL Inputs HIGH
Supply Current per Input per MHz
—
—
2
mA
(2)
VIN = 3.4V
freq = 0
ICCD
VCC = Max.
0.25
mA/MHz
OutputsOpenandEnabled
OneBitToggling
50% Duty Cycle
Other inputs at GND or Vcc(3,4)
NOTES:
1. For conditions shown as Min. or Max., use the appropriate values specified under DC Electrical Characteristics.
2. Per TLL driven input (VIN = 3.4V).
3. For flip-flops, ICCD is measured by switching one of the data input pins so that the output changes every clock cycle. This is a measurement of device power consumption
only and does not include power to drive load capacitance or tester capacitance.
4. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ΔICC DHNT + ICCD (fCP/2 + fiNi)
ICC = Quiescent Current
ΔICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Output Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
fi = Input Frequency
Ni = Number of Inputs at fi
All currents are in milliamps and all frequencies are in megahertz.
3
IDTQS74FCT2821AT/BT/CT
HIGH-SPEEDCMOSBUSINTERFACE10-BITREGISTER
INDUSTRIALTEMPERATURERANGE
SWITCHINGCHARACTERISTICSOVEROPERATINGRANGE(1)
FCT2821AT
Min. Max.
FCT2821BT
FCT2821CT
Symbol
tPLH
tPHL
tPLH
tPHL
tS
Parameter
Min.
Max.
Min.
Max.
Unit
Clock to Y Delay
OE = LOW
Clock to Y Delay
—
10
—
7.5
—
6
ns
—
20
—
15
—
12.5
ns
(2)
OE = LOW
Data toCPSetupTime
4
2
—
—
3
—
—
3
—
—
ns
ns
tH
Data to CP Hold Time
1.5
1.5
NOTES:
1. CLOAD = 50pF, RLOAD = 500Ω unless otherwise noted.
2. CLOAD = 300pF.
TIMINGREQUIREMENTSOVEROPERATINGRANGE(1)
FCT2821AT
Min. Max.
FCT2821BT
FCT2821CT
Symbol
tPLH
Parameter(2)
Min.
Max.
Min.
Max.
Unit
Clock to Y Delay
HIGH or LOW
OutputEnableTime
OE to Yx
7
—
12
23
7
6
—
6
—
ns
tPHL
tPZH
tPZL
—
—
—
—
—
—
—
—
8
—
—
—
—
7
ns
ns
ns
ns
tPZH
tPZL
OutputEnableTime(3)
OE to Yx
OutputDisableTime(4)
—
6.5
7.5
—
6.2
6.5
tPHZ
tPLZ
OE to Yx
tPHZ
tPLZ
OutputDisableTime
OE to Yx
9
NOTES:
1. CLOAD = 50pF, RLOAD = 500Ω unless otherwise noted.
2. See Test Circuits and Waveforms
3. CLOAD = 300pF.
4. CLOAD = 5pF.
4
IDTQS74FCT2821AT/BT/CT
HIGH-SPEEDCMOSBUSINTERFACE10-BITREGISTER
INDUSTRIALTEMPERATURERANGE
TESTCIRCUITSANDWAVEFORMS
SWITCHPOSITION
VCC
7.0V
Test
Switch
Closed
Open
500Ω
Open Drain
Disable Low
Enable Low
VOUT
VIN
Pulse
D.U.T.
Generator
All Other Tests
50pF
500Ω
RT
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
CL
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
FCTL Link
Test Circuits for All Outputs
3V
DATA
1.5V
0V
INPUT
LOW-HIGH-LOW
tH
tSU
1.5V
PULSE
3V
1.5V
0V
TIMING
INPUT
tW
ASYNCHRONOUS CONTROL
tREM
PRESET
3V
1.5V
0V
CLEAR
HIGH-LOW-HIGH
PULSE
1.5V
ETC.
SYNCHRONOUS CONTROL
PRESET
3V
1.5V
0V
FCTL Link
CLEAR
tSU
tH
CLOCK ENABLE
ETC.
Pulse Width
FCTL Link
Set-Up, Hold, and Release Times
ENABLE
DISABLE
3V
1.5V
0V
3V
SAME PHASE
CONTROL
INPUT
1.5V
0V
INPUT TRANSITION
tPLH
tPLH
tPHL
tPHL
tPZL
tPLZ
VOH
1.5V
VOL
OUTPUT
3.5V
1.5V
3.5V
VOL
VOH
OUTPUT
NORMALLY
LOW
SWITCH
CLOSED
0.3V
0.3V
3V
1.5V
0V
tPZH
tPHZ
OPPOSITE PHASE
INPUT TRANSITION
OUTPUT
NORMALLY
HIGH
SWITCH
OPEN
1.5V
0V
FCTL Link
0V
FCTL Link
Propagation Delay
Enable and Disable Times
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.
5
IDTQS74FCT2821AT/BT/CT
HIGH-SPEEDCMOSBUSINTERFACE10-BITREGISTER
INDUSTRIALTEMPERATURERANGE
ORDERINGINFORMATION
XX
FCT
XXXX
XX
IDTQS
Device Type Package
Temp. Range
SO
Q
Small Outline IC (gull wing)
Quarter-size Small Outline Package
2821AT
2821BT
2821CT
High-Speed CMOS Bus Interface 10-Bit Register
–40°C to +85°C
74
As per PCN L0201-02, the Output Resistance (ROUT) specifications have changed as of March 8, 2002. The original specifications were:
Parameter
Description
Min.
Typ.
Max. Unit
40
ROUT
VCC = Min, IOL = -15mA
20
28
Ω
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logichelp@idt.com
800-345-7015 or 408-284-8200
fax: 408-284-2775
www.idt.com
6
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