M906-01-125.0000 [IDT]

CLCC-36, Tube;
M906-01-125.0000
型号: M906-01-125.0000
厂家: INTEGRATED DEVICE TECHNOLOGY    INTEGRATED DEVICE TECHNOLOGY
描述:

CLCC-36, Tube

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中文:  中文翻译
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P r o d u c t D a t a S h e e t  
Integrated  
Circuit  
Systems, Inc.  
M906-01  
VCSO BASED GBE CLOCK GENERATOR  
GENERAL DESCRIPTION  
PIN ASSIGNMENT (9 x 9 mm SMT)  
The M906-01 is a PLL (Phase Locked Loop) based  
clock generator that uses an  
internal VCSO (Voltage Controlled  
SAW Oscillator) to produce a very  
low jitter output clock. It is ideal for  
Gigabit Ethernet. The output clock  
(frequency of 156.25 or 187.50MHz  
for example) is provided from six  
XTAL_2  
FOUT4  
nFOUT4  
FOUT5  
nFOUT5  
VCC  
nFOUT2  
FOUT2  
nFOUT1  
FOUT1  
GND  
nFOUT0  
FOUT0  
VCC  
28  
29  
18  
17  
LVPECL clock output pairs. (Specify frequency at time  
of order.) The accuracy of the output frequency is  
assured by the internal PLL, which phase-locks the  
internal VCSO to the reference input frequency (25 or  
30MHz for example). The input reference can either  
be an external crystal, utilizing the internal crystal  
oscillator, or a stable external clock source such as  
a packaged crystal oscillator.  
30  
31  
32  
33  
34  
35  
36  
16  
15  
14  
13  
12  
11  
10  
M906-01  
( T o p V i e w )  
DNC  
DNC  
DNC  
GND  
FEATURES  
Output clock frequency from 125MHz to 190MHz  
(Consult factory for frequency availability)  
Figure 1: Pin Assignment  
Six identical LVPECL output pairs  
Integrated SAW (surface acoustic wave) delay line  
Low jitter 0.7ps RMS (over 12kHz-20MHz)  
Ideal for Gigabit Ethernet clock reference  
Output-to-output skew < 100ps  
Example Output Frequency Configurations  
Ref Clock  
Frequency  
(MHz)  
Output  
Frequency1  
(MHz)  
PLL  
Ratio  
Application  
External XTAL or LVCMOS reference input  
Selectable external feed-through clock input  
STOP clock control (Logic 1 stops output clocks)  
Industrial temperature grade available  
Single 3.3V power supply  
20  
25  
30  
125  
GbE  
25/4  
156.25  
187.50  
10GbE  
12GbE  
Table 1: Example Output Frequency Configurations  
Note 1:Specify output clock frequency at time of order  
Small 9 x 9 mm SMT (surface mount) package  
Pb-free design/construction on all 9 x 9 mm modules  
SIMPLIFIED BLOCK DIAGRAM  
M906-01-156.25  
VSCO  
External  
Crystal  
LVPECL  
Output  
Clock Pairs  
(e.g., 156.25  
Frequency  
Multiplying  
PLL  
XTAL  
OSC  
O
or  
Divider  
Reference  
Clock Input  
(e.g., 25 or 30MHz)  
1
or 187.50MHz)  
External  
Loop Filter  
External External  
Output  
Clock STOP  
Control  
Clock  
Clock  
Input  
Select  
Figure 2: Simplified Block Diagram  
M906-01 Datasheet Rev 3.2  
Revised 15Jun2006  
M906-01 VCSO Based GbE Clock Generator  
Integrated Circuit Systems, Inc. Communications Modules www.icst.com tel (508) 852-5400  
M906-01  
Integrated  
Circuit  
Systems, Inc.  
VCSO BASED  
GB  
E CLOCK  
G
ENERATOR  
P r o d u c t D a t a S h e e t  
DETAILED BLOCK DIAGRAM  
RLOOP CLOOP  
RPOST  
External  
Loop Filter  
Components  
CPOST  
CPOST  
RLOOP CLOOP  
nOP_IN OP_OUT  
RPOST  
M906-01  
OP_IN  
RIN  
nOP_OUT  
nVC  
VC  
FOUT5  
Phase  
Detector  
SAW Delay Line  
nFOUT5  
XTAL_1 / REF_IN  
XTAL  
OSC  
R Divider  
R = 4  
FOUT4  
XTAL_2  
nFOUT4  
RIN  
Loop Filter  
Amplifier  
Phase  
Shifter  
FOUT3  
VCSO  
nFOUT3  
M Divider  
M = 25  
O
1
FOUT2  
nFOUT2  
Phase Locked Loop (PLL)  
EXT_CLK  
FOUT1  
nFOUT1  
EN_EXT_CLK  
FOUT0  
nFOUT0  
STOP  
Figure 3: Detailed Block Diagram  
PIN DESCRIPTIONS  
Number Name  
1, 2, 3, 10, 14, 26 GND  
I/O  
Ground  
Configuration  
Description  
Power supply ground connections.  
4
9
OP_IN  
nOP_IN  
Input  
External loop filter connections. See Figure 5,  
External Clock Feed-through, on pg. 3.  
5
8
nOP_OUT  
OP_OUT  
Output  
6
7
nVC  
VC  
Input  
11, 19, 33  
VCC  
Power  
Power supply connection, connect to +3.3V.  
12  
13  
FOUT0  
nFOUT0  
15  
16  
FOUT1  
nFOUT1  
17  
18  
FOUT2  
nFOUT2  
Clock output pairs, differential LVPECL output  
(156.25 MHz for the M906-01-156.2500)  
Output  
No internal terminator  
20  
21  
FOUT3  
nFOUT3  
29  
30  
FOUT4  
nFOUT4  
31  
32  
FOUT5  
nFOUT5  
Logic 1 enables the EXT_CLK input.  
Use Logic 0 for normal operation.  
1
23  
24  
25  
EN_EXT_CLK  
EXT_CLK  
STOP  
Input  
Input  
Input  
Internal pull-down resistor  
External clock feed-through: 0 to 200 MHz  
Logic 1 stops clock outputs.  
Use Logic 0 for normal operation.  
1
Internal pull-down resistor  
External crystal connection. Also accepts  
LVCMOS/LVTTL compatible clock source.  
27  
XTAL_1 / REF_IN  
Input  
Input  
External crystal connection. Leave unconnected  
when driving pin 27 with external clock reference.  
28  
XTAL_2  
DNC  
34, 35, 36  
Do Not Connect.  
Table 2: Pin Descriptions  
Note 1: For typical value of internal pull-down resistor, see DC Characteristics, Pull-down on pg. 6.  
M906-01 Datasheet Rev 3.2  
2 of 8  
Revised 15Jun2006  
Integrated Circuit Systems, Inc. Communications Modules www.icst.com tel (508) 852-5400  
M906-01  
Integrated  
Circuit  
Systems, Inc.  
VCSO BASED  
GB  
E CLOCK  
G
ENERATOR  
P r o d u c t D a t a S h e e t  
The PLL  
FUNCTIONAL DESCRIPTION  
The PLL (Phase Locked Loop) includes the phase  
detector, the VCSO, a feedback divider (labeled  
“M Divider”), and a reference divider (“R Divider”).  
The M906-01 is a PLL (Phase Locked Loop) based  
clock generator that generates output clocks  
synchronized to an input reference clock.  
The feedback divider divides the VCSO output  
frequency by a fixed value “M” to match the reference  
frequency provided to the phase detector by the  
reference divider.  
The M906-01 combines the flexibility of a VCSO  
(Voltage Controlled SAW Oscillator) with the stability of  
a crystal oscillator.  
Input Reference  
By controlling the frequency and phase of the VCSO,  
the phase detector precisely locks the frequency and  
phase of the feedback divider output to that of the  
reference divider output. This creates an output  
frequency that is a multiple of the reference frequency  
(which is output from the VCSO).  
The input reference can either be an external, discrete  
crystal device or a stable external clock source such as  
a packaged crystal oscillator:  
If an external crystal is used with the on-chip crystal  
oscillator circuit (XTAL OSC), the external crystal  
should be a parallel-resonant, fundamental mode  
crystal. Apply it to the XTAL_1 / REF_IN and XTAL_2 input  
pins. External crystal load capacitors are also  
required.  
The relationship between the VCSO output frequency,  
the M Divider, the R Divider and the input reference  
frequency is defined as follows:  
M
R
----  
Fvcso = Fxtal ×  
If an external LVCMOS/LVTTL clock source is used,  
apply it to the XTAL_1 / REF_IN input pin.  
For the M906-01-156.2500 (see “Ordering Information” on pg. 8):  
In either case, the reference clock is supplied to the  
phase detector of the PLL. The M906-01 includes a  
reference divider that divides the input reference  
frequency by a fixed value “R” and provides the result to  
the phase detector.  
VCSO output frequency = 156.25MHz  
Input reference frequency = 25MHz  
M=25  
R= 4  
Therefore, for the M906-01-156.2500:  
The EX_CLK pin is available for a clock feed-through  
mode for testing. See “External Clock Feed-through”  
on pg. 3.  
25  
---------  
4
156.25MHz = 25MHz
×  
M
----  
The product of the input crystal frequency and  
falls within the lock range of the VCSO.  
R
External Clock Feed-through  
The EXT_CLK pin provides an input for an external  
single-ended clock that directly drives the LVPECL  
clock outputs. It can be used for system debugging and  
performance evaluation.  
1. Set pin EN_EXT_CLK to Logic 1.  
2. Apply an external LVCMOS/LVTTL clock source  
to the EXT_CLK input pin.  
Due to the fact that EXT_CLK bypasses the PLL, any  
frequency between DC and 200MHz can be used.  
STOP Clock  
The STOP pin puts the output clock into a static condition.  
Logic 1 Output clocks are static  
Logic 0 Output clocks enabled for normal operation  
M906-01 Datasheet Rev 3.2  
3 of 8  
Revised 15Jun2006  
Integrated Circuit Systems, Inc. Communications Modules www.icst.com tel (508) 852-5400  
M906-01  
Integrated  
Circuit  
Systems, Inc.  
VCSO BASED  
GB  
E CLOCK  
G
ENERATOR  
P r o d u c t D a t a S h e e t  
External Loop Filter  
APPLICATION INFORMATION  
To provide stable PLL operation, and thereby a low jitter  
output clock, the M906-01 requires the use of an  
external loop filter. This is provided via the provided  
filter pins (see Figure 5).  
This section includes information on the optional  
external crystal and on the external loop filter.  
The subsections on the loop filter provide example  
component values and also briefly describe the SAW  
PLL simulator tool and additional application  
information available at www.icst.com.  
Due to the differential signal path design, the  
implementation requires two identical complementary  
RC filters as shown here.  
External Crystal Specifications  
RLOOP CLOOP  
RPOST  
If an external crystal is used with the on-chip crystal  
oscillator circuit (XTAL OSC), the external crystal  
should have the following general specifications:  
CPOST  
CPOST  
Crystal Specifications  
RLOOP CLOOP  
nOP_IN OP_OUT  
RPOST  
Parameter  
Min Typ Max Unit  
AT-cut quartz  
Crystal Type  
OP_IN  
nOP_OUT  
nVC  
VC  
Fundamental  
4
9
8
5
6
7
Mode of Oscillation  
Frequency Range  
Equivalent Series Resistance  
16  
40  
50  
f
MHz  
Figure 5: External Clock Feed-through  
0
ESR  
Example External Loop Filter Component Values  
Spurious Response (non-harmonic)  
-40 dBc  
C
post  
(pF)  
Load Capacitance,  
16  
CL  
PLL Band- Damping R loop C loop R post  
32  
pF  
parallel load resonant  
width (kHz) Factor  
(k)  
(µF)  
(k)  
0.1  
1.0  
P
Drive Level  
mW  
0
Table 3: Crystal Specifications  
0.5  
3.0  
3.3  
1.1  
4.5  
4.2  
1.5  
4.7  
4.70  
1.00  
20  
10  
10  
20  
20  
1500  
1500  
1500  
270  
1.5 1  
2.1 2  
The external crystal will be applied to the XTAL_1 / REF_IN  
and XTAL_2 input pins. External crystal load capacitors  
are also required.  
4.7  
0.10  
6.4  
20.0  
33.0  
0.10  
Recommended External Crystal Configuration  
3
10.6  
0.033  
120  
M906-01  
M
Table 4: Example External Loop Filter Component Values  
Note 1: Optimum loop bandwidth when using an external reference  
crystal. Will help to attenuate interference on the crystal’s  
sinusoidal clock waveform and therefore will minimize device  
output clock jitter.  
Note 2: Alternative loop filter setting when using an external reference  
crystal. Smaller C loop lowers loop damping factor with negli-  
gible increase in output jitter.  
XTAL_1 / REF_IN  
XTAL_2  
C1  
C2  
XTAL OSC  
XTAL  
Note 3: Optimum loop bandwidth when using an external reference  
crystal oscillator. The square wave clock reference does not  
require as much jitter attenuation, which allows for a wider  
loop bandwidth and improved system noise tolerance.  
Figure 4: Recommended External Crystal Configuration  
XTAL= 25 or 30 MHz, Load Capacitance Specification = 18 pF  
Refer to the M906-01 product web page at  
www.icst.com/products/summary/m906-01.htm for  
additional product information.  
C1  
C2  
=
=
27 pF  
33 pF  
External load capacitors C1 and C2 present a load of 15 pf  
to the crystal (they are seen in series by the crystal through  
the common ground connection). With the additional of PCB  
trace capacitance and M906-01 input capacitance, the total  
load to the crystal is about 18 pf.  
M906-01 Datasheet Rev 3.2  
4 of 8  
Revised 15Jun2006  
Integrated Circuit Systems, Inc. Communications Modules www.icst.com tel (508) 852-5400  
M906-01  
Integrated  
Circuit  
VCSO BASED  
P r o d u c t D a t a S h e e t  
SAW PLL Application Notes Available  
GB  
E CLOCK  
G
ENERATOR  
Systems, Inc.  
PLL Simulator Tool Available  
A free PC software utility is available on the ICS website  
(www.icst.com). The M2000 Timing Modules PLL  
Simulator is a downloadable application that simulates  
PLL jitter and wander transfer characteristics. This  
enables the user to set appropriate external loop  
component values in a given application.  
The ICS web site also has application notes on:  
PCB layout guidelines (including special detailed  
instructions for preventing issues such as external  
reference crosstalk)  
Any new special device application details that may  
become available  
Instructions for using PLL simulator software  
Refer to the SAW PLL Simulator Software web page at  
www.icst.com/products/calculators/m2000filterSWdesc.htm  
for additional information.  
Guidelines for PCB fabrication (inc. recommended  
PCB footprint, solder mask, and furnace profile)  
Refer to the SAW PLL Application Notes web page at  
www.icst.com/products/appnotes/SawPllAppNotes.htm  
for application notes and any additional product  
information that may become available.  
1
ABSOLUTE MAXIMUM RATINGS  
Symbol Parameter  
Rating  
Unit  
VI  
Input Voltage  
-0.5 to VCC +0.5  
V
VO  
I O  
VCC  
TS  
Output Voltage  
-0.5 to VCC +0.5  
V
mA  
V
Output Current  
22  
4.6  
Power Supply Voltage  
Storage Temperature  
-45 to +100  
oC  
Table 5: Absolute Maximum Ratings  
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the  
device. These ratings are stress specifications only. Functional operation of product at these conditions  
or any conditions beyond those listed in Recommended Conditions of Operation, DC Characteristics, or  
AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods  
may affect product reliability  
.
RECOMMENDED CONDITIONS OF OPERATION  
Symbol Parameter  
Min  
Typ  
Max Unit  
3.135  
3.3  
3.465  
VCC  
Positive Supply Voltage  
V
TA  
Ambient Operating Temperature  
oC  
oC  
0
Commercial  
Industrial  
+70  
+85  
-40  
Table 6: Recommended Conditions of Operation  
M906-01 Datasheet Rev 3.2  
5 of 8  
Revised 15Jun2006  
Integrated Circuit Systems, Inc. Communications Modules www.icst.com tel (508) 852-5400  
M906-01  
Integrated  
Circuit  
Systems, Inc.  
VCSO BASED  
GB  
E CLOCK  
G
ENERATOR  
P r o d u c t D a t a S h e e t  
ELECTRICAL SPECIFICATIONS  
DC Characteristics  
1
1
Unless stated otherwise, VCC  
=
3.3V +  
5
%,TA = 0 oC to +70 oC (commercial) , TA = -40 oC to +85 oC (industrial) , Output Frequency=156.25MHz1  
,
LVPECL outputs terminated with 50  
to VCC - 2V  
Symbol Parameter  
Power Supply VCC Positive Supply Voltage  
Min  
3.135  
Typ  
3.3  
Max  
3.465  
Unit  
V
ICC  
Power Supply Current  
350  
mA  
2
Logic Inputs  
VIH  
VIL  
IIH  
Input High Voltage  
Input Low Voltage  
Input High Current  
Input Low Current  
Input High Voltage  
Input Low Voltage  
Input High Current  
Input Low Current  
V
+0.3  
V
cc  
0.8  
150  
-0.3  
V
EN_EXT_CLK, EXT_CLK,  
STOP  
µA  
µA  
V
IIL  
-5.0  
Reference  
Clock  
Input  
VIH  
VIL  
IIH  
(V / 2 ) +0.5  
V +0.3  
cc  
cc  
-0.3  
-5.0  
(V / 2 ) -0.5 V  
cc  
XTAL_1 / REF_IN  
(XTAL_2 disconnected)  
150  
4
µA  
µA  
IIL  
EN_EXT_CLK, EXT_CLK,  
STOP, XTAL_1 / REF_IN  
All Inputs  
Pull-down  
CIN  
R
Input Capacitance, All Inputs  
pF  
Internal Pull-down Resistor  
Output High Voltage  
EN_EXT_CLK, STOP  
51  
kΩ  
V
pulldown  
Differential  
Output  
VOH  
VOL  
VP-P  
V
V
-1.4  
-2.0  
V
V
-1.0  
cc  
cc  
cc  
FOUT, nFOUT (0-5)  
Output Low Voltage  
-1.7  
V
cc  
0.5  
0.85  
Peak to Peak Output Voltage  
V
Table 7: DC Characteristics  
Note 1: See Ordering Information on pg. 8  
AC Characteristics  
1
1
Unless stated otherwise, VCC  
=
3.3V +  
5
%,TA = 0 oC to +70 oC (commercial) , TA = -40 oC to +85 oC (industrial) , Output Frequency=156.25MHz1  
,
LVPECL outputs terminated with 50  
to VCC - 2V  
Symbol Parameter  
Min  
125  
Typ  
156.25  
Max  
190  
Unit  
MHz  
Test Conditions  
FOUT  
Output Frequency Range  
25  
FIN  
Nominal Input Frequency, XTAL_1 / REF_IN  
VCSO Pull-Range  
MHz  
ppm  
APR  
Φn  
±100  
±150  
Single Side Band  
Phase Noise  
1kHz Offset  
10kHz Offset  
100kHz Offset  
-90  
-110  
-135  
0.7  
dBc/Hz  
dBc/Hz  
dBc/Hz  
ps  
@156.25MHz  
1.0  
55  
J(t)  
tDC  
tR  
Jitter (rms)  
12kHz to 20MHz  
45  
50  
Output Duty Cycle, High Time  
%
FOUT, nFOUT (0-1)  
350  
350  
450  
450  
550  
550  
100  
200  
Output Rise Time  
Output Fall Time  
Output Skew  
ps  
ps  
ps  
MHz  
20% to 80%  
20% to 80%  
FOUT, nFOUT (0-1)  
Between Any Pair  
EXT_CLK  
tF  
tS  
0
EXT_CLK Frequency  
Table 8: AC Characteristics  
M906-01 Datasheet Rev 3.2  
6 of 8  
Revised 15Jun2006  
Integrated Circuit Systems, Inc. Communications Modules www.icst.com tel (508) 852-5400  
M906-01  
Integrated  
Circuit  
Systems, Inc.  
VCSO BASED  
GB  
E CLOCK  
G
ENERATOR  
P r o d u c t D a t a S h e e t  
Note 1: See Ordering Information on pg. 8  
DEVICE PACKAGE - 9 x 9mm CERAMIC LEADLESS CHIP CARRIER  
Mechanical Dimensions:  
Refer to the SAW PLL application notes web page at  
www.icst.com/products/appnotes/SawPllAppNotes.htm  
for application notes, including recommended PCB  
footprint, solder mask, and furnace profile.  
Figure 6: Device Package - 9 x 9mm Ceramic Leadless Chip Carrier  
M906-01 Datasheet Rev 3.2  
7 of 8  
Revised 15Jun2006  
Integrated Circuit Systems, Inc. Communications Modules www.icst.com tel (508) 852-5400  
P r o d u c t D a t a S h e e t  
M906-01  
G
Integrated  
Circuit  
Systems, Inc.  
VCSO BASED  
GB  
E CLOCK  
ENERATOR  
ORDERING INFORMATION  
Part Numbering Scheme  
Example Part Numbers  
Output Freq. (MHz) Temperature Order Part Number  
Part Number:  
Device Number  
M906-01-xxx.xxxx  
commercial  
industrial  
M906-01-156.2500  
M906-01 156.2500  
M906-01-156.2500  
M906-01 156.2500  
M906-01-187.5000  
M906-01 187.5000  
Temperature  
156.25  
156.25  
187.50  
0
to +70 o  
C (commercial)  
I-==- 40 to +85 o  
C
(industrial)  
I
commercial  
industrial  
Output Frequency (MHz)  
See Table 8, right. Consult ICS for other frequencies.  
I
commercial  
Figure 7: Part Numbering Scheme  
industrial  
I
Table 9: Example Part Numbers  
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS)  
assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would  
result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial  
applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary  
environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any  
circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or  
critical medical instruments.  
M906-01 Datasheet Rev 3.2  
8 of 8  
Revised 15Jun2006  
Integrated Circuit Systems, Inc. Communications Modules www.icst.com tel (508) 852-5400  

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SI9137DB

Multi-Output, Sequence Selectable Power-Supply Controller for Mobile Applications

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SI9137LG

Multi-Output, Sequence Selectable Power-Supply Controller for Mobile Applications

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SI9122E

500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification Drivers

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