MK1726-01S [IDT]
Clock Generator, 32MHz, CMOS, PDSO8, 0.150 INCH, SOIC-8;
| 型号： | MK1726-01S |
| 厂家： | 
INTEGRATED DEVICE TECHNOLOGY |
| 描述： | Clock Generator, 32MHz, CMOS, PDSO8, 0.150 INCH, SOIC-8 时钟 光电二极管 外围集成电路 晶体 |
| 文件： | 总7页 (文件大小：161K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MK1726-01A
Low EMI Clock Generator
Description
Features
The MK1726-01A generates a low EMI output clock
from a clock or crystal input. The part is designed to
dither the LCD interface clock for PDAs, printers,
scanners, modems, copiers, and others. Using ICS’
proprietary mix of analog and digital Phase-Locked
Loop (PLL) technology, the device spreads the
frequency spectrum of the output, reducing the
frequency amplitude peaks by several dB. The
MK1726-01A offers both centered and down spread
from a high-speed clock input.
• Packaged in 8-pin SOIC/TSSOP
• Provides a spread spectrum output clock
• Supports flat panel controllers
• Accepts a clock or crystal input (provides same
frequency dithered output)
• Input frequency range of 4 to 32 MHz
• Output frequency range of 4 to 32 MHz
• Center and down spread
• Peak reduction by 8 dB to 16 dB typical on 3rd
ICS offers many other clocks for computers and
computer peripherals. Consult us when you need to
remove crystals and oscillators from your board.
through 19th odd harmonics
• Low EMI feature can be disabled
• Includes power down
• Operating voltage of 3.3 V
• Advanced, low-power CMOS process
Block Diagram
VDD
2
S1:0
Spread Direction
FRSEL
PLL Clock
Synthesis
and Spread
Spectrum
Circuitry
SSCLK
X1/CLK
X1
Clock Buffer/
Crystal
Ocsillator
X2
External caps required for with crystal
for accurate tuning of the clock
GND
MDS 1726-01A C
1
Revision 052804
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
MK1726-01A
Low EMI Clock Generator
Pin Assignment
Spread Direction and Percentage
Select Table
S1
S0
Spread
Direction
Spread
Percentage
X1/ICLK
GND
S1
8
7
6
5
1
2
3
4
X2
Pin 3 Pin 4
VDD
0
0
0
M
1
Center
Center
Center
Center
No Spread
Down
±1.4
±1.1
±0.6
±0.5
-
FRSEL
SSCLK
0
S0
M
M
M
1
0
M
1
8 pin (150 mil) SOIC/TSSOP
-1.6
-2.0
-0.7
-3.0
0
Down
1
M
1
Down
1
Down
FRSEL
(pin 6)
Input
Freq. Range
Multiplier
Output
Freq. Range
4.0 to 8.0 MHz
8.0 to 16.0MHz
16.0 to 32.0MHz
0
1
4.0 to 8.0 MHz
8.0 to 16.0MHz
16.0 to 32.0MHz
X1
X1
X1
M
0 = connect to GND
M = unconnected (floating)
1 = connect directly to VDD
Pin Descriptions
Pin
Pin
Pin Type
Pin Description
Number
Name
1
2
3
X1/ICLK
GND
S1
Input
Connect to a 4 to 32 MHz crystal or clock.
Power Connect to ground.
Input
Function select 1 input. Selects spread amount and direction per table above.
(default-internal mid-level).
4
S0
Input
Function select 0 input. Selects spread amount and direction per table above.
(default-internal mid-level).
5
6
7
8
SSCLK
FRSEL
VDD
Output Clock output with Spread spectrum
Input Function select for input frequency range. Default to mid level “M”.
Power Connect to +3.3 V.
XO Crystal connection to a 4 to 32 MHz crystal. Leave unconnected for clock
X2
MDS 1726-01A C
2
Revision 052804
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
MK1726-01A
Low EMI Clock Generator
3) An optimum layout is one with all components on the
same side of the board, minimizing vias through other
signal layers. Other signal traces should be routed
away from the MK1726-01A. This includes signal
traces just underneath the device, or on layers adjacent
to the ground plane layer used by the device.
External Components
The MK1726-01A requires a minimum number of
external components for proper operation.
Decoupling Capacitor
A decoupling capacitor of 0.01µF must be connected
between VDD and GND on pins 7 and 2, as close to
these pins as possible. For optimum device
performance, the decoupling capacitor should be
mounted on the component side of the PCB. Avoid the
use of vias in the decoupling circuit.
Crystal Information
The crystal used should be a fundamental mode (do
not use third overtone), parallel resonant. Crystal
capacitors should be connected from pins X1 to ground
and X2 to ground to optimize the initial accuracy. The
value of these capacitors is given by the following
equation:
Series Termination Resistor
When the PCB trace between the clock output and the
load is over 1 inch, series termination should be used.
To series terminate a 50Ω trace (a commonly used
trace impedance) place a 33Ω resistor in series with
the clock line, as close to the clock output pin as
possible. The nominal impedance of the clock output is
20Ω.
Crystal caps (pF) = (C - 6) x 2
L
In the equation, C is the crystal load capacitance. So,
L
for a crystal with a 16 pF load capacitance, two 20 pF
[(16-6) x 2] capacitors should be used.
Spread Spectrum Profile
Tri-level Select Pin Operation
The S1, S0 select pins are tri-level, meaning they have
three separate states to make the selections shown in
the table on page 2. To select the M (mid) level, the
connection to these pins must be eliminated by either
floating them originally, or tri-stating the GPIO pins
which drive the select pins.
The MK1726-01A low EMI clock generator uses an
optimized frequency slew rate algorithm to facilitate
down stream tracking of zero delay buffers and other
PLL devices. The frequency modulation amplitude is
constant with variations of the input frequency.
PCB Layout Recommendations
For optimum device performance and lowest output
phase noise, the following guidelines should be
observed.
Modulation Rate
1) The 0.01µF decoupling capacitor should be mounted
on the component side of the board as close to the
VDD pin as possible. No vias should be used between
the decoupling capacitor and VDD pin. The PCB trace
to VDD pin should be kept as short as possible, as
should the PCB trace to the ground via.
Time
2) To minimize EMI, the 33Ω series termination
resistor(if needed) should be placed close to the clock
output.
MDS 1726-01A C
3
Revision 052804
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
MK1726-01A
Low EMI Clock Generator
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the MK1726-01A. These ratings,
which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of
the device at these or any other conditions above those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can
affect product reliability. Electrical parameters are guaranteed only over the recommended operating
temperature range.
Item
Rating
Supply Voltage, VDD
All Inputs and Outputs
7 V
-0.5 V to VDD+0.5 V
0 to +85°C
-65 to +150°C
125°C
Ambient Operating Temperature
Storage Temperature
Junction Temperature
Soldering Temperature
260°C
Recommended Operation Conditions
Parameter
Min.
Typ.
Max.
+70
Units
°C
Ambient Operating Temperature
Power Supply Voltage (measured in respect to GND)
0
+3.0
3.63
V
DC Electrical Characteristics
Unless stated otherwise, VDD = 3.3 V, Ambient Temperature 0 to +85°C
Parameter
Operating Voltage
Supply Current
Symbol
VDD
Conditions
Min.
Typ.
3.3
Max.
Units
3.0
3.63
30
V
IDD
No load, at 3.3 V,
Fin=24 MHz
23
mA
No load, at 3.3 V,
Fin=12 MHz
25
35
mA
mA
No load, at 3.3 V,
Fin=32 MHz
Input High Voltage
Input middle Voltage
Input Low Voltage
Output High Voltage
Output High Voltage
V
0.85VDD
0.4VDD
0.0
VDD
0.5VDD
0.0
VDD
V
V
V
V
V
IH
V
0.6VDD
0.15VDD
IHM
V
IL
V
V
CMOS, I = -4 mA
2.4
OH
OH
OH
I
= -6 mA
2.0
OH
MDS 1726-01A C
4
Revision 052804
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
MK1726-01A
Low EMI Clock Generator
Parameter
Symbol
Conditions
= -4 mA
Min.
Typ.
Max.
0.4
1.2
6
Units
V
Output Low Voltage
V
I
I
OL
OL
= -10 mA
V
OL
Input Capacitance
C
C
S0, S1, FRSEL pins
X1, X2 pins
4
6
pF
IN1
9
pF
IN2
AC Electrical Characteristics
Unless stated otherwise, VDD = 3.3 V, Ambient Temperature 0 to +85° C
Parameter
Input Clock Frequency
Output Clock Frequency
Input Clock Duty Cycle
Output Clock Duty Cycle
Cycle to cycle Jitter
Symbol
Conditions
Min.
Typ. Max. Units
4
4
32
32
MHz
MHz
%
Time above VDD/2
Time above 1.5 V
40
45
60
50
55
%
Fin=4 MHz, Fout=4
MHz
675
800
ps
Cycle to cycle Jitter
Fin=8 MHz, Fout=8
MHz
260
450
ps
Output Rise Time
t
0.4 to 2.4 V
2.4 to 0.4 V
2.4
2.4
3.2
3.2
4.0
4.0
ns
ns
dB
R
Output Fall Time
t
F
EMI Peak Frequency Reduction
8 to 16
Thermal Characteristics
Parameter
Symbol
Conditions
Min.
Typ. Max. Units
Thermal Resistance Junction to
Ambient
θ
θ
θ
θ
Still air
150
140
120
40
°C/W
°C/W
°C/W
°C/W
JA
JA
JA
JC
1 m/s air flow
3 m/s air flow
Thermal Resistance Junction to Case
MDS 1726-01A C
5
Revision 052804
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
MK1726-01A
Low EMI Clock Generator
Package Outline and Package Dimensions (8-pin TSSOP)
Package dimensions are kept current with JEDEC Publication No. 95
Millimeters
Inches
Max
8
Symbol
Min
--
Max
1.20
0.15
1.05
0.30
0.20
3.10
Min
--
A
A1
A2
b
0.047
0.006
0.041
0.012
0.05
0.80
0.19
0.09
2.90
0.002
0.032
0.007
E1
E
INDEX
AREA
C
0.0035 0.008
0.114 0.122
0.252 BASIC
0.169 0.177
0.0256 Basic
D
E
E1
e
6.40 BASIC
4.30 4.50
0.65 Basic
1
2
L
α
0.45
0°
0.75
8°
0.018
0°
0.030
8°
D
aaa
-
0.10
-
0.004
A
2
A
A
1
c
- C -
e
SEATING
PLANE
b
L
aaa
C
MDS 1726-01A C
6
Revision 052804
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
MK1726-01A
Low EMI Clock Generator
Package Outline and Package Dimensions (8-pin SOIC, 150 Mil. Body)
Package dimensions are kept current with JEDEC Publication No. 95
Millimeters
Inches
8
Symbol
Min
Max
1.75
0.25
0.51
0.25
5.00
4.00
Min
Max
A
A1
B
C
D
E
e
1.35
0.10
0.33
0.19
4.80
3.80
.0532
.0040
.013
.0075
.1890
.1497
.0688
.0098
.020
.0098
.1968
.1574
E
H
INDEX
AREA
1.27 BASIC
0.050 BASIC
1
2
H
h
L
5.80
0.25
0.40
0°
6.20
.2284
.010
.016
0°
.2440
.020
.050
8°
0.50
1.27
8°
D
α
A
h x 45
A1
C
- C -
e
SEATING
PLANE
B
L
.10 (.004)
C
Ordering Information
Part / Order Number
MK1726-01A
Marking
172601A
172601A
172601S
172601S
Shipping Packaging
Tubes
Package
Temperature
0 to +85° C
0 to +85° C
0 to +85° C
0 to +85° C
8-pin TSSOP
8-pin TSSOP
8-pin SOIC
8-pin SOIC
MK1726-01ATR
MK1726-01S
MK1726-01STR
Tape and Reel
Tubes
Tape and Reel
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS)
assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would
result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial
applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary
environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any
circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or
critical medical instruments.
MDS 1726-01A C
7
Revision 052804
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
相关型号：
©2020 ICPDF网 联系我们和版权申明