MK3723SLF [IDT]

Clock Generator, 14MHz, CMOS, PDSO8, 0.150 INCH, SOIC-8;


型号：	MK3723SLF
厂家：	INTEGRATED DEVICE TECHNOLOGY
描述：	Clock Generator, 14MHz, CMOS, PDSO8, 0.150 INCH, SOIC-8 时钟光电二极管外围集成电路晶体
文件：	总6页 (文件大小：78K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

MK3723

LOW COST 3.3 VOLT VCXO

VIN is a high impedance input, it can be driven directly

from an PWM RC integrator circuit.

Description

The MK3723 series of devices includes the original

MK3723S and the new MK3723D. The MK3723D is a

drop-in replacement for the MK3723S device.

Compared to the earlier device, the MK3723D offers a

wider operating frequency range and improved power

supply noise rejection.

Features

• MK3723D is a drop-in replacement for the earlier

MK3723S device

• Packaged in 8 pin SOIC

• Operating voltage of 3.3 V (±5%)

The MK3723 is ICS’ low cost, low jitter, high

performance 3.3 volt VCXO designed to replace

expensive discrete VCXO modules. The on-chip

Voltage Controlled Crystal Oscillator accepts a 0 to

3.3V input voltage to cause the output clocks to vary by

±100 ppm. Using ICS’ patented VCXO techniques, the

device uses an inexpensive external pullable crystal in

the range of 16 - 28 MHz to produce a VCXO output

clock that is a divide by 2, 4, 6, or 8 of the crystal

frequency.

• VCXO Operational frequency range of 2 MHz to 14

MHz

• Uses an inexpensive external crystal

• On-chip patented VCXO with pull range of 200ppm

(minimum)

• VCXO tuning voltage of 0 to 3.3 V

• 12 mA output drive capability at TTL levels

• Advanced, low power, sub-micron CMOS process

ICS manufactures the largest variety of Set-Top Box

and multimedia clock synthesizers for all applications.

If more clock outputs are needed, see the MK3732 or

MK377x family of parts. Consult ICS to eliminate

VCXOs, crystals, and oscillators from your board.

• For frequencies between 8 MHz to 16 MHz, use the

MK3711D. For frequencies between 1 MHz and 8

MHz, use the MK3713D. For higher than 28 MHz,

use the MK3732-05.

The frequency of the on-chip VCXO is adjusted by an

external control voltage input into pin VIN. Because

MK3723D is Recommended for New Designs

Block Diagram

V DD

VIN

Voltage

16-28 MH z

P ullable C rystal

C ontrolled

Crystal

V CX O CLK

Oscillator

S 1, S 0

GN D

MDS 3723 C

Revision 070601

Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 295-9800 ● www.icst.com

MK3723

LOW COST 3.3 VOLT VCXO

Pin Assignment

Divider Select Table

VCXOCLK (MHz)

Crystal ÷ 2

Crystal ÷ 4

Crystal ÷ 6

Crystal ÷ 8

X 1

V D D

V I N

X 2

S 1

V C X O C L K

S 0

G N D

0 = connect to ground, 1=connect to VDD

M K 3 7 2 3 S

M K 3 7 2 3 D

8 P i n ( 1 5 0 m i l ) S O I C

Pin Descriptions

Pin Description

Number

Name

Type

Input

Crystal connection. Connect to a pullable 16-28 MHz crystal.

VDD

VIN

Power Connect to +3.3 V (0.01uf decoupling capacitor recommended).

Input

Voltage input to VCXO. Zero to 3.3V signal which controls the VCXO

frequency.

GND

Power Connect to ground.

Input Select pin for VCXO divider. See table above.

VCXOCLK Output VXCO clock output. Full CMOS output amplitude.

Input

Select pin for VCXO divider. See table above.

Crystal connection. Connect to a pullable 16 - 28 MHz crystal.

MDS 3723 C

Revision 070601

Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 295-9800 ● www.icst.com

MK3723

LOW COST 3.3 VOLT VCXO

The external crystal must be connected as close to the

chip as possible and should be on the same side of the

PCB as the MK3723. There should be no via’s between

the crystal pins and the X1 and X2 device pins. There

should be no signal traces underneath or close to the

crystal. See application note MAN05.

External Component Selection

The MK3723 requires a minimum number of external

components for proper operation.

Decoupling Capacitors

A decoupling capacitor of 0.01µF should be connected

between VDD and GND on pin 2 and 4, as close to the

MK3723 as possible. For optimum device

performance, the decoupling capacitor should be

mounted on the component side of the PCB. Avoid the

use of vias in the decoupling circuit.

Crystal Tuning Load Capacitors

The crystal traces should include pads for small fixed

capacitors, one between X1 and ground, and another

between X2 and ground. Stuffing of these capacitors

on the PCB is optional. The need for these capacitors

is determined at system prototype evaluation, and is

influenced by the particular crystal used (manufacture

and frequency) and by PCB layout. The typical required

capacitor value is 1 to 4 pF.

Series Termination Resistor

When the PCB trace between the clock output and the

load is over 1 inch, series termination should be used.

To series terminate a 50Ω trace (a commonly used

trace impedance) place a 33Ω resistor in series with

the clock line, as close to the clock output pin as

possible. The nominal impedance of the clock output is

20Ω.

To determine the need for and value of the crystal

adjustment capacitors, you will need a PC board of

your final layout, a frequency counter capable of about

1 ppm resolution and accuracy, two power supplies,

and some samples of the crystals which you plan to

use in production, along with measured initial accuracy

for each crystal at the specified crystal load

capacitance, CL.

Quartz Crystal

The MK3723 VCXO function consists of the external

crystal and the integrated VCXO oscillator circuit. To

assure the best system performance (frequency pull

range) and reliability, a crystal device with the

recommended parameters (shown below) must be

used, and the layout guidelines discussed in the

following section must be followed.

To determine the value of the crystal capacitors:

1. Connect VDD of the MK3723 to 3.3V. Connect pin 3

of the MK3723 to the second power supply. Adjust the

voltage on pin 3 to 0V. Measure and record the

frequency of the CLK output.

2. Adjust the voltage on pin 3 to 3.3V. Measure and

record the frequency of the same output.

The frequency of oscillation of a quartz crystal is

determined by its “cut” and by the load capacitors

connected to it. The MK3723 incorporates on-chip

variable load capacitors that “pull” (change) the

frequency of the crystal. The crystal specified for use

with the MK3723 is designed to have zero frequency

error when the total of on-chip + stray capacitance is

14pF.

To calculate the centering error:

(f_3.0V– f_target) + (f_0V– f_target

)

Error = 10⁶x ------------------------------------------------------------------------------ – e r r o r _xtal

f_{t arget}

Recommended Crystal Parameters:

Initial Accuracy at 25°C

Temperature Stability

Aging

Load Capacitance

Shunt Capacitance, C0

C0/C1 Ratio

±20 ppm

±30 ppm

±20 ppm

14 pf

7 pF Max

250 Max

35 Ω Max

Where:

f_target= nominal crystal frequency

error_xtal=actual initial accuracy (in ppm) of the crystal

being measured

Equivalent Series Resistance

MDS 3723 C

Revision 070601

Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 295-9800 ● www.icst.com

MK3723

LOW COST 3.3 VOLT VCXO

If the centering error is less than ±25 ppm, no

pin to ground. The value for each of these caps (in pF)

is given by:

adjustment is needed. If the centering error is more

than 25ppm negative, the PC board has excessive

stray capacitance and a new PCB layout should be

considered to reduce stray capacitance. (Alternately,

the crystal may be re-specified to a higher load

capacitance. Contact ICS MicroClock for details.) If the

centering error is more than 25ppm positive, add

identical fixed centering capacitors from each crystal

External Capacitor =

2 x (centering error)/(trim sensitivity)

Trim sensitivity is a parameter which can be supplied

by your crystal vendor. If you do not know the value,

assume it is 30 ppm/pF. After any changes, repeat the

measurement to verify that the remaining error is

acceptably low (typically less than ±25ppm).

Absolute Maximum Ratings

Stresses above the ratings listed below can cause permanent damage to the MK3723. These ratings,

which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of

the device at these or any other conditions above those indicated in the operational sections of the

specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can

affect product reliability. Electrical parameters are guaranteed only over the recommended operating

temperature range.

Item

Rating

Supply Voltage, VDD

All Inputs and Outputs

-0.5V to VDD+0.5V

0 to +70°C

Ambient Operating Temperature

Storage Temperature

-65 to +150°C

260°C

Soldering Temperature

Recommended Operation Conditions

Parameter

Min.

Typ.

Max.

+70

Units

°C

Ambient Operating Temperature

Power Supply Voltage (measured in respect to GND)

Reference crystal parameters

–

+3.15

+3.45

Refer to page 3

MDS 3723 C

Revision 070601

Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 295-9800 ● www.icst.com

MK3723

LOW COST 3.3 VOLT VCXO

DC Electrical Characteristics

VDD=3.3V ±5% , Ambient temperature 0 to +70°C, unless stated otherwise

Parameter

Operating Voltage

Symbol

VDD

V_OH

Conditions

Min.

3.15

2.4

Typ.

Max.

Units

3.45

Output High Voltage

Output Low Voltage

I_OH= -12 mA

I_OL= 12 mA

I_OH= -4 mA

V_OL

0.4

Output High Voltage (CMOS

Level)

V_OH

VDD-0.4

2.0

Input High Voltage, S1:S0

Input Low Voltage, S1:S0

Operating Supply Current

Short Circuit Current

V_IH

V_IL

0.8

3.3

IDD

I_OS

V_IA

No load

±50

VIN, VCXO Control Voltage

AC Electrical Characteristics

VDD = 3.3V ±5%, Ambient Temperature 0 to +70° C, unless stated otherwise

Parameter

Input Crystal Frequency

Output Frequency

Crystal Pullability

MK3723D

Symbol

Conditions

Min. Typ. Max. Units

F_I

MHz

F_O

F_P

0V< VIN < 3.3V, Note 1

+ 115

+ 100

ppm

MK3723S

VCXO Gain

MK3723D

VIN = VDD/2 + 1V, Note 1

0.8 to 2.0V, C_L=15pF

2.0 to 0.8V, C_L=15pF

Measured at 1.4V, C_L=15pF

C_L=15pF

120

140

ppm/V

MK3723S

Output Rise Time

Output Fall Time

Output Clock Duty Cycle

t_OR

t_OF

t_D

1.5

Maximum Output Jitter,

short term

t_J

Note 1: External crystal device must conform with Pullable Crystal Specifications listed on page 3.

MDS 3723 C

Revision 070601

Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 295-9800 ● www.icst.com

MK3723

LOW COST 3.3 VOLT VCXO

Package Outline and Package Dimensions (8 pin SOIC)

Package dimensions are kept current with JEDEC Publication No. 95

Millimeters

Inches

Min Max

Symbol

Min

1.35

1.10

0.33

0.19

4.80

3.80

Max

1.75

0.25

0.51

0.25

5.00

4.00

0.0532 0.0688

0.0040 0.0098

0.013

0.0075 0.0098

.1890 .1968

0.020

Index

Area

0.1497 0.1574

0.050 Basic

1.27 Basic

5.80

0.25

0.40

0°

6.20

0.50

1.27

8°

0.2284 0.2440

0.010

0.016

0°

0.020

0.050

8°

Pin 1

h x 45⁰

Ordering Information

Part / Order Number

(Note 1)

Marking

Shipping

packaging

Package

Temperature

MK3723D

MK3723S

Tubes

8 pin SOIC

0 to +70° C

MK3723DTR

MK3723S

Tape and Reel

Tubes

MK3723STR

Tape and Reel

Note 1: MK3723D is recommended for new designs.

While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS)

assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would

result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial

applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary

environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any

circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or

critical medical instruments.

MDS 3723 C

Revision 070601

Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 295-9800 ● www.icst.com

MK3723SLF [IDT]

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