QS52807BTSOX [IDT]

Clock Driver, CMOS, PDSO20;


型号：	QS52807BTSOX
厂家：	INTEGRATED DEVICE TECHNOLOGY
描述：	Clock Driver, CMOS, PDSO20 光电二极管
文件：	总6页 (文件大小：71K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

QS52807/A

GUARANTEEDLOWSKEWCMOSCLOCKDRIVER/BUFFER

INDUSTRIALTEMPERATURERANGE

GUARANTEED LOW SKEW

QS52807/A

CMOS CLOCK

DRIVER/BUFFER

FEATURES:

DESCRIPTION

−

10 outputs

The QS52807 clock driver/buffer circuits can be used for clock

Rail-to-rail output voltage swing

25Ω on-chip resistors available for low noise

Input hysteresis for better noise margin

Guaranteed low skew:

buffering schemes where low skew is a key parameter. The QS52807

offers tennon-invertingoutputs. DesignedinIDT's proprietaryQCMOS

process,these devices provide lowpropagationdelaybufferingwithon-

chipskewof0.3ns forsame-transitionsignals.TheQS52807has on-chip

series terminationresistors forlowernoise clocksignals. The QS52807

series resistorversionis recommendedfordrivingunterminatedlines

with capacitive loading and other noise sensitive clock distribution

circuits. These clock buffer products are designed for use in high-

performance workstations,embeddedandpersonalcomputingsystems.

Severaldevices canbe usedinparallelorscatteredthroughouta system

forguaranteedlowskew, system-wide clockdistributionnetworks. Rail-

to-railoutputswingimproves noise marginandallows easyinterface with

CMOS inputs.

•

0.3ns output skew (same bank)

0.6ns output skew (different bank)

1ns part-to-part skew

−

Std. and A speed grades

Available in QSOP and SOIC packages

The QS52807 is characterized for operation at -40°C to +85°C.

FUNCTIONALBLOCKDIAGRAM

O¹

O²

O³

O⁴

O⁵

O⁶

O⁷

O⁸

O⁹

O¹⁰

INDUSTRIAL TEMPERATURE RANGE

SEPTEMBER 2000

1999 Integrated Device Technology, Inc.

DSC-5233/-

QS52807/A

GUARANTEEDLOWSKEWCMOSCLOCKDRIVER/BUFFER

INDUSTRIALTEMPERATURERANGE

ABSOLUTE MAXIMUM RATINGS ⁽¹⁾

PINCONFIGURATION

Symbol

Description

Supply Voltage to Ground

DC Output Voltage VOUT

DC Input Voltage VIN

Max.

– 0.5 to +7

-3

Unit

(2)

VTERM

VCC

O10

GND

(3)

VTERM

AC Input Voltage (pulse width ≤20ns)

IOUT

DC Output Current VIN < 0

DC Output Current Max. Sink Current/Pin

Storage Temperature

-20

°C

VCC

GND

120

SO20-2

SO20-8

TSTG

– 65 to +150

150

GND

VCC

Junction Temperature

NOTES:

1. Stresses greater than those listed under ABSOLUTE MAXIMUM

RATINGS may cause permanent damage to the device. This is a

stress rating only and functional operation of the device at these or

any other conditions above those indicated in the operational sections

of this specification is not implied. Exposure to absolute maximum

rating conditions for extended periods may affect reliability.

2. Vcc Terminals.

VCC

GND

QSOP/ SOIC

TOP VIEW

3. All terminals except Vcc.

CAPACITANCE _{(TA = +25 C, f = 1.0MHz, VIN = 0V)}

QSOP

SOIC

Max. ⁽¹⁾

Pins

Typ.

Max. ⁽¹⁾

Typ.

Unit

CIN

NOTE:

1. This parameter is guaranteed but not production tested.

PIN DESCRIPTION

Pin Names

I/O

Description

Clock Input

Clock Outputs

QS52807/A

GUARANTEEDLOWSKEWCMOSCLOCKDRIVER/BUFFER

INDUSTRIALTEMPERATURERANGE

DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE

Following Conditions Apply Unless Otherwise Specified:

Industrial: T^A= -40°C to +85°C, V^CC= 5.0V ± 10%, VHC = V^CC- 0.2V, V^LC= 0.2V

Symbol

Parameter

Input HIGH Voltage

Test Conditions

Min.

Typ.⁽¹⁾

Max.

Unit

VIH

Guaranteed Logic HIGH for All Inputs

—

VIL

Input LOW Voltage

Clamp Diode Voltage ⁽³⁾

Guaranteed Logic LOW for All Inputs

Vcc = Min., IIN = -18mA

—

3.6

2.4

—

–0.7

4.3

—

0.8

–1.2

—

VIC

VOH

Output HIGH Voltage

Vcc = Min., VIN = VIH or VIL, IOH = -12mA

Vcc = Min., VIN = VIH or VIL, IOH = -24mA

Vcc = Min., VIN = VIH or VIL, IOL = 12mA

Vcc = Max., VIN = VCC or GND

Vcc = 0V, VIN = VCC or GND

—

VOL

IIN

Output LOW Voltage

Input Leakage Current

Input Power Off Leakage

—

0.5

±1

—

µA

—

IOFF

IOS

—

(2,3)

Short Circuit Current

Vcc = Max., VOUT = GND

—

–

—

∆VT

ROUT

Input Hysteresis

Output Resistance ⁽⁴⁾

V_TLH- V_THLfor All Inputs

0.2

—

Vcc = Min., IOL = 12mA

—

Ω

NOTES:

1. Typical values are at V^CC= 5.0V, T^A= 25°C.

2. Not more than one output should be used to test this high power condition. Duration is less than one second.

3. Guaranteed by design but not tested.

4. Output resistance represents the total output impedance of the logic device and includes added series termination resistance.

POWER SUPPLY CHARACTERISTICS

Symbol

Parameter

Test Conditions

VCC = Max., VIN = GND or Vcc

Typ.

Max.

Unit

ICC

Quiescent Power Supply Current

0.005

0.5

2.5

∆ICC

Supply Current per Input HIGH

_CC= Max., V = 3.4V

0.5

Input toggling at 50% duty cycle

ICCD

Dynamic Power Supply Current per Output ⁽¹⁾VCC = Max., outputs Enabled

0.12

0.2

mA/MHz

Total Power Supply Current Examples ⁽²⁾

VCC = Max.,

VIN = GND or Vcc

VIN = GND or 3V

Input at 50% duty cycle

fI = 10MHz

2.2

V_CC= Max.,

V = GND or Vcc

Input at 50% duty cycle

fI = 2.5MHz

VIN = GND or 3V

3.5

NOTES:

1. Guaranteed by design but not tested. C^L= 0pF.

2. I^C= I^CC+ (∆I^CC)(D^H)(N^T) + I^CCD(f^O)(N^O)

where:

D^H= Input Duty Cycle

N^T= Number of TTL HIGH inputs at D^H

f^O= Output Frequency

N^O= Number of outputs at f^O

QS52807/A

GUARANTEEDLOWSKEWCMOSCLOCKDRIVER/BUFFER

INDUSTRIALTEMPERATURERANGE

SWITCHING CHARACTERISTICS OVER OPERATING RANGE

T^A= -40°C to +85°C, V^CC= 5.0V ± 10%

C^LOAD= 50pF (no resistor)

QS52807

QS52807A

Min.

Max.

Min.

Max.

Symbol

tSK(01)

tSK(P)

Parameter ⁽¹⁾

Skew between all outputs, same transition

Pulse Skew; skew between opposite transitions of the same

output (tPHL - tPLH)

Part-to-part skew ⁽²⁾

Propagation Delay ⁽²⁾

Unit

—

0.5

—

0.35

—

tSK(T)

tPLH

tPHL

1.5

5.6

—

1.5

5.3

1.5

IN to Ox

Output Rise Time, 0.8V to 2V ⁽³⁾

Output Fall Time, 0.2Vcc to 0.8Vcc ⁽³⁾

—

1.5

—

1.5

NOTES:

1. Skew parameters are guaranteed across temperature range, but not tested. Skew parameters are measured at 0.5Vcc.

2. t^SK(T)only applies to devices of the same transition, part type, temperature, power supply voltage, loading, package, and speed grade.

3. The propagation delay range indicated by Min. and Max. specifications results from process and environmental variables. These propagation delays

do not imply limit skew.

QS52807/A

GUARANTEEDLOWSKEWCMOSCLOCKDRIVER/BUFFER

INDUSTRIALTEMPERATURERANGE

TESTCIRCUITSANDWAVEFORMS

VCC

VIN

VOUT

Pulse

DUT

Generator

500Ω

50pF

50Ω

Pulse generator for all pulses: f ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns

PULSE SKEW — tSK(P)

PROPAGATIONDELAY

1.5V

INPUT

1.5V

tPLH

tPHL

tPLH

V^OH

OUTPUT

2.0V

0.5VCC

V^OL

OUTPUT

0.5VCC

0.8V

V^OL

tSK(p) = tPHL - tPLHL

OUTPUT SKEW — tSK(O1)

PART-TO-PART SKEW — tSK(T)

1.5V

INPUT

1.5V

INPUT

tPHL1

tPLH1

tPHL1

tPLH1

V^OH

0.5V

V^OL

V^OH

0.5VCC

V^OL

PART 1 OUTPUT

PART 2 OUTPUT

OUTPUT 1

OUTPUT 2

tSK(t)

tSK(O1)

V^OH

0.5VCC

V^OL

0.5VCC

V^OL

tPLH2

tPHL2

tPLH2

tPHL2

tSK(01) = tPLH2 - tPLH1 or tPHL2 - tPHL1

tSK(p) = tPLH2 - tPLH1 or tPHL2 - tPHL1

QS52807/A

GUARANTEEDLOWSKEWCMOSCLOCKDRIVER/BUFFER

INDUSTRIALTEMPERATURERANGE

ORDERINGINFORMATION

XXXX

Device Type

Package

Small Outline IC (300 mil) (SO20-2)

Quarter-size Small Outline Package (SO20-8)

52807

Guaranteed Low Skew CMOS Clock Driver/Buffer

52807A

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