IW4518BD [IKSEMICON]

Dual Up-Counter High-Voltage Silicon-Gate CMOS; 双向上计数器高压硅栅CMOS


型号：	IW4518BD
厂家：	IK SEMICON CO., LTD
描述：	Dual Up-Counter High-Voltage Silicon-Gate CMOS 双向上计数器高压硅栅CMOS 计数器高压栅
文件：	总6页 (文件大小：269K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

TECHNICAL DATA

IW4518B

Dual Up-Counter

High-Voltage Silicon-Gate CMOS

The IW4518B Dual BCD Up-Counter consists two identical,

internally synchronous 4-stage counters. The counter stages are D-type

flip-flops having interchangeable CLOCK and ENABLE lines for

incrementing on either the positive-going or negative-going transition. For

single-unit operation the ENABLE input is maintained high and the

counter advances on each positive-going transition of the CLOCK. The

counters are cleared by high levels on their RESET lines.

The counter can be cascaded in the ripple mode by connecting Q4 to

the enable input of the subsequent counter while the CLOCK input of the

latter is held low.

ORDERING INFORMATION

IW4518BN Plastic

IW4518BD SOIC

T_A= -55° to 125° C for all packages

•

Operating Voltage Range: 3.0 to 18 V

Maximum input current of 1 μA at 18 V over full package-temperature

range; 100 nA at 18 V and 25°C

•

Noise margin (over full package temperature range):

1.0 V min @ 5.0 V supply

2.0 V min @ 10.0 V supply

2.5 V min @ 15.0 V supply

PIN ASSIGNMENT

LOGIC DIAGRAM

FUNCTION TABLE

Inputs

CLOCK ENABLE RESET

Outputs

Mode

Increment Counter

No Change

PIN 16=V_CC

PIN 8= GND

No Change

Q1 thru Q4=L

X = don’t care

Rev. 00

IW4518B

MAXIMUM RATINGS^*

Symbol

Parameter

Value

-0.5 to +20

-0.5 to V_CC+0.5

±10

Unit

V_CC

V_IN

V_OUT

I_IN

DC Supply Voltage (Referenced to GND)

DC Input Voltage (Referenced to GND)

DC Output Voltage (Referenced to GND)

DC Input Current, per Pin

P_D

Power Dissipation in Still Air, Plastic DIP+

SOIC Package+

750

500

P_D

Tstg

T_L

Power Dissipation per Output Transistor

Storage Temperature

100

-65 to +150

260

°C

Lead Temperature, 1 mm from Case for 10 Seconds

(Plastic DIP or SOIC Package)

°C

^*Maximum Ratings are those values beyond which damage to the device may occur.

Functional operation should be restricted to the Recommended Operating Conditions.

+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C

SOIC Package: : - 7 mW/°C from 65° to 125°C

RECOMMENDED OPERATING CONDITIONS

Symbol

V_CC

Parameter

Min

3.0

Max

Unit

DC Supply Voltage (Referenced to GND)

DC Input Voltage, Output Voltage (Referenced to GND)

Operating Temperature, All Package Types

V_IN, V_OUT

T_A

V_CC

+125

-55

°C

This device contains protection circuitry to guard against damage due to high static voltages or electric fields.

However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this

high-impedance circuit. For proper operation, V_INand V_OUTshould be constrained to the range GND≤(V_INor

V_OUT)≤V_CC.

Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V_CC). Unused

outputs must be left open.

Rev. 00

IW4518B

DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)

V_CC

Guaranteed Limit

Symbol

V_IH

Parameter

Test Conditions

Unit

≥-55°C

25°C

≤125

°C

Minimum High-Level V_OUT= 0.5 V or V_CC- 0.5V

Input Voltage

5.0

3.5

V_OUT= 1.0 V or V_CC- 1.0 V

V_OUT= 1.5 V or V_CC- 1.5V

V_IL

V_OH

V_OL

Maximum Low -

Level Input Voltage

V_OUT= 0.5 V or V_CC- 0.5V

V_OUT= 1.0 V or V_CC- 1.0 V

V_OUT= 1.5 V or V_CC- 1.5V

5.0

1.5

Minimum High-Level V_IN=GND or V_CC

Output Voltage

5.0

4.95

9.95

14.95

4.95

9.95

14.95 14.95

4.95

9.95

Maximum Low-Level V_IN=GND or V_CC

Output Voltage

5.0

0.05

I_IN

Maximum Input

Leakage Current

V_IN= GND or V_CC

±0.1

±1.0

μA

I_CC

Maximum Quiescent

Supply Current

(per Package)

5.0

100

150

300

600

3000

I_OL

Minimum Output

Low (Sink) Current

V_IN= GND or V_CC

U_OL=0.4 V

U_OL=0.5 V

5.0

0.64

1.6

4.2

0.51

1.3

3.4

0.36

0.9

2.4

U_OL=1.5 V

I_OH

Minimum Output

V_IN= GND or V_CC

High (Source) Current U_OH=2.5 V

U_OH=4.6 V

5.0

-2

-1.6

-0.51

-1.3

-1.15

-0.36

-0.9

-0.64

-1.6

-4.2

U_OH=9.5 V

U_OH=13.5 V

-3.4

-2.4

Rev. 00

IW4518B

AC ELECTRICAL CHARACTERISTICS (C_L=50pF, R_L=200kΩ, Input t_r=t_f=20 ns)

V_CC

Guaranteed Limit

Symbol

f_max

Parameter

Unit

≥-55°C

25°C

≤125°C

Maximum Clock Frequency, (Figure 1)

5.0

1.5

0.75

1.5

MHz

t_PHL, t_PLHMaximum Propagation Delay, Clock or Enable

to Output (Figures 1,3)

5.0

560

230

160

560

230

160

1120

460

320

t_PHL

Maximum Propagation Delay, Reset to Output

(Figure 2)

5.0

650

225

170

650

225

170

1300

450

340

t_THL, t_TLHMaximum Output Transition Time, Any Output

(Figure 1)

5.0

200

100

200

100

400

200

160

C_IN

Maximum Input Capacitance

7.5

TIMING REQUIREMENTS (C_L=50pF, R_L=200 kΩ, Input t_r=t_f=20 ns)

V_CC

Guaranteed Limit

Symbol

t_w

Parameter

Unit

≥-55°C

25°C

≤125°C

Minimum Pulse Width, Clock (Figure 1)

5.0

200

100

200

100

400

200

140

t_w

Minimum Pulse Width, Reset (Figure 2)

Minimum Pulse Width, Enable (Figure 3)

5.0

250

110

250

110

500

220

160

μs

t_w

5.0

400

200

140

400

200

140

800

400

280

t_r, t_f

Maximum Input Rise and Fall Times

(Figure 1)

5.0

Figure 1. Switching Waveforms

Figure 2. Switching Waveforms

Rev. 00

IW4518B

Figure 3. Switching Waveforms

TIMING DIAGRAM

EXPANDED LOGIC DIAGRAM

(1/2 of the Device)

Rev. 00

IW4518B

N SUFFIX PLASTIC DIP

(MS - 001BB)

Dimension, mm

Symbol

MIN

18.67

6.1

MAX

19.69

7.11

5.33

0.36

1.14

0.56

1.78

2.54

7.62

SEATING

PLANE

-T-

2.92

7.62

0.2

3.81

8.26

0.36

0.25 (0.010) M

NOTES:

1. Dimensions “A”, “B” do not include mold flash or protrusions.

Maximum mold flash or protrusions 0.25 mm (0.010) per side.

0.38

D SUFFIX SOIC

(MS - 012AC)

Dimension, mm

Symbol

MIN

9.8

MAX

3.8

1.35

0.33

0.4

1.75

0.51

1.27

R x 45

1.27

5.72

-T-

SEATING

PLANE

0.25 (0.010) M T C

0.1

0.19

5.8

0.25

6.2

NOTES:

1. Dimensions A and B do not include mold flash or protrusion.

2. Maximum mold flash or protrusion 0.15 mm (0.006) per side

0.25

0.5

for A; for B 0.25 mm (0.010) per side.

‑

Rev. 00

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