1ED44176N01F [INFINEON]
EiceDRIVERTM 25V 单通道低边非反向栅极驱动器，适用于 MOSFET 和 IGBT，采用小型 8 引脚 PG-DSO8 封装，典型拉电流为0.8 A，灌电流为1.75 A。;
| 型号： | 1ED44176N01F |
| 厂家： | 
Infineon |
| 描述： | EiceDRIVERTM 25V 单通道低边非反向栅极驱动器，适用于 MOSFET 和 IGBT，采用小型 8 引脚 PG-DSO8 封装，典型拉电流为0.8 A，灌电流为1.75 A。 栅极驱动 双极性晶体管 驱动器 |
| 文件： | 总20页 (文件大小：1160K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
1ED44176N01F
Single-channel low-side gate driver IC with over-current protection
Features
Potential applications
Over-current detection with positive voltage input
0.5 V over-current threshold with accurate ±5%
tolerance
Single pin for fault output and enable
Programmable fault clear time
Under voltage lockout
CMOS Schmitt-triggered inputs
3.3 V, 5 V and 15 V input logic compatible
Output in phase with input
Digitally controlled PFC
Air conditioner
Home appliances
Industrial applications
General purpose low-side gate driver for single-ended
topologies
Separate logic and power ground
2 kV ESD HBM
RoHS compliant
Evaluation board available: EVAL-1ED44176N01F
Description
The 1ED44176N01F is a low-voltage, power MOSFET and IGBT non-inverting gate driver. Proprietary latch immune CMOS
technologies enable ruggedized monolithic construction. The logic input is compatible with standard CMOS or LSTTL
output. The output driver features a current buffer stage. The 1ED44176N01F has OCP pin for over current protection sense
and a FAULT status output (Once it is active, EN/FLT pin is internally pulled down.). There is a dedicated pin (FLTC) to
program fault clear time. The EN/FLT needs to be outside pulled up to provide normal operation, pulling EN/FLT low
disable the driver. Internal circuitry on VCC pin provides an under voltage lockout protection that holds output low until
Vcc supply voltage is within operating range.
Vout
Vin
VCC
Vdd
I/O1
I/O2
1ED44176N01F
IN
VCC
VSS
EN/FLT
FLTC
OUT
COM
µC
(Refer to lead assignments for correct
pin configuration). This diagram show
electrical connections only. Please refer
to our application notes and design tips
for proper circuit board layout.
OCP
Gnd
Figure 1
Typical application
Ordering information
Product type
Package
Standard pack
Form
Orderable part number
Quantity
1ED44176N01F
PG-DSO-8
Tape and Reel
2500
1ED44176N01FXUMA1
Product validation
Qualified for industrial applications according to the relevant tests of JEDEC JESD47/22 and J-STD-020.
Datasheet
www.infineon.com/gdLowSide
Please read the Important Notice and Warnings at the end of this document
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Single-channel low-side gate driver IC with over-current protection and fault/enable
Table of content
Table of contents
Features ........................................................................................................................................ 1
Table of contents............................................................................................................................ 2
1
Block diagram........................................................................................................................ 3
2
2.1
2.2
Pin configuration and functionality.......................................................................................... 4
Pin configuration.....................................................................................................................................4
Input/output logic truth table ................................................................................................................5
3
Qualification information........................................................................................................ 6
4
Electrical parameters ............................................................................................................. 7
Absolute maximum ratings.....................................................................................................................7
Recommended operating conditions.....................................................................................................7
Static electrical characteristics...............................................................................................................8
Dynamic electrical characteristics..........................................................................................................8
4.1
4.2
4.3
4.4
5
Application information and additional details.......................................................................... 9
IGBT/MOSFET gate driver........................................................................................................................9
Switching and timing relationships........................................................................................................9
Input logic compatibility.......................................................................................................................10
Undervoltage lockout (Vcc)...................................................................................................................10
Over current protection (OCP)..............................................................................................................11
Fault reporting and programmable fault clear timer ..........................................................................13
Enable input ..........................................................................................................................................14
5.1
5.2
5.3
5.4
5.5
5.6
5.7
6
Package outline ....................................................................................................................15
Tape and reel details: PG-DSO8...............................................................................................16
Part marking information ......................................................................................................17
Similar products ...................................................................................................................18
Related documents ...............................................................................................................18
7
8
9
10
Revision history.............................................................................................................................19
Datasheet
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1ED44176N01F
Single-channel low-side gate driver IC with over-current protection and fault/enable
Block diagram
1
Block diagram
5
VCC
PWM
disable
logic
4
IN
VSS/COM
level shift
7
8
OUT
COM
VOCTH
3
EN/FLT
FLTC
OCP
Q
QFLT
S
R
BLK
1
6
OCP
VSS
UVLO
VFLTCTH
IFLTC
UVLO &
Filter
2
Figure 2
Block diagram
Datasheet
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1ED44176N01F
Single-channel low-side gate driver IC with over-current protection and fault/enable
Pin configuration and functionality
2
Pin configuration and functionality
2.1
Pin configuration
Table 1
Pin configuration
Pin no. Name
Function
OCP
Current sense input
Fault clear time program input
1
2
FLTC
Enable and fault reporting pin, two functions:
1. Logic input to enable I/O functionality. I/O logic functions when ENABLE is high and
enable function is not latched.
EN/FLT
3
2. Fault reporting function like over-current or undervoltage lockout, this pin has
negative logic and an open-drain output.
IN
Logic input for gate driver output (OUT), in phase
4
5
6
7
8
VCC
VSS
Supply voltage
Logic ground
OUT
COM
Gate drive output
Gate drive return
8
7
6
5
1
2
3
4
OCP
FLTC
COM
OUT
EN/FLT
IN
VSS
VCC
Figure 3
PG-DSO-8-70 (top view)
Datasheet
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1ED44176N01F
Single-channel low-side gate driver IC with over-current protection and fault/enable
Pin configuration and functionality
2.2
Input/output logic truth table
Table 2
Input/output logic truth table
UVLO 1)
OCP 2)
3)
IN
퐄퐍/퐅퐋퐓
OUT
Note
L
H
L
L
L
L
H
H
L
H
OUT = L
OUT = H
OUT = L, EN/FLT = L, (UVLO protection will disable I/O
logic until EN/FLT returns to high level.)
OUT = L, EN/FLT = L, (Over current protection will
disable I/O logic until EN/FLT returns to high level.)
OUT = L (Externally pull down EN/FLT pin will disable
I/O logic until EN/FLT returns to high level.)
X
X
X
H
L
X
H
X
L
L
L
L
L
L
L
1)
2)
3)
UVLO “H” state is under-voltage protection.
OCP “H” state is over-current protection.
EN/FLT “H” state is EN/FLT pin externally pulling up and internally pull down MOSFET (QFLT) is off.
(See block diagram.)
Datasheet
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1ED44176N01F
Single-channel low-side gate driver IC with over-current protection and fault/enable
Qualification information
3
Qualification information
Industrial 1)
Comments: This family of ICs has passed JEDEC’s Industrial
qualification. Consumer qualification level is granted by
Qualification level
Moisture sensitivity level
ESD
extension of the higher Industrial level.
MSL3 2) 260°C
(per JEDEC standard J-STD-020)
1000 V (Class C3)
(per ANSI/ESDA/JEDEC standard JS-002)
Charged device model
Human body model
Class 2
(per ANSI/ESDA/JEDEC standard JS-001)
Class II, Level A
IC latch-up test
RoHS compliant
(per JESD78)
Yes
1)
2)
Higher qualification ratings may be available should the user have such requirements. Please contact your Infineon
sales representative for further information.
Higher MSL ratings may be available for the specific package types listed here. Please contact your Infineon sales
representative for further information.
Datasheet
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Single-channel low-side gate driver IC with over-current protection and fault/enable
Electrical parameters
4
Electrical parameters
4.1
Absolute maximum ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. The device may not
function or not be operable above the recommended operating conditions and stressing the parts to these levels is not
recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect
device reliability. All voltage parameters are absolute voltages referenced to VSS. The thermal resistance and power
dissipation ratings are measured under board mounted and still air conditions.
Table 3
Absolute maximum ratings
Definition
Symbol
VCC
Min
– 0.5
COM - 0.5
– 0.5
– 0.5
– 0.5
– 0.5
– 5
Max
25
Units
Fixed supply voltage
VO
Output voltage (OUT)
VCC + 0.5
VCC +0.5
VCC + 0.5
VCC + 0.5
VCC + 0.5
VCC + 0.5
0.625
200
VOCP
VEN/FLT
VFLTC
VIN
COM
PD
RthJA
TJ
TS
Voltage at current sense pin (OCP)
Voltage at enable and fault reporting pin (EN/FLT)
Voltage at fault clear time program pin ( FLTC)
Logic input voltage ( IN )
V
Driver return voltage
Package power dissipation @ TA ≤ 25°C
Thermal resistance, junction to ambient
Junction temperature
Storage temperature
Lead temperature (soldering, 10 seconds)
—
—
– 40
– 55
—
W
°C/W
PG-DSO-8
150
150
260
°C
TL
4.2
Recommended operating conditions
For proper operation, the device should be used within the recommended conditions. All voltage parameters are absolute
voltages referenced to VSS unless otherwise stated in the table.
Table 4
Recommended operating conditions
Definition
Symbol
VCC
Min
12.7
COM
0
0
0
0
– 5
– 40
Max
20
Units
Fixed supply voltage
VO
VOCP
Output voltage
VCC
VCC
VCC
VCC
VCC
+5
Voltage at current sense pin (OCP)
Voltage at enable and fault reporting pin (EN/FLT)
Voltage at fault clear time program pin ( FLTC)
Logic input voltage ( IN )
Logic ground with respect to VSS
Ambient temperature
VEN/FLT
VFLTC
VIN
COM
TA
V
125
°C
Datasheet
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1ED44176N01F
Single-channel low-side gate driver IC with over-current protection and fault/enable
Electrical parameters
4.3
Static electrical characteristics
VCC = 15 V, VSS=COM, TA = 25°C unless otherwise specified. The VIN, VEN, VFLTCTH, VOCTH, IIN, I FLT and IFLTC parameters are
,
referenced to VSS and are applicable to input leads: IN,EN/FLT, FLTC and OCP. The VO and IO parameters are referenced to
COM and are applicable to the output lead: OUT.
Table 5
Static electrical characteristics
Symbol Definition
Min
11.2
10.7
—
0.8
1.7
0.8
1.7
2.4
—
—
475
35
-5
—
Typ
11.9
11.4
0.5
1
Max
12.7
12.2
—
1.2
2.5
1.2
2.5
3
0.2
0.1
525
70
Units Test Conditions
VCCUV+ Vcc supply undervoltage positive going threshold
VCCUV- Vcc supply undervoltage negative going threshold
VCCUVH Vcc supply undervoltage lockout hysteresis
VINL
VINH
Logic “0” input voltage (OUT = LO)
Logic “1” input voltage (OUT = HI)
2.1
1
V
VENL Logic “0” disable voltage
VENH Logic “1” enable voltage
VFLTCTH Fault clear threshold Voltage
2.1
2.7
0.05
0.02
500
50
VOH
High level output voltage, VCC -VOUT
IO = 2 mA
IO = 2 mA
mV
VOL Low level output voltage, VOUT
VOCTH Current limit threshold voltage
IIN+
IIN-
IQCC
Logic “1” input bias current IN pin
Logic “0” input bias current IN pin
Quiescent VCC supply current
µA
VIN = 5 V
VIN = 0 V
—
—
—
750
VIN = 0 V or 5 V
VO = 0 V
IO+
Output sourcing short circuit pulsed current
0.56
1.23
0.8
—
—
PW ≤ 10 µs
VO = 15 V
A
IO-
Output sinking short circuit pulsed current
1.75
PW ≤ 10 µs
VEN/FLT = 0.4 V
VFLTC = 0 V
IFLT
EN/FLT pull down sinking current
20
-40
—
-25
—
-15
mA
µA
IFLTC Fault clear sourcing current
4.4
Dynamic electrical characteristics
VCC = 15 V, TA = 25°C, and CL = 1000 pF unless otherwise specified.
Table 6
Dynamic electrical characteristics
Symbol Definition
Min
—
—
Typ
50
50
Max
95
95
Units
Test Conditions
ton
toff
tr
Turn-on propagation delay
Turn-off propagation delay
Turn-on rise time
Figure 6
VIN pulse = 5 V
—
50
80
tf
Turn-off fall time
—
25
35
ns
tEN
Enable propagation delay
—
—
—
50
50
380
95
95
470
Figure 14
VEN pulse = 5 V
Figure 10 Figure 11
REN =10kΩ to Vcc
VOCP pulse = 1 V
Figure 10 Figure 11
CFLTC =1nF to VSS
Figure 11
tDISA Disable propagation delay
tOCPDEL Over current protection propagation delay
tOCPFLT OCP to low level EN/FLT signal delay
—
350
110
440
180
tFLTC FAULT clear time
75
µs
tBLK
Over current protection blanking time
100
180
2
250
ns
µs
RFLT =0Ω, CFLT = NC
VOCP pulse = 1V
Figure 8
tvCCUV VCC supply UVLO filter time
—
—
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1ED44176N01F
Single-channel low-side gate driver IC with over-current protection and fault/enable
Application information and additional details
5
Application information and additional details
Information regarding the following topics is included as subsections within this section of the datasheet.
•
•
•
•
•
•
•
IGBT/MOSFET gate driver
Switching and timing relationships
Input logic compatibility
Undervoltage lockout protection
Over current protection (OCP)
Fault reporting and programmable fault clear timer
Enable input
See the 1ED44176N01F application note AN2018-03 Low - Side Driver with Over Current Protection and Fault/Enable for
interface circuit examples and recommended layout guidelines.
5.1
IGBT/MOSFET gate driver
The 1ED44176N01F is designed to drive MOSFET or IGBT power devices. Figure 4 and Figure 5 illustrate several parameters
associated with the gate driver functionality of the driver. The output current of the driver, used to drive the gate of the
power switch, is defined as IO. The voltage that drives the gate of the external power switch is defined as VOUT
.
Figure 4
Gate output sourcing current
Figure 5
Gate output sinking current
5.2
Switching and timing relationships
The relationships between the input and output signals of the 1ED44176N01F are illustrated below in Figure 6. From the
figure, we can see the definitions of several timing parameters (i.e. ton, toff, tr, and tf) associated with this device.
50%
50%
IN
tf
ton
tr
toff
90%
90%
OUT
10%
10%
Figure 6
Switching time waveforms
Datasheet
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1ED44176N01F
Single-channel low-side gate driver IC with over-current protection and fault/enable
Application information and additional details
5.3
Input logic compatibility
The input of this IC is compatible with standard CMOS and TTL outputs. The 1ED44176N01F has been designed to be
compatible with 3.3 V, 5 V and 15 V logic-level signals. The input high threshold (VINH) is typ. 2.1 V and low threshold (VINL) is
typ. 1 V. Input hysteresis offers enhanced noise immunity. The 1ED44176N01F includes an important feature: wherein,
whenever the input pin is in a floating condition, the output is held in the low state. This is achieved using GND pull-down
resistors on the input pin. Figure 7 illustrates an input signal to the 1ED44176N01F, its input threshold values, and the logic
state of the IC as a result of the input signal.
Figure 7
IN input thresholds
5.4
Undervoltage lockout (Vcc)
The 1ED44176N01F has an internal UVLO protection feature on the VCC pin supply circuit blocks.Upon power-up, if the VCC
voltage fails to reach the VCCUV+ threshold, the driver cannot turn on. Additionally, if the VCC voltage decreases below the
VCCUV- threshold and the VCC bias voltage remains lower than the VCCUV- threshold exceeding UVLO filter time (tVCCUV) during
operation, the undervoltage lockout circuitry will recognize a fault condition and shut-down the drive output. The EN/FLT
will then transit to the low state to inform the controller of the fault condition, regardless of the status of the IN input pin.
The tVCCUV about 2μs helps to suppress noise from the UVLO circuit, so that negative-going voltage spikes at the supply pin
will avoid parasitic UVLO events.
When VCC is higher than VCCUV+ and longer than tFLTC, EN/FLT becomes high and the OUT will follow the input signal IN.
(Figure 8 shows the UVLO time is shorter than tFLTC.)
VCC
VCCUV+
VCCUV-
IN
tVCCUV
OUT
VFLTCTH
FLTC
tFLTC
EN/FLT
Figure 8
Vcc under voltage protection waveform definitions one
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1ED44176N01F
Single-channel low-side gate driver IC with over-current protection and fault/enable
Application information and additional details
Once EN/FLT enters UVLO mode, EN/FLT keeps low until tFLTC is over and VCC supply voltage higher than VCCUV+. (Figure 9
shows the UVLO time is longer than tFLTC.)
VCC
VCCUV+
VCCUV-
IN
tVCCUV
OUT
VFLTCTH
FLTC
tFLTC
EN/FLT
Figure 9
Vcc under voltage protection waveform definitions two
5.5
Over current protection (OCP)
The 1ED44176N01F has a function of over current protection with a threshold VOCTH at the OCP pin. The voltage at this pin is
the voltage across the current sense resistor. To avoid false tripping due to the fast high current switch on transient that
occurs at the switch on of MOSFET or IGBT resulting from the circuit parasitic capacitors, there is blanking interval which
disables over current detection for the period of tBLK. (An additional RC filter is recommended, if the internal tBLK is not
sufficient to suppress the noise.) After tBLK and the voltage of OCP pin is over VOCTH, the 1ED44176N01F causes fault logic to
initiate a fault shutdown sequence. This sequence starts with the generation of a fault signal. The internal MOSFET QFLT is
turned on and EN/FLT pin is pulled down.
At the same time the 1ED44176N01F terminates the present cycle, and the gate output is immediately pulled down with
internal propagation delay (tOCPDEL), see the Figure 10 and Figure 11.
Figure 10 is the diagram of 1ED44176N01F in Boost application. And Figure 11 is the typical waveforms of the application.
If EN/FLT pin enters over current protection mode, EN/FLT pin keeps low until fault clear time is over and OCP terminal
voltage lower than over current threshold voltage.
Figure 11 shows the OCP time is shorter than tFLTC. Figure 12 shows the OCP time is longer than tFLTC
.
Datasheet
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1ED44176N01F
Single-channel low-side gate driver IC with over-current protection and fault/enable
Application information and additional details
Note: If OCP fault condition is removed and the time is longer than fault clear time (tFLTC), the internal pull down MOSFET
QFLT of EN/FLT is released and EN/FLT will be pull up again with Vdd, then the OUT will follow the input signal IN.
Vout
Vin
VCC
Vdd
1ED44176N01F
IN
I/O1
I/O2
VCC
VSS
EN/FLT
FLTC
OUT
COM
µC
OCP
CFLTC
Gnd
CFLT
RFLT
Figure 10 1ED44176N01F in Boost application
IN
50%
OUT
tOCPDEL
Pulse < tBLK
VOCTH
OCP
tOCPFLT
EN/FLT
QFLT off
50%
QFLT on
tFLTC
VFLTCTH
FLTC
Figure 11 OCP fault detection and fault clear waveforms one
Datasheet
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1ED44176N01F
Single-channel low-side gate driver IC with over-current protection and fault/enable
Application information and additional details
IN
50%
OUT
tOCPDEL
Pulse < tBLK
VOCTH
OCP
tOCPFLT
EN/FLT
QFLT off
50%
QFLT on
tFLTC
VFLTCTH
FLTC
Figure 12 OCP fault detection and fault clear waveforms two
5.6
Fault reporting and programmable fault clear timer
The 1ED44176N01F provides a dedicated fault reporting output pin (EN/FLT ) and a programmable fault clear time pin
(FLTC). There are two situations which would cause the driver to report a fault via the EN/FLT pin. The first is an under
voltage condition of VCC and the second is if the OCP pin recognizes a fault. Once the fault condition occurs, the EN/FLT
pin is internally pulled down to VSS. The EN/FLT output stays in the low state until the fault condition has been removed
and the fault clear timer expires; once the fault clear timer expires, the voltage on the EN/FLT pin will return to its external
pull-up voltage.
The length of the fault clear time period (tFLTC) is programmed by external capacitor which connected between FLTC and
VSS (CFLTC). See Figure 10.
The length of the fault clear time period can be determined by using the equation below.
tFLTC= CFLTC*VFLTCTH/ IFLTC
Note: If the OCP last time is longer than tFLTC, the EN/FLT output keeps low until the OCP input voltage lower than OCP
threshold voltage. See Figure 12.
Datasheet
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1ED44176N01F
Single-channel low-side gate driver IC with over-current protection and fault/enable
Application information and additional details
5.7
Enable input
1ED44176N01F provides an enable functionality that allows to shutdown or to enable the output. When EN/FLT is pulled
up (the enable voltage is higher than VENH) the output is able to operate normally, pulling EN/FLT low (the enable voltage is
lower than VENL) the output is disable. The enable function is not latched. The relationships between the input, output and
enable signals of the 1ED44176N01F are illustrated below in Figure 13 - Figure 15. From these figures, we can see the
definitions of several timing parameters and threshold voltages (i.e. tDISA, tEN, VENH and VENL) associated with this device.
High
IN
IN
V
EN
50%
50%
EN/FLT
OUT
tDISA
tEN
OUT
90%
10%
Figure 13 Input/output/enable pins timing diagram Figure 14 EN pin switching time waveform
Figure 15 EN input thresholds
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1ED44176N01F
Single-channel low-side gate driver IC with over-current protection and fault/enable
Package outline
6
Package outline
Figure 16 Package outline
Datasheet
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1ED44176N01F
Single-channel low-side gate driver IC with over-current protection and fault/enable
Tape and reel details: PG-DSO8
7
Tape and reel details: PG-DSO8
LOADED TAPE FEED DIRECTION
A
B
H
D
F
C
NOTE : CONTROLLING
DIMENSION IN MM
E
G
CARRIER TAPE DIMENSION FOR 8SOICN
Metric Imperial
Code
A
B
C
D
E
F
G
H
Min
7.90
3.90
11.70
5.45
6.30
5.10
1.50
1.50
Max
8.10
4.10
12.30
5.55
6.50
5.30
n/a
Min
Max
0.318
0.161
0.484
0.218
0.255
0.208
n/a
0.311
0.153
0.46
0.214
0.248
0.200
0.059
0.059
1.60
0.062
F
D
B
C
A
E
G
H
REEL DIMENSIONS FOR 8SOICN
Metric
Imperial
Code
A
B
C
D
E
F
G
H
Min
329.60
20.95
12.80
1.95
98.00
n/a
14.50
12.40
Max
330.25
21.45
13.20
2.45
102.00
18.40
17.10
14.40
Min
12.976
0.824
0.503
0.767
3.858
n/a
Max
13.001
0.844
0.519
0.096
4.015
0.724
0.673
0.566
0.570
0.488
Figure 17 Tape and reel details
Datasheet
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1ED44176N01F
Single-channel low-side gate driver IC with over-current protection and fault/enable
Part marking information
8
Part marking information
Front Side
Part number
1ED44176
Infineon logo
Date code
H YYWW
Pin 1
identifier
(may vary)
Back Side
XXX
Lot code
XXXX
Assembly
site code
XXXX X
Figure 18 Part marking information
Datasheet
www.infineon.com/gdLowSide
17 of 20
V 2.3
2020-08-06
1ED44176N01F
Single-channel low-side gate driver IC with over-current protection and fault/enable
Similar products
9
Similar products
Channels Typ. gate Part
Max
UVLO
Typ.
Logic
Package
options
drive
number
supply (on/off) prop.
voltage
(Io+/Io-)
delay
(on/off)
A
V
V
ns
Single non-inverting channel
Dual OUT pins
Single negative current sense
OCP, fault out and ENABLE
Single negative current sense
OCP, fault out and ENABLE
1.5 / 1.5 IRS44273L
25
10.2 / 9.2 50 / 50
8/7.3 34 / 34
11.9/11.4 50 / 50
50 / 50
SOT23-5L
SOT23-6-3
SOT23-6-3
SOIC-8L
1
2
2.6 / 2.6 1ED44173
2.6 / 2.6 1ED44175
IRS4426S
25
25
25
Dual inverting channels
Dual inverting channels
IRS44262S 20
10.2 / 9.2 50 / 50
50 / 50
SOIC-8L
2.3 / 3.3
IRS4427S
IRS4428S
25
25
Dual non-inverting channels SOIC-8L
Single inverting channel
SOIC-8L
50 / 50
Single non-inverting channel
10
Related documents
1. AN2018-03 Low - Side Driver with Over Current Protection and Fault/Enable
2. AN2018-11 1ED44176N01F evaluation board
Datasheet
www.infineon.com/gdLowSide
18 of 20
V 2.3
2020-08-06
1ED44176N01F
Single-channel low-side gate driver IC with over-current protection and fault/enable
Revision history
Revision history
Document
version
Date of release
Description of changes
2.0
2.1
2.2
2.3
2018-06-27
2019-06-13
2019-10-15
2020-07-16
Create the document V 2.0
Optimize parameter in table 6
Optimize parameter in table 3
Update the truth table, part marking and table of similar products
Datasheet
www.infineon.com/gdLowSide
19 of 20
V 2.3
2020-08-06
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Edition 2020-08-06
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