6EDL04_技术文档

6EDL04 family

6EDL04x06xT and 6EDL04N02PR family

200 V and 600 V three-phase gate driver with Over Current Protection (OCP),

Enable (EN), Fault and Integrated Bootstrap Diode (BSD)

Features

Product summary

•

Infineon thin-film-SOI-technology

Maximum blocking voltage +600 V

Output source/sink current +0.165 A/-0.375 A

Integrated ultra-fast, low R_DS(ON)Bootstrap Diode

Insensitivity of the bridge output to negative

transient voltages up to -50 V given by SOI-

technology

V_OFFSET(6EDL04x06xT)

= 620 V max.

V_OFFSET(6EDL04N02PR) = 200 V max.

I_O+/-(typ.)

t_on/ t_off(6EDL04Ixxxx)

= +0.165 A / -0.375 A

= 530ns / 490 ns

t_on/ t_off(6EDL04Nxxxx) = 530ns / 530 ns

t_f/t_r(typ. C_L=1 nF)

= 60 ns / 26 ns

•

Separate control circuits for all six drivers

Detection of over current and under voltage supply

Externally programmable delay for fault clear after

over current detection

Package

DSO-28

•

'Shut down' of all switches during error conditions

CMOS and LSTTL compatible input (negative logic)

Signal interlocking of every phase to prevent cross-

conduction

TSSOP-28

Potential applications

•

Home appliance, refrigeration compressors, air-conditioning

Fans, pumps

Motor drives, general purpose inverters

Power tools, light electric vehicles

Product validation

Qualified for industrial applications according to the relevant tests of JEDEC47/20/22.

Description

The device 6ED family – 2nd generation is a full bridge driver to control power devices like MOS-transistors or

IGBTs in 3-phase systems with a maximum blocking voltage of +600 V. Based on the used SOI-technology there

is an excellent ruggedness on transient voltages. No parasitic thyristor structures are present in the device.

Hence, no parasitic latch-up may occur at all temperatures and voltage conditions.

The six independent drivers are controlled at the low-side using CMOS resp. LSTTL compatible signals, down to

3.3 V logic. The device includes an under-voltage detection unit with hysteresis characteristic and an over-

current detection. The over-current level is adjusted by choosing the resistor value and the threshold level at

pin ITRIP. Both error conditions (under-voltage and over-current) lead to a definite shut down off all six

switches. An error signal is provided at the FAULT open drain output pin. The blocking time after over-current

can be adjusted with an RC-network at pin RCIN. The input RCIN owns an internal current source of 2.8 µA.

Therefore, the resistor RRCIN is optional. The typical output current can be given with 165 mA for pull-up and

375 mA for pull down. Because of system safety reasons a 310 ns interlocking time has been realised. The

function of input EN can optionally be extended with over-temperature detection, using an external NTC-

resistor (see Figure 1). The monolithic integrated bootstrap diode structures between pins VCC and VBx can be

used for power supply of the high side.

6EDL04 family Datasheet

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Please read the Important Notice and Warnings at the end of this document

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Version 2.7

2019-03-21

6EDL04 family

200 V & 600 V three-phase driver with OCP, Enable, Fault and Bootstrap Diode

Ordering information

DC-Bus

VCC

HIN1,2,3

LIN1,2,3

EN

VCC

VB1,2,3

HO1,2,3

HIN1,2,3

LIN1,2,3

EN

To Load

VS1,2,3

5V

FAULT

RCIN

FAULT

LO1,2,3

COM

R_RCIN

C_RCIN

ITRIP

VSS

Signals HIN1,2,3 and LIN1,2,3

according to Table 1

R_Sh

VSS

Figure 1

Typical application diagram

Ordering information

Table 1

Members of 6EDL04 family – 2^ndgeneration

Target

transisto

r

Evaluation board

Sales Name

High side control input

HIN1,2,3 and LIN1,2,3

Typ. UVLO- Bootstrap Package

Thresholds diode

6EDL04I06NT negative logic

6EDL04I06PT positive logic

6EDL04N06PT positive logic

6EDL04N02PR positive logic

IGBT

11.7 V / 9.8 V Yes

DSO-28

EVAL-6EDL04I06PT

MOSFET 9 V / 8.1 V

Yes

TSSOP-28 EVAL-6EDL04N02PR

Table of contents

Features ......................................................................................................................................................... 1

Product summary .......................................................................................................................................... 1

Package.......................................................................................................................................................... 1

Potential applications ................................................................................................................................... 1

Product validation ......................................................................................................................................... 1

Description..................................................................................................................................................... 1

Ordering information..................................................................................................................................... 2

Table of contents ........................................................................................................................................... 2

1

2

Block diagram ...................................................................................................................................... 4

Lead definitions.................................................................................................................................... 5

3

Functional description ......................................................................................................................... 6

Low Side and High Side Control Pins (Pin 2, 3, 4, 5, 6, 7).......................................................................6

EN (Gate Driver Enable, Pin 10)...............................................................................................................7

/FAULT (Fault Feedback, Pin 8)...............................................................................................................7

3.1

3.2

3.3

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6EDL04 family

200 V & 600 V three-phase driver with OCP, Enable, Fault and Bootstrap Diode

Table of contents

3.4

3.5

3.6

3.7

ITRIP and RCIN (Over-Current Detection Function, Pin 9, 11)...............................................................7

VCC, VSS and COM (Low Side Supply, Pin 1, 12, 13)...............................................................................8

VB1, 2, 3 and VS1, 2, 3 (High Side Supplies, Pin 18, 20, 22, 24, 26, 28)...................................................8

LO1,2,3 and HO1,2,3 (Low and High Side Outputs, Pin 14, 15, 16, 19, 23, 27).......................................8

4

Electrical parameters ........................................................................................................................... 9

Absolute maximum ratings.....................................................................................................................9

Required operation conditions.............................................................................................................10

Operating Range ...................................................................................................................................10

Static logic function table.....................................................................................................................11

Static parameters..................................................................................................................................11

Dynamic parameters.............................................................................................................................14

4.1

4.2

4.3

4.4

4.5

4.6

5

Timing diagrams................................................................................................................................. 15

6

Package information .......................................................................................................................... 18

PG-DSO-28 .............................................................................................................................................18

PG-TSSOP-28 .........................................................................................................................................19

PG-TSSOP-28 (according to PCN 2018-165-A)......................................................................................19

6.1

6.2

6.3

7

8

Qualification information................................................................................................................... 21

Related products................................................................................................................................ 21

Revision history ........................................................................................................................................... 21

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Version 2.7

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6EDL04 family

200 V & 600 V three-phase driver with OCP, Enable, Fault and Bootstrap Diode

1

Block diagram

BOOTSTRAP DIODE-VB1

BIAS NETWORK - VB1

BIAS NETWORK / VDD2

VB1

HO1

VS1

INPUT NOISE

FILTER

HIN1

LIN1

DEADTIME &

SHOOT-THROUGH

PREVENTION

LATCH

Gate-

Drive

HV LEVEL-SHIFTER

+ REVERSE-DIODE

COMPAR

ATOR

z

UV-

DETECT

INPUT NOISE

FILTER

BOOTSTRAP DIODE-VB2

BIAS NETWORK - VB2

VB2

INPUT NOISE

FILTER

HIN2

LIN2

HIN3

LIN3

EN

DEADTIME &

SHOOT-THROUGH

PREVENTION

LATCH

Gate-

Drive

HV LEVEL-SHIFTER

+ REVERSE-DIODE

COMPAR

ATOR

HO2

VS2

UV-

DETECT

INPUT NOISE

FILTER

BOOTSTRAP DIODE-VB3

BIAS NETWORK / VB3

INPUT NOISE

FILTER

VB3

HO3

VS3

DEADTIME &

SHOOT-THROUGH

PREVENTION

LATCH

Gate-

Drive

HV LEVEL-SHIFTER

+ REVERSE-DIODE

COMPAR

ATOR

UV-

DETECT

INPUT NOISE

FILTER

>1

INPUT NOISE

FILTER

VCC

LO1

UV-

DETECT

VSS / COM

LEVEL-

Gate-

Drive

DELAY

SHIFTER

INPUT NOISE

FILTER

ITRIP

VSS / COM

LEVEL-

SHIFTER

Gate-

Drive

DELAY

LO2

S

Q

VDD2

SET

DOMINANT

LATCH

R

IRCIN

VSS / COM

LEVEL-

SHIFTER

Gate-

Drive

LO3

RCIN

COM

FAULT

VSS

>1

Figure 2

Functional block diagram for 6EDL04I06NT

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6EDL04 family

200 V & 600 V three-phase driver with OCP, Enable, Fault and Bootstrap Diode

BOOTSTRAP DIODE-VB1

BIAS NETWORK - VB1

BIAS NETWORK / VDD2

VB1

HO1

VS1

INPUT NOISE

FILTER

HIN1

LIN1

DEADTIME &

SHOOT-THROUGH

PREVENTION

LATCH

Gate-

Drive

HV LEVEL-SHIFTER

+ REVERSE-DIODE

COMPAR

ATOR

z

UV-

DETECT

INPUT NOISE

FILTER

BOOTSTRAP DIODE-VB2

BIAS NETWORK - VB2

VB2

INPUT NOISE

FILTER

HIN2

LIN2

HIN3

LIN3

EN

DEADTIME &

SHOOT-THROUGH

PREVENTION

LATCH

Gate-

Drive

HV LEVEL-SHIFTER

+ REVERSE-DIODE

COMPAR

ATOR

HO2

VS2

UV-

DETECT

INPUT NOISE

FILTER

BOOTSTRAP DIODE-VB3

BIAS NETWORK / VB3

INPUT NOISE

FILTER

VB3

HO3

VS3

DEADTIME &

SHOOT-THROUGH

PREVENTION

LATCH

Gate-

Drive

HV LEVEL-SHIFTER

+ REVERSE-DIODE

COMPAR

ATOR

UV-

DETECT

INPUT NOISE

FILTER

>1

INPUT NOISE

FILTER

VCC

LO1

UV-

DETECT

VSS / COM

LEVEL-

Gate-

Drive

DELAY

SHIFTER

INPUT NOISE

FILTER

ITRIP

VSS / COM

LEVEL-

SHIFTER

Gate-

Drive

DELAY

LO2

S

Q

VDD2

IRCIN

SET

DOMINANT

LATCH

R

VSS / COM

LEVEL-

SHIFTER

Gate-

Drive

LO3

RCIN

COM

FAULT

VSS

>1

Figure 3

Functional block diagram for 6EDL04I06PT, and 6EDL04N06PT / 6EDL04N02PR

2

Lead definitions

Table 2

6EDL04 family lead definitions

Pin no.

1

Name

VCC

Function

Low side power supply

2,3,4

5,6,7

8

HIN1,2,3

LIN1,2,3

/FAULT

ITRIP

EN

High side logic input (positive or negative logic according to Table 1)

Low side logic input (positive or negative logic according to Table 1)

Indicates over-current and under-voltage (negative logic, open-drain output)

Analog input for over-current shut down, activates FAULT and RCIN to VSS

Enable I/O functionality (positive logic)

9

10

11

RCIN

External RC-network to define FAULT clear delay after FAULT-Signal (T_FLTCLR

)

12

VSS

Logic ground

13

COM

Low side gate driver reference

28,24,20 VB1,2,3

27,23,19 HO1,2,3

26,22,18 VS1,2,3

16,15,14 LO1,2,3

High side positive power supply

High side gate driver output

High side negative power supply

Low side gate driver output

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200 V & 600 V three-phase driver with OCP, Enable, Fault and Bootstrap Diode

Pin no.

21,25

Name

nc

Function

Not connected

1

2

3

4

5

6

7

8

9

VCC

VB1 28

HO1 27

VS1 26

HIN1

HIN2

HIN3

LIN1

nc

25

VB2 24

HO2 23

VS2 22

LIN2

LIN3

nc

FAULT

ITRIP

21

VB3 20

HO3 19

VS3 18

10 EN

11 RCIN

12 VSS

13 COM

14 LO3

17

nc

LO1 16

LO2 15

Figure 4

3

Pin Configuration of 6ED family (signals HIN1,2,3 and LIN1,2,3 according to Table 1)

Functional description

3.1

Low Side and High Side Control Pins (Pin 2, 3, 4, 5, 6, 7)

The Schmitt trigger input threshold of them is such to guarantee LSTTL and CMOS compatibility down to 3.3 V

controller outputs. Input Schmitt trigger and noise filter provide beneficial noise rejection to short input pulses

according to Figure 5 and Figure 6.

Vcc

Schmitt-Trigger

INPUT NOISE

FILTER

INPUT NOISE

FILTER

HINx

LINx

HINx

LINx

U_Z=10.5V

SWITCH LEVEL

V_IH; V_IL

SWITCH LEVEL

V_IH; V_IL

Figure 5

Input pin structure for negative logic (left) and positive logic (right)

An internal pull-up of about 75 kΩ (negative logic) pre-biases the input during supply start-up and a ESD zener

clamp is provided for pin protection purposes. The zener diodes are therefore designed for single pulse stress

only and not for continuous voltage stress over 10V. For versions with positive, a 5 kΩ pull-down resistor is

used for this function.

a)

b)

a)

b)

t_FILIN

HIN

LIN

HIN

LIN

HIN

LIN

HIN

on

off

on

off

on

off

on

off

on

off

on

off

high

HO

LO

HO

LO

HO

LO

HO

low

Figure 6

Input filter timing diagram for negative logic (left) and positive logic (right)

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200 V & 600 V three-phase driver with OCP, Enable, Fault and Bootstrap Diode

It is anyway recommended for proper work of the driver not to provide input pulse-width lower than 1 µs.

The 6ED family – 2^ndgeneration provides additionally a shoot through prevention capability which avoids the

simultaneous on-state of two channels of the same leg (i.e. HO1 and LO1, HO2 and LO2, HO3 and LO3). When

two inputs of a same leg are activated, only one leg output is activated, so that the leg is kept steadily in a safe

state.

A minimum dead time insertion of typ. 310 ns is also provided, in order to reduce cross-conduction of the

external power switches.

3.2

EN (Gate Driver Enable, Pin 10)

The signal applied to pin EN controls directly the output stages. All outputs are set to LOW, if EN is at LOW logic

level. The internal structure of the pin is given in Figure 7. The switching levels of the Schmitt-Trigger are here

V_EN,TH+= 2.1 V and V_EN,TH-= 1.3 V. The typical propagation delay time is t_EN= 780 ns. There is an internal pull down

resistor (75 kΩ), which keeps the gate outputs off in case of broken PCB connection.

I_EN+, I_EN-

EN

INPUT NOISE

FILTER

V_EN,TH+

V_EN,TH-

,

V_Z= 10.5 V

6ED family – 2nd generation

Figure 7

EN pin structures

3.3

/FAULT (Fault Feedback, Pin 8)

/Fault pin is an active low open-drain output indicating the status of the gate driver (see Figure 8). The

pin is active (i.e. forces LOW voltage level) when one of the following conditions occur:

•

Under-voltage condition of VCC supply: In this case the fault condition is released as soon as the supply

voltage condition returns in the normal operation range (please refer to VCC pin description for more

details).

Over-current detection (ITRIP): The fault condition is latched until current trip condition is finished and

RCIN input is released (please refer to ITRIP pin).

6ED family –

2nd generation

V_DD

V_CC

R_ON,FLT

from ITRIP-Latch

from uv-detection

FAULT

>1

Figure 8

/FAULT pin structures

3.4

ITRIP and RCIN (Over-Current Detection Function, Pin 9, 11)

The 6ED family – 2^ndgeneration provides an over-current detection function by connecting the ITRIP input with

the motor current feedback. The ITRIP comparator threshold (typ 0.44 V) is referenced to VSS ground. An input

noise filter (typ. t_ITRIPMIN= 230 ns) prevents the driver to detect false over-current events.

Over-current detection generates a hard shut down of all outputs of the gate driver and provides a latched fault

feedback at /FAULT pin. RCIN input/output pin is used to determine the reset time of the fault condition. As

soon as ITRIP threshold is exceeded the external capacitor connected to RCIN is fully discharged. The capacitor

is then recharged by the RCIN current generator when the over-current condition is finished. As soon as RCIN

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200 V & 600 V three-phase driver with OCP, Enable, Fault and Bootstrap Diode

voltage exceeds the rising threshold of typ V_RCIN,TH= 5.2 V, the fault condition releases and the driver returns

operational following the ontrol input pins according to Section 3.1.

3.5

VCC, VSS and COM (Low Side Supply, Pin 1, 12, 13)

VCC is the low side supply and it provides power both to input logic and to low side output power stage. Input

logic is referenced to VSS ground as well as the under-voltage detection circuit. Output power stage is

referenced to COM ground. COM ground is floating respect to VSS ground with a maximum range of operation

of +/-5.7 V. A back-to-back zener structure protects grounds from noise spikes.

The under-voltage circuit enables the device to operate at power on when a typical supply voltage higher than

V_CCUV+is present.

The IC shuts down all the gate drivers power outputs, when the VCC supply voltage is below V_CCUV-= 9.8 V

respectively 8.1 V. This prevents the external power switches from critically low gate voltage levels during on-

state and therefore from excessive power dissipation.

3.6

VB1, 2, 3 and VS1, 2, 3 (High Side Supplies, Pin 18, 20, 22, 24, 26, 28)

VB to VS is the high side supply voltage. The high side circuit can float with respect to VSS following the external

high side power device emitter/source voltage. Due to the low power consumption, the floating driver stage

can be supplied by bootstrap topology connected to VCC.

The device operating area as a function of the supply voltage is given in Figure 15 and Figure 16.

3.7

LO1,2,3 and HO1,2,3 (Low and High Side Outputs, Pin 14, 15, 16, 19, 23,

27)

Low side and high side power outputs are specifically designed for pulse operation such as gate drive of IGBT

and MOSFET devices. Low side outputs (i.e. LO1,2,3) are state triggered by the respective inputs, while high side

outputs (i.e. HO1,2,3) are edge triggered by the respective inputs. In particular, after an under voltage condition

of the VBS supply, a new turn-on signal (edge) is necessary to activate the respective high side output, while

after a under voltage condition of the VCC supply, the low side outputs switch to the state of their respective

inputs.

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200 V & 600 V three-phase driver with OCP, Enable, Fault and Bootstrap Diode

4

Electrical parameters

4.1

Absolute maximum ratings

All voltages are absolute voltages referenced to V_SS-potential unless otherwise specified. All parameters are

valid for T_a=25 °C.

Table 3

Absolute maximum ratings

Parameter

High side offset voltage¹

Symbol Min.

Max.

600

180

Unit

V

V_CC-V_BS-6

DSO28

TSSOP28

V_S

High side offset voltage (t_p<500ns)¹

High side offset voltage¹

V_CC-V_BS– 50

V_CC– 6

–

620

200

DSO28

TSSOP28

V_B

High side offset voltage (t_p<500ns)¹

V_CC– 50

-1

–

20

High side floating supply voltage (V_Bvs. V_S) (internally clamped) V_BS

-0.5

-1

V_B+ 0.5

20

High side output voltage (V_HOvs. V_S)

V_HO

V_CC

Low side supply voltage (internally clamped)

-0.5

-5.7

-0.5

-1

25

Low side supply voltage (V_CCvs. V_COM

)

V_CCOM

V_COM

V_LO

5.7

Gate driver ground

V_CCOM+ 0.5

10

Low side output voltage (V_LOvs. V_COM

Input voltage LIN,HIN,EN,ITRIP

FAULT output voltage

)

V_IN

-0.5

V_CC+ 0.5

V_FLT

V_RCIN

P_D

RCIN output voltage

Power dissipation (to package)²

-0.5

V_CC+ 0.5

DSO28

TSSOP28

–

1.3

0.6

W

Thermal resistance

(junction to ambient, see section 6)

DSO28

TSSOP28

R_th(j-a)

–

75

165

K/W

–

125

Junction temperature

Storage temperature

offset voltage slew rate³

T_J

°C

T_S

- 40

150

50

dV_S/dt

V/ns

Note: The minimum value for ESD immunity in PG-DSO-28 is 2.0 kV (Human Body Model). ESD immunity inside pins

connected to the low side (VCC, HINx, LINx, FAULT, EN, RCIN, ITRIP, VSS, COM, LOx) and pins connected inside each high

side itself (VBx, HOx, VSx) is guaranteed up to 2.0 kV (Human Body Model). See section 7.

The minimum value for ESD immunity in PG-TSSOP-28 is 1.0 kV (Human Body Model). ESD immunity inside pins connected

to the low side (VCC, HINx, LINx, FAULT, EN, RCIN, ITRIP, VSS, COM, LOx) and pins connected inside each high side itself

(VBx, HOx, VSx) is guaranteed up to 1.5 kV (Human Body Model). See section 7.

¹In case V_CC> V_Bthere is an additional power dissipation in the internal bootstrap diode between pins VCC and VBx. Insensitivity of

bridge output to negative transient voltage up to –50 V is not subject to production test – verified by design / characterization.

²Consistent power dissipation of all outputs. All parameters inside operating range.

³Not subject of production test, verified by characterisation

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200 V & 600 V three-phase driver with OCP, Enable, Fault and Bootstrap Diode

4.2

Required operation conditions

All voltages are absolute voltages referenced to V_SS-potential unless otherwise specified. All parameters are

valid for T_a=25 °C.

Table 4

Required Operation Conditions

Parameter

Symbol Min. Max. Unit

High side offset voltage¹

DSO28

TSSOP28

V_B

V

7

620

200

Low side supply voltage (V_CCvs. V_COM

)

DSO28

TSSOP28

10

25

V_CCOM

4.3

Operating Range

All voltages are absolute voltages referenced to V_SS-potential unless otherwise specified. All parameters are

valid for T_a=25 °C.

Table 5

Operating range

Parameter

Symbol Min. Max. Unit

High side floating supply offset voltage

V_S

V_CC

V_BS-1 500

-

V

High side floating supply offset voltage (V_Bvs. V_CC, statically)

V_BCC

V_BS

-1.0

13

500

High side floating supply voltage (V_Bvs. V_S, Note 1)

6EDL04I06NT

17.5

V

6EDL04I06PT

6EDL04N06PT

6EDL04N02PR

10

17.5

High side output voltage (V_HOvs. V_S)

V_HO

V_LO

V_CC

0

V_BS

Low side output voltage (V_LOvs. V_COM

)

0

V_CC

Low side supply voltage

6EDL04I06NT

6EDL04I06PT

13

17.5

6EDL04N06PT

6EDL04N02PR

10

17.5

Low side ground voltage

Logic input voltages LIN,HIN,EN,ITRIP²

V_COM

V_IN

-2.5

0

2.5

5

FAULT output voltage

V_FLT

V_RCIN

t_IN

0

V_CC

–

RCIN input voltage

Pulse width for ON or OFF³

0

1

µs

°C

Ambient temperature

T_a

-40

105

¹Logic operational for V_B(V_Bvs. V_S) > 7.0 V

²All input pins (HINx, LINx) and EN, ITRIP pin are internally clamped (see abs. maximum ratings)

³In case of input pulse width at LINx and HINx below 1µ the input pulse may not be transmitted properly

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200 V & 600 V three-phase driver with OCP, Enable, Fault and Bootstrap Diode

4.4

Static logic function table

VCC

<V_CCUV–

15 V

VBS

X

RCIN

ITRIP

ENABLE

X

FAULT

LO1,2,3

HO1,2,3

X

0

<V_BSUV–

15 V

X

0

3.3 V

0

High imp

0

LIN1,2,3*

0

15 V

0

<3.2 V ↓

X

15 V

> V_IT,TH+

0

LIN1,2,3*

0

HIN1,2,3*

0

15 V

> V_RCIN,TH

0

High imp

15 V

* according to Table 1

4.5

Static parameters

V_CC= V_BS= 15V unless otherwise specified. All parameters are valid for T_a=25 °C.

Table 6

Static parameters

Parameter

Symbol

Values

Typ.

2.1

Unit Test condition

V

Min.

1.7

0.7

1.9

1.1

380

45

-

Max.

2.4

High level input voltage

V_IH

Low level input voltage

V_IL

0.9

1.1

EN positive going threshold

EN negative going threshold

ITRIP positive going threshold

ITRIP input hysteresis

V_EN,TH+

V_EN,TH-

V_IT,TH+

V_IT,HYS

V_RCIN,TH

V_RCIN,HYS

V_IN,CLMAP

2.1

2.3

1.3

1.5

445

70

510

mV

RCIN positive going threshold

RCIN input hysteresis

5.2

6.4

-

V

-

2.0

Input clamp voltage

9

10.3

12

I_IN= 4mA

(HIN and LIN acc. Table 1, EN, ITRIP)

Input clamp voltage at high impedance

(/HIN, /LIN negative logic only)

V_IN,FLOAT

V_OH

-

5.3

5.8

controller output

pin floating

High level output voltage

LO1,2,3

HO1,2,3

LO1,2,3

-

V_CC-0.7 V_CC-1.4

V_B-0.7 V_B-1.4

I_O= 20mA

Low level output voltage

V_OL

-

V_COM

+

V_COM

+

I_O= -20mA

0.2

0.6

HO1,2,3

6EDL04I06NT

6EDL04I06PT

6EDL04N06PT

6EDL04N02PR

-

V_S+ 0.2 V_S+ 0.6

V_CCand V_BSsupply

undervoltage positive

going threshold

V_CCUV+

V_BSUV+

11

11.7

12.5

8.3

9

9.8

V_CCand V_BSsupply

undervoltage negative

going threshold

6EDL04I06NT

6EDL04I06PT

V_CCUV–

V_BSUV–

9.5

7.5

9.8

8.1

10.8

8.8

V

6EDL04N06PT

6EDL04N02PR

6EDL04 family Datasheet

www.infineon.com/gdThreePhase

11 of 22

Version 2.7

2019-03-21

6EDL04 family

200 V & 600 V three-phase driver with OCP, Enable, Fault and Bootstrap Diode

Table 6

Static parameters

Parameter

Symbol

Values

Typ.

Unit Test condition

V

Min.

1.2

Max.

-

V_CCand V_BSsupply

undervoltage lockout

hysteresis

6EDL04I06NT

6EDL04I06PT

V_CCUVH

V_BSUVH

1.9

6EDL04N06PT

6EDL04N02PR

0.5

0.9

-

High side leakage current betw. VS and VSS

I_LVS+

1

12.5

µA

V_S= 600V

1

I_LVS+

-

10

-

T_J=125°C,V_S=600V

1

High side leakage current between VSx and

VSy (x=1,2,3 and y=1,2,3)

I_LVS–

T_J= 125°C

V_Sx- V_Sy= 600V

Quiescent current V_BSsupply (VB only)

I_QBS1

I_QBS2

I_QCC1

-

210

1.1

400

1.8

HO=low

HO=high

Quiescent current V_CC

supply (VCC only)

6EDL04I06NT

mA V_LIN=float. (all)

V_VSx=50V (only

6EDL04I06PT

6EDL04N06PT

6EDL04N02PR

0.75

1.5

bootstrap types)

Quiescent current V_CC

supply (VCC only)

6EDL04I06NT

I_QCC2

-

1.3

2

V_LIN=0, V_HIN=3.3 V

V_VSx=50V

6EDL04I06PT

6EDL04N06PT

6EDL04N02PR

0.75

1.5

V_LIN=3.3 V, V_HIN=0

V_VSx=50V

Quiescent current V_CC

supply (VCC only)

6EDL04I06NT

I_QCC3

-

1.3

2

V_LIN=3.3 V, V_HIN=0

V_VSx=50V

6EDL04I06PT

6EDL04N06PT

6EDL04N02PR

0.75

1.5

V_LIN=0, V_HIN=3.3 V

V_VSx=50V

Input bias current

6EDL04I06NT

I_LIN+

I_LIN-

I_HIN+

I_HIN-

-

70

100

µA

V_LIN=3.3 V

6EDL04I06PT

6EDL04N06PT

6EDL04N02PR

400

700

1100

6EDL04I06NT

-

110

0

200

V_LIN=0

6EDL04I06PT

6EDL04N06PT

6EDL04N02PR

6EDL04I06NT

-

70

100

V_HIN=3.3 V

V_HIN=0

6EDL04I06PT

6EDL04N06PT

6EDL04N02PR

400

700

1100

6EDL04I06NT

-

110

0

200

6EDL04I06PT

6EDL04N06PT

6EDL04N02PR

¹Not subject of production test, verified by characterisation

6EDL04 family Datasheet

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12 of 22

Version 2.7

2019-03-21

6EDL04 family

200 V & 600 V three-phase driver with OCP, Enable, Fault and Bootstrap Diode

Table 6

Static parameters

Parameter

Symbol

Values

Typ.

45

Unit Test condition

Min.

-

Max.

120

V_ITRIP=3.3 V

µA

Input bias current (ITRIP=high)

Input bias current (EN=high)

I_ITRIP+

I_EN+

45

120

V_ENABLE=3.3 V

V_RCIN= 2 V

Input bias current RCIN (internal current

source)

I_RCIN

2.8

Mean output current for load capacity charging I_O+

in range from 3 V (20%) to 6 V (40%)

120

250

165

-

mA C_L=10 nF

1

Peak output current turn on (single pulse)

I_Opk+

240

375

R_L= 0 , t_p<10 µs

C_L=10 nF

Mean output current for load capacity

discharging in range from 12 V (80%) to 9 V

(60%)

I_O-

1

Peak output current turn off (single pulse)

I_Opk-

420

1.0

R_L= 0 , t_p<10 µs

Bootstrap diode forward voltage between VCC V_F,BSD

and VB

-

1.3

75

V

I_F=0.5 mA

mA V_F=4 V

Ω

V_F1=4 V, V_F2=5 V

Bootstrap diode forward current between VCC I_F,BSD

and VB

27

51

Bootstrap diode resistance

R_BSD

24

-

40

60

RCIN low on resistance of the pull down

transistor

R_on,RCIN

100

V_RCIN=0.5 V

FAULT low on resistance of the pull down

transistor

R_on,FLT

-

45

100

V_FAULT=0.5 V

¹Not subject of production test, verified by characterisation

6EDL04 family Datasheet

www.infineon.com/gdThreePhase

13 of 22

Version 2.7

2019-03-21

6EDL04 family

200 V & 600 V three-phase driver with OCP, Enable, Fault and Bootstrap Diode

4.6

Dynamic parameters

V_CC= V_BS= 15 V, V_S= V_SS= V_COMunless otherwise specified. All parameters are valid for T_a=25 °C.

Table 7

Dynamic parameters

Parameter

Symbol

Values

Typ.

530

Unit Test condition

Min.

400

360

Max.

800

V_LIN/HIN= 0 or 3.3 V

Turn-on propagation delay

t_on

t_off

ns

Turn-off propagation

delay

6EDL04I06NT

6EDL04I06PT

490

760

6EDL04N06PT

6EDL04N02PR

400

530

800

Turn-on rise time

Turn-off fall time

t_r

-

60

100

45

V_LIN/HIN= 0 or 3.3 V

C_L= 1 nF

t_f

-

26

Shutdown propagation delay ENABLE

Shutdown propagation delay ITRIP

Input filter time ITRIP

t_EN

-

780

670

230

420

300

1100

1000

380

700

-

V_EN=0

t_ITRIP

t_ITRIPMIN

t_FLT

400

155

-

V_ITRIP=1 V

Propagation delay ITRIP to FAULT

Input filter time at LIN/HIN for turn on and t_FILIN

off

120

V_LIN/HIN= 0 & 3.3 V

Input filter time EN

t_FILEN

300

1.0

600

1.9

-

Fault clear time at RCIN after ITRIP-fault, t_FLTCLR

(C_RCin=1nF)

3.0

ms V_LIN/HIN= 0 & 3.3 V

V_ITRIP= 0

Dead time

DT

150

-

310

20

-

ns

V_LIN/HIN= 0 & 3.3 V

Matching delay ON, max(ton)-min(ton), ton MT_ON

are applicable to all 6 driver outputs

100

external dead time

> 500 ns

Matching delay OFF, max(toff)-min(toff),

toff are applicable to all 6 driver outputs

MT_OFF

-

40

10

100

external dead time

>500 ns

PW_in> 1 µs

Output pulse width

matching. Pw_in-PW_out

6EDL04I06NT

6EDL04I06PT

PM

6EDL04N06PT

6EDL04N02PR

6EDL04 family Datasheet

www.infineon.com/gdThreePhase

14 of 22

Version 2.7

2019-03-21

6EDL04 family

200 V & 600 V three-phase driver with OCP, Enable, Fault and Bootstrap Diode

5

Timing diagrams

t_FILIN

t_IN

t_FILIN

t_IN

HIN/LIN

t_IN< t_FILIN

high

HO/LO

low

HO/LO

HIN/LIN

HO/LO

t_IN

HIN/LIN

t_IN

t_IN> t_FILIN

HO/LO

Figure 9

Timing of short pulse suppression (6EDL04I06NT)

t_FILIN

t_IN

t_FILIN

t_IN

HIN/LIN

t_IN< t_FILIN

high

HO/LO

HIN/LIN

HO/LO

low

t_IN

HIN/LIN

t_IN

t_IN> t_FILIN

HO/LO

Figure 10 Timing of short pulse suppression (6EDL04I06PT, 6EDL04N06PT, 6EDL04N02PR)

LIN1,2,3

1.65V

HIN1,2,3

HO1,2,3

12V

3V

DT

3V

12 V

LO1,2,3

Figure 11 Timing of of internal deadtime (input logic according to Table 1)

6EDL04 family Datasheet

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15 of 22

Version 2.7

2019-03-21

6EDL04 family

200 V & 600 V three-phase driver with OCP, Enable, Fault and Bootstrap Diode

EN

t_EN

HO1,2,3

LO1,2,3

3V

Figure 12 Enable delay time definition

PW_IN

LIN1,2,3

HIN1,2,3

1.65V

t_off

t_on

t_r

t_f

12V

HO1,2,3

LO1,2,3

3V

PW_OUT

Figure 13 Input to output propagation delay times and switching times definition (6EDL04I06NT)

PW_IN

LIN1,2,3

1.65V

HIN1,2,3

t_off

t_on

t_r

t_f

12V

HO1,2,3

LO1,2,3

3V

PW_OUT

Figure 14 Input to output propagation delay times and switching times definition (6EDL04I06PT,

6EDL04N06PT, 6EDL04N02PR)

V_CCMAX, V_BSMAX

20

V

17.5

v_CC

v_BS

13

V_CCUV+, V_BSUV+11.7

V_CCUV-, V_BSUV-9.8

t

IC STATE

ON

Recommended

Area

ON

Recommended

Area

Forbidden

Area

OFF

ON

OFF

Figure 15 Operating areas (6EDL04I06NT, 6EDL04I06PT)

6EDL04 family Datasheet

www.infineon.com/gdThreePhase

16 of 22

Version 2.7

2019-03-21

6EDL04 family

200 V & 600 V three-phase driver with OCP, Enable, Fault and Bootstrap Diode

V_CCMAX, V_BSMAX

20

V

17.5

v_CC

v_BS

10.0

V_CCUV+, V_BSUV+9.0

V_CCUV-, V_BSUV-8.1

t

IC STATE

OFF

ON

Recommended

Area

ON

Recommended

Area

Forbidden

Area

ON

OFF

Figure 16 Operating Areas (6EDL04N06PT, 6EDL04N02PR)

V_RCIN,TH

RCIN

ITRIP

0.1V

FAULT

1V

0.5V

t_FLT

t_FLTCLR

Any

output

3V

t_ITRIP

Figure 17 ITRIP-Timing

t_ITRIPMIN

t_IN

t_ITRIPMIN

t_IN

ITRIP

high

t_FLTCLR

/FAULT

Figure 18 ITRIP Input Timing

6EDL04 family Datasheet

www.infineon.com/gdThreePhase

17 of 22

Version 2.7

2019-03-21

6EDL04 family

200 V & 600 V three-phase driver with OCP, Enable, Fault and Bootstrap Diode

6

Package information

6.1

PG-DSO-28

Figure 19 Package drawing

Dimensions

Material

80.0 × 80.0 × 1.5 mm³ λ_therm

[W/m⋅K]

FR4

0.3

388

Metal (Copper) 70µm

Figure 20 PCB reference layout

6EDL04 family Datasheet

www.infineon.com/gdThreePhase

18 of 22

Version 2.7

2019-03-21

6EDL04 family

200 V & 600 V three-phase driver with OCP, Enable, Fault and Bootstrap Diode

6.2

PG-TSSOP-28

Footprint for Reflow soldering

e = 0.65

A = 6.10

L = 1.30

B = 0.40

Figure 21 Package drawing

6.3

PG-TSSOP-28 (according to PCN 2018-165-A)

Figure 22 Package drawing

6EDL04 family Datasheet

19 of 22

Version 2.7

2019-03-21

www.infineon.com/gdThreePhase

6EDL04 family

200 V & 600 V three-phase driver with OCP, Enable, Fault and Bootstrap Diode

Figure 23 PCB reference layout (according to JEDEC 1s0P)

left: Reference layout

right: detail of footprint

Table 8

Data of reference layout

Dimensions

Material

Metal (Copper)

76.2 × 114.3 × 1.5 mm³

FR4 (λ_therm= 0.3 W/mK)

70µm (λ_therm= 388 W/mK)

6EDL04 family Datasheet

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20 of 22

Version 2.7

2019-03-21

6EDL04 family

200 V & 600 V three-phase driver with OCP, Enable, Fault and Bootstrap Diode

7

Qualification information¹

Table 9

Qualification information

Industrial²

Note: This family of ICs has passed JEDEC’s Industrial

qualification. Consumer qualification level is granted by

extension of the higher Industrial level.

Qualification level

MSL3³, 260°C

Moisture sensitivity level

TSSOP-28/DSO-28

(per IPC/JEDEC J-STD-020)

Class C3 (> 1.0 kV)

(per JESD22-C101)

6EDL04x06xT

6EDL04N02PR

Yes

Charged device model

Human body model

ESD

Class 2 (per JEDEC standard JESD22-A114)

Class 1C (per JEDEC standard JESD22-A114)

RoHS compliant

8


型号：	6EDL04
厂家：	Infineon
描述：	200 V and 600 V three-phase gate driver with Over Current Protection (OCP), Enable (EN), Fault and Integrated Bootstrap Diode (BSD)
文件：	总22页 (文件大小：853K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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