AFL1203R3SZ/CHPBF [INFINEON]

DC-DC Regulated Power Supply Module, 1 Output, 66W, Hybrid, 0.380 INCH, LOW PROFILE, SEAM WELDED PACKAGE-12;
AFL1203R3SZ/CHPBF
型号: AFL1203R3SZ/CHPBF
厂家: Infineon    Infineon
描述:

DC-DC Regulated Power Supply Module, 1 Output, 66W, Hybrid, 0.380 INCH, LOW PROFILE, SEAM WELDED PACKAGE-12

文件: 总9页 (文件大小:85K)
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PD - 94448A  
AFL1203R3S  
120V Input, 3.3V Output  
ADVANCED ANALOG  
HIGH RELIABILITY  
HYBRID DC/DC CONVERTER  
Description  
The AFL Series of DC/DC converters feature high power  
density with no derating over the full military tempera-  
ture range. This series is offered as part of a complete  
family of converters providing single and dual output  
voltages and operating from nominal +28 or +270 volt  
inputs with output power ranging from 66 to 120 watts.  
For applications requiring higher output power, multiple  
converters can be operated in parallel. The internal cur-  
rent sharing circuits assure equal current distribution  
among the paralleled converters. This series incorpo-  
rates Advanced Analog’s proprietary magnetic pulse  
feedback technology providing optimum dynamic line  
and load regulation response. This feedback system  
samples the output voltage at the pulse width modulator  
fixed clock frequency, nominally 550 KHz. Multiple con-  
verters can be synchronized to a system clock in the  
500 KHz to 700 KHz range or to the synchronization  
output of one converter. Undervoltage lockout, primary  
and secondary referenced inhibit, soft-start and load  
fault protection are provided on all models.  
AFL  
Features  
n 80 To 160 Volt Input Range  
n 3.3 Volt Output  
n High Power Density - 50 W / in  
n 66 Watt Output Power  
n Parallel Operation with Stress and Current  
Sharing  
n Low Profile (0.380") Seam Welded Package  
n Ceramic Feedthru Copper Core Pins  
n High Efficiency - to 74%  
3
n Full Military Temperature Range  
n Continuous Short Circuit and Overload  
Protection  
n Remote Sensing Terminals  
n Primary and Secondary Referenced  
Inhibit Functions  
n Line Rejection > 50 dB - DC to 50KHz  
n External Synchronization Port  
n Fault Tolerant Design  
These converters are hermetically packaged in two en-  
closure variations, utilizing copper core pins to mini-  
mize resistive DC losses. Three lead styles are avail-  
able, each fabricated with Advanced Analog’s rugged  
ceramic lead-to-package seal assuring long term  
hermeticity in the most harsh environments.  
n Dual Output Versions Available  
n Standard Military Drawings Available  
Manufactured in a facility fully qualified to MIL-PRF-  
38534, these converters are available in four screening  
grades to satisfy a wide range of requirements. The CH  
grade is fully compliant to the requirements of MIL-PRF-  
38534 for class H. The HB grade is fully processed and  
screened to the class H requirement, but does not have  
material element evaluated to the class H requirement.  
Both grades are tested to meet the complete group “A”  
test specification over the full military temperature range  
without output power deration. Two grades with more  
limited screening are also available for use in less de-  
manding applications. Variations in electrical, me-  
chanical and screening can be accommodated.  
Contact Advanced Analog for special require-  
ments.  
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1
07/10/02  
AFL1203R3S  
Specifications  
ABSOLUTE MAXIMUM RATINGS  
Input Voltage  
-0.5V to 180V  
Soldering Temperature  
Case Temperature  
300°C for 10 seconds  
Operating  
Storage  
-55°C to +125°C  
-65°C to +135°C  
Electrical Performance Characteristics -55°C < TCASE < +125°C, 80V< VIN < 160V unless otherwise specified.  
Group A  
Parameter  
INPUT VOLTAGE  
Subgroups  
Test Conditions  
Min  
Nom  
Max  
Unit  
Note 6  
80  
120  
160  
V
V
= 120 Volts, 100% Load  
OUTPUT VOLTAGE  
IN  
1
3.27  
3.23  
3.30  
3.33  
3.37  
V
V
2, 3  
V
= 80, 120, 160 Volts, Note 6  
20  
66  
A
OUTPUT CURRENT  
IN  
OUTPUT POWER  
Note 6  
Note 1  
W
MAXIMUM CAPACITIVE LOAD  
4
10,000  
-0.015  
µfd  
V
= 120 Volts, 100% Load - Note  
+0.015  
%/°C  
OUTPUT VOLTAGE  
TEMPERATURE COEFFICIENT  
IN  
1, 6  
OUTPUT VOLTAGE REGULATION  
1, 2, 3  
1, 2, 3  
No Load, 50% Load, 100% Load  
-10.0  
-35.0  
+10.0  
+35.0  
mV  
mV  
Line  
V
IN  
= 80, 120, 160 Volts  
Load  
V
IN  
= 80, 120, 160 Volts, 100%  
OUTPUT RIPPLE VOLTAGE  
1, 2, 3  
30  
mV  
pp  
Load,  
BW = 10MHz  
V
IN  
= 120 Volts  
INPUT CURRENT  
1
2, 3  
1, 2, 3  
1, 2, 3  
30  
40  
3.0  
5.0  
mA  
mA  
mA  
mA  
No Load  
I
= 0  
OUT  
Inhibit 1  
Inhibit 2  
Pin 4 Shorted to Pin 2  
Pin 12 Shorted to Pin 8  
V
= 120 Volts, 100% Load  
INPUT RIPPLE CURRENT  
IN  
B.W. = 10MHz  
= 90% V  
1, 2, 3  
60  
mA  
pp  
V
Note 5  
CURRENT LIMIT POINT  
OUT  
NOM  
1
2
3
115  
105  
125  
125  
115  
140  
%
%
%
Expressed as a Percentage  
of Full Rated Load  
VIN = 120 Volts  
LOAD FAULT POWER DISSIPATION  
1, 2, 3  
32  
W
Overload or Short Circuit  
EFFICIENCY  
VIN = 120 Volts, 100% Load  
1, 2, 3  
1, 2, 3  
1
72  
74  
%
SWITCHING FREQUENCY  
ISOLATION  
500  
100  
550  
600  
KHz  
MΩ  
Input to Output or Any Pin to Case  
(except Pin 3). Test @ 500VDC  
MIL-HDBK-217F, AIF @ T = 40°C  
C
300  
KHrs  
MTBF  
For Notes to Specifications, refer to page 3  
2
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AFL1203R3S  
Elecrical Performance Characteristics (Continued)  
Group A  
Parameter  
Subgroups  
Test Conditions  
Min  
Nom  
Max  
Unit  
ENABLE INPUTS (Inhibit Function)  
Converter Off  
1, 2, 3  
1, 2, 3  
Logical Low, Pin 4 or Pin 12  
Note 1  
Logical High, Pin 4 and Pin 12 - Note 9  
Note 1  
-0.5  
2.0  
0.8  
100  
50  
V
µA  
V
Sink Current  
Converter On  
Sink Current  
100  
µA  
SYNCHRONIZATION INPUT  
Frequency Range  
1, 2, 3  
1, 2, 3  
1, 2, 3  
500  
2.0  
-0.5  
700  
10  
0.8  
100  
80  
KHz  
V
V
nSec  
%
Pulse Amplitude, Hi  
Pulse Amplitude, Lo  
Pulse Rise Time  
Note 1  
Note 1  
Pulse Duty Cycle  
20  
LOAD TRANSIENT RESPONSE  
Note 2, 8  
4, 5, 6  
4, 5, 6  
Load Step 50%  
Load Step 10%  
100%  
50%  
-450  
-450  
450  
200  
mV  
µSec  
Amplitude  
Recovery  
4, 5, 6  
4, 5, 6  
450  
400  
mV  
µSec  
Amplitude  
Recovery  
LINE TRANSIENT RESPONSE  
Note 1, 2, 3  
V
IN  
Step = 80  
160 Volts  
-500  
500  
500  
mV  
µSec  
Amplitude  
Recovery  
TURN-ON CHARACTERISTICS  
V
= 80, 120, 160 Volts. Note 4  
IN  
Overshoot  
Delay  
4, 5, 6  
4, 5, 6  
Enable 1, 2 on. (Pins 4, 12 high or open)  
250  
120  
mV  
mSec  
50  
50  
75  
60  
Same as Turn On Characteristics.  
LOAD FAULT RECOVERY  
LINE REJECTION  
MIL-STD-461, CS101, 30Hz to 50KHz  
Note 1  
dB  
Notes to Specifications:  
1. Parameters not 100% tested but are guaranteed to the limits specified in the table.  
2. Recovery time is measured from the initiation of the transient to where VOUT has returned to within ±1% of VOUT  
at 50% load.  
3. Line transient transition time 100 µSec.  
4. Turn-on delay is measured with an input voltage rise time of between 100 and 500 volts per millisecond.  
5. Current limit point is that condition of excess load causing output voltage to drop to 90% of nominal.  
6. Parameter verified as part of another test.  
7. All electrical tests are performed with the remote sense leads connected to the output leads at the load.  
8. Load transient transition time 10 µSec.  
9. Enable inputs internally pulled high. Nominal open circuit voltage 4.0VDC.  
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3
AFL1203R3S  
AFL120XXS Circuit Description  
Figure I. AFL Single Output Block Diagram  
INPUT  
FILTER  
DC INPUT  
ENABLE 1  
1
4
OUTPUT  
FILTER  
PRIMARY  
BIAS SUPPLY  
7
+ OUTPUT  
+ SENSE  
10  
CURRENT  
SENSE  
SYNC OUTPUT  
5
SHARE  
11  
12  
SHARE  
CONTROL  
AMPLIFIER  
ERROR  
AMP  
& REF  
SYNC INPUT  
CASE  
6
3
2
FB  
ENABLE 2  
SENSE  
AMPLIFIER  
9
8
- SENSE  
INPUT RETURN  
OUTPUT RETURN  
the sense leads should be connected to their respective  
output terminals at the converter. Figure III. illustrates a  
typical application.  
Circuit Operation and Application Information  
The AFL series of converters employ a forward switched  
mode converter topology. (refer to Figure I.) Operation of  
the device is initiated when a DC voltage whose magnitude  
is within the specified input limits is applied between pins 1  
and 2. If pin 4 is enabled (at a logical 1 or open) the primary  
bias supply will begin generating a regulated housekeeping  
voltage bringing the circuitry on the primary side of the con-  
verter to life. Two power MOSFETs used to chop the DC  
input voltage into a high frequency square wave, apply this  
chopped voltage to the power transformer. As this switch-  
ing is initiated, a voltage is impressed on a second winding  
of the power transformer which is then rectified and applied  
to the primary bias supply. When this occurs, the input  
voltage is shut out and the primary bias voltage becomes  
exclusively internally generated.  
Inhibiting Converter Output  
As an alternative to application and removal of the DC  
voltage to the input, the user can control the converter  
output by providing TTL compatible, positive logic signals  
to either of two enable pins (pin 4 or 12). The distinction  
between these two signal ports is that enable 1 (pin 4) is  
referenced to the input return (pin 2) while enable 2 (pin 12)  
is referenced to the output return (pin 8). Thus, the user  
has access to an inhibit function on either side of the isola-  
tion barrier. Each port is internally pulled “high” so that  
when not used, an open connection on both enable pins  
permits normal converter operation. When their use is  
desired, a logical “low” on either port will shut the con-  
verter down.  
The switched voltage impressed on the secondary output  
transformer winding is rectified and filtered to provide the  
converter output voltage. An error amplifier on the second-  
ary side compares the output voltage to a precision refer-  
ence and generates an error signal proportional to the dif-  
ference. This error signal is magnetically coupled through  
the feedback transformer into the controller section of the  
converter varying the pulse width of the square wave sig-  
nal driving the MOSFETs, narrowing the width if the output  
voltage is too high and widening it if it is too low.  
Figure II. Enable Input Equivalent Circuit  
+5.6V  
100K  
1N4148  
Pin 4 or  
Pin 12  
Disable  
290K  
Remote Sensing  
2N3904  
Connection of the + and - sense leads at a remotely locat-  
led load permits compensation for resistive voltage drop  
between the converter output and the load when they are  
physically separated by a significant distance. This con-  
nection allows regulation to the placard voltage at the point  
of application.When the remote sensing features is not used,  
150K  
Pin 2 or  
Pin 8  
4
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AFL1203R3S  
Internally, these ports differ slightly in their function. In use,  
a low on Enable 1 completely shuts down all circuits in the  
converter while a low on Enable 2 shuts down the second-  
ary side while altering the controller duty cycle to near zero.  
Externally, the use of either port is transparent to the user  
save for minor differences in idle current. (See specification  
table).  
high level of +2.0 volts. The sync output of another con-  
verter which has been designated as the master oscillator  
provides a convenient frequency source for this mode of  
operation. When external synchronization is not required,  
the sync in pin should be left unconnected thereby permit-  
ting the converter to operate at its’ own internally set fre-  
quency.  
Synchronization of Multiple Converters  
The sync output signal is a continuous pulse train set at  
550 ±50 KHz, with a duty cycle of 15 ±5%. This signal is  
referenced to the input return and has been tailored to be  
compatible with the AFL sync input port. Transition times  
are less than 100 ns and the low level output impedance is  
less than 50 ohms. This signal is active when the DC input  
voltage is within the specified operating range and the con-  
verter is not inhibited. This output has adequate drive re-  
serve to synchronize at least five additional converters. A  
typical synchronization connection option is illustrated in  
Figure III.  
When operating multiple converters, system requirements  
often dictate operation of the converters at a common fre-  
quency. To accommodate this requirement, the AFL series  
converters provide both a synchronization input and out-  
put.  
The sync input port permits synchronization of an AFL co-  
nverter to any compatible external frequency source oper-  
ating between 500 and 700 KHz. This input signal should  
be referenced to the input return and have a 10% to 90%  
duty cycle. Compatibility requires transition times less th  
an100 ns, maximum low level of +0.8 volts and a minimum  
Figure III. Preferred Connection for Parallel Operation  
1
12  
Power  
Input  
Enable  
2
Share  
Sense  
Sense  
Return  
Vin  
Rtn  
Case  
Enable  
+
-
AFL  
AFL  
1
Sync Out  
Sync In  
+
Vout  
6
1
7
Optional  
Synchronization  
Connection  
Share Bus  
12  
Enable  
2
Vin  
Rtn  
Share  
Sense  
Sense  
Return  
Case  
+
-
Enable  
1
Sync Out  
Sync In  
to Load  
+
Vout  
7
6
1
12  
Enable  
2
Vin  
Rtn  
Share  
Sense  
Sense  
Return  
Case  
+
-
AFL  
Enable  
1
Sync Out  
Sync In  
+
Vout  
7
6
(Other Converters)  
Parallel Operation-Current and Stress Sharing  
AFL series operating in the parallel mode is that in addition  
to sharing the current, the stress induced by temperature  
will also be shared. Thus if one member of a paralleled set  
is operating at a higher case temperture, the current it pro-  
vides to the load will be reduced as compensation for the  
temperature induced stress on that device.  
Figure III. illustrates the preferred connection scheme for  
operation of a set of AFL converters with outputs operating  
in parallel. Use of this connection permits equal sharing of  
a load current exceeding the capacity of an individual AFL  
among the members of the set. An important feature of the  
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5
AFL1203R3S  
When operating in the shared mode, it is important that for minor variations of either surface. While other available  
symmetry of connection be maintained as an assurance of types of heat conductive materials and compounds may  
optimum load sharing performance. Thus, converter out- provide similar performance, these alternatives are often  
puts should be connected to the load with equal lengths of  
wire of the same gauge and sense leads from each con-  
verter should be connected to a common physical point,  
preferably at the load along with the converter output and  
return leads. All converters in a paralleled set must have  
their share pins connected together. This arrangement is  
diagrammatically illustrated in Figure III. showing the out-  
puts and sense pins connected at a star point which is  
located close as possible to the load.  
less convinient and are frequently messy to use.  
A conservative aid to estimating the total heat sink surface  
area (AHEAT SINK) required to set the maximum case temp-  
erature rise (T) above ambient temperature is given by  
the following expression:  
1.43  
T  
A
HEAT SINK  
3.0  
0.85  
As a consequence of the topology utilized in the current  
sharing circuit, the share pin may be used for other func-  
tions. In applications requiring a single converter, the volt-  
age appearing on the share pin may be used as a “current  
monitor”. The share pin open circuit voltage is nominally  
+1.00v at no load and increases linearly with increasing  
output current to +2.20v at full load. The share pin voltage is  
referenced to the output return pin.  
80P  
where  
T = Case temperature rise above ambient  
1
P = Device dissipation in Watts = POUT  
Eff  
1  
As an example, it is desired to maintain the case tempera-  
ture of an AFL27015S at +85°C in an area where the  
ambient temperature is held at a constant +25°C; then  
Thermal Considerations  
Because of the incorporation of many innovative techno-  
logical concepts, the AFL series of converters is capable of  
providing very high output power from a package of very  
small volume. These magnitudes of power density can only  
be obtained by combining high circuit efficiency with effec-  
tive methods of heat removal from the die junctions. This  
requirement has been effectively addressed inside the de-  
vice; but when operating at maximum loads, a significant  
amount of heat will be generated and this heat must be  
conducted away from the case. To maintain the case tem-  
perature at or below the specified maximum of 125°C, this  
heat must be transferred by conduction to an appropriate  
heat dissipater held in intimate contact with the converter  
base-plate.  
T = 85 - 25 = 60°C  
From the Specification Table, the worst case full load effi-  
ciency for this device is 83%; therefore the power dissipa-  
tion at full load is given by  
1
(
)
P
120  
1
120 0.205 24.6W  
=
=
=
.83  
and the required heat sink area is  
1.43  
60  
3.0 = 71 in2  
Because effectiveness of this heat transfer is dependent  
on the intimacy of the baseplate/heatsink interface, it is st-  
rongly recommended that a high thermal conductivity heat  
transferance medium is inserted between the baseplate a-  
nd heatsink. The material most frequently utilized at the fa-  
ctory during all testing and burn-in processes is sold under  
A
HEAT SINK  
=
8024.60.85  
Thus, a total heat sink surface area (including fins, if any) of  
2
71 in in this example, would limit case rise to 60°C above  
ambient. A flat aluminum plate, 0.25" thick and of approxi-  
1
the trade name of Sil-Pad 400 . This particular pro duct  
2
mate dimension 4" by 9" (36 in per side) would suffice for  
is an insulator but electrically conductive versions are also  
available. Use of these materials assures maximum surfa-  
ce contact with the heat dissipator thereby compensating  
this application in a still air environment. Note that to meet  
the criteria in this example, both sides of the plate require  
unrestricted exposure to the ambient air.  
1
Sil-Pad is a registered Trade Mark of Bergquist, Minneapolis, MN  
6
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AFL1203R3S  
Input Filter  
Finding a resistor value for a particular output voltage, is  
simply a matter of substituting the desired output voltage  
and the nominal device voltage into the equation and solv-  
The AFL120XXS series converters incorporate a LC input  
filter whose elements dominate the input load impedance  
characteristic at turn-on. The input circuit is as shown in  
Figure IV.  
ing for the corresponding resistor value.  
Figure V. Connection for VOUT Adjustment  
Figure IV. Input Filter Circuit  
Enable  
2
16.8uH  
Share  
Sense  
Sense  
Return  
R ADJ  
Pin 1  
+
-
AFL120xxS  
0.78uF  
To Load  
+
Vout  
Pin 2  
Caution: Do not set Radj < 500Ω  
Attempts to adjust the output voltage to a value greater than  
120% of nominal should be avoided because of the poten-  
tial of exceeding internal component stress ratings and sub-  
sequent operation to failure. Under no circumstance should  
the external setting resistor be made less than 500. By  
remaining within this specified range of values, completely  
safe operation fully within normal component derating limits  
is assured.  
Undervoltage Lockout  
A minimum voltage is required at the input of the converter  
to initiate operation. This voltage is set to 74 ± 4 volts. To  
preclude the possibility of noise or other variations at the  
input falsely initiating and halting converter operation, a hys-  
teresis of approximately 7 volts is incorporated in this cir-  
cuit. Thus if the input voltage droops to 67 ± 4 volts, the  
converter will shut down and remain inoperative until the  
input voltage returns to 74 volts.  
Examination of the equation relating output voltage and re-  
sistor value reveals a special benefit of the circuit topology  
utilized for remote sensing of output voltage in the  
AFL120XXS series of converters. It is apparent that as the  
resistance increases, the output voltage approaches the  
nominal set value of the device. In fact the calculated limit-  
ing value of output voltage as the adjusting resistor be-  
OutputVoltage Adjust  
In addition to permitting close voltage regulation of remotely  
located loads, it is possible to utilize the converter sense  
pins to incrementally increase the output voltage over a  
limited range.The adjustments made possible by this method  
are intended as a means to “trim” the output to a voltage  
setting for some particular application, but are not intended  
to create an adjustable output converter. These output volt-  
age setting variations are obtained by connecting an appro-  
priate resistor value between the +sense and -sense pins  
while connecting the -sense pin to the output return pin as  
shown in Figure V. below. The range of adjustment and  
corresponding range of resistance values can be deter-  
comes very large is 25mV above nominal device voltage.  
The consequence is that if the +sense connection is unin-  
tentionally broken, an AFL120XXS has a fail-safe output  
voltage of Vout + 25mV, where the 25mV is independent of  
the nominal output voltage. It can be further demonstrated  
that in the event of both the + and - sense connections  
being broken, the output will be limited toVout + 440mV. This  
440 mV is also essentially constant independent of the nomi-  
nal output voltage. While operation in this condition is not  
damaging to the device, not at all performance parameters  
will be met.  
mined by use of the following equation.  
NOM  
V
adj  
R
= 100•  
OUT  
NOM  
V
- V  
-.025  
Where VNOM = device nominal output voltage, and  
VOUT = desired output voltage  
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7
AFL1203R3S  
AFL1203R3S Case Outlines  
Case X  
Case W  
Pin Variation of Case Y  
3.000  
2.760  
ø
0.128  
0.050  
0.050  
0.250  
0.250  
1.000  
1.000  
Ref  
1.260 1.500  
0.200 Typ  
Non-cum  
Pin  
ø
0.040  
Pin  
0.040  
0.220  
ø
2.500  
0.220  
0.525  
2.800  
2.975 max  
0.238 max  
0.42  
0.380  
Max  
0.380  
Max  
Case Y  
Case Z  
Pin Variation of Case Y  
1.150  
0.300  
ø
0.140  
0.25 typ  
0.050  
0.050  
0.250  
0.250  
1.000  
Ref  
1.500 1.750 2.00  
1.000  
Ref  
0.200 Typ  
Non-cum  
Pin  
ø
0.040  
Pin  
ø
0.040  
0.220  
0.220  
1.750  
2.500  
0.375  
0.36  
2.800  
2.975 max  
0.525  
0.238 max  
0.380  
Max  
0.380  
Max  
Tolerances, unless otherwise specified: .XX  
.XXX  
=
=
±0.010  
±0.005  
BERYLLIAWARNING: These converters are hermetically sealed;however they contain BeO substrates and should not be ground or subjected to any other  
operations including exposure to acids, which may produce Beryllium dust or fumes containing Beryllium  
8
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AFL1203R3S  
Available Screening Levels and ProcessVariations for AFL1203R3S Series.  
MIL-STD-883  
Method  
No  
ES  
HB  
CH  
Requirement  
Temperature Range  
Element Evaluation  
Internal Visual  
Suffix  
Suffix  
Suffix  
Suffix  
-20 to +85°C  
-55°C to +125°C  
-55°C to +125°C  
-55°C to +125°C  
MIL-PRF-38534  
ü
2017  
1010  
2001  
1015  
¬
ü
Cond B  
ü
Temperature Cycle  
Constant Acceleration  
Burn-in  
Cond C  
Cond C  
500g  
Cond A  
Cond A  
48hrs @ 85°C  
48hrs @ 125°C  
25°C  
160hrs @ 125°C  
-55, +25, +125°C  
160hrs @ 125°C  
-55, +25, +125°C  
Final Electrical (Group A)  
MIL-PRF-38534  
& Specification  
25°C  
Seal, Fine & Gross  
External Visual  
1014  
2009  
Cond C  
Cond A, C  
Cond A, C  
Cond A, C  
¬
ü
ü
ü
* per Commercial Standards  
AFL1203R3S Pin Designation  
Part Numbering  
AFL 120 3R3 S X / CH  
Pin No.  
Designation  
Positive Input  
Input Return  
Case  
1
2
M odel  
Screening  
,
E S  
Input Voltage  
C ase Style  
H B, CH  
120 = 120V  
28 = 28V  
W , X, Y, Z  
3
Output Voltage  
Outputs  
S = Single  
D = D ual  
4
Enable 1  
3R3 = 3.3V  
5
Sync Output  
Sync Input  
Positive Output  
Output Return  
Return Sense  
Positive Sense  
Share  
6
7
8
9
10  
11  
12  
Enable 2  
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331  
ADVANCED ANALOG: 2270 Martin Av., Santa Clara, California 95050, Tel: (408) 727-0500  
Visit us at www.irf.com for sales contact information.  
Data and specifications subject to change without notice. 07/02  
www.irf.com  
9

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