ARM2815T/HB [INFINEON]
DC-DC Regulated Power Supply Module, 3 Output, 30W, Hybrid, LOW PROFILE, HERMETIC SEALED, RUGGED PACKAGE-12;
| 型号： | ARM2815T/HB |
| 厂家： | 
Infineon |
| 描述： | DC-DC Regulated Power Supply Module, 3 Output, 30W, Hybrid, LOW PROFILE, HERMETIC SEALED, RUGGED PACKAGE-12 输出元件 |
| 文件： | 总14页 (文件大小：215K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
l
LAMBDA ADVANCED ANALOG INC.
ARM2800T Series
Hybrid - High Reliability
1 Mega-Rad Hardened
DC/DC Converter
DESCRIPTION
FEATURES
The ARM Series of three output DC/DC converters
are intended specifically for use in the high-dose
radiation environments encountered during deep
space planetary missions. The extremely high
level of radiation tolerance inherent in the ARM
design is assured as a result of extensive research,
thorough analysis and testing, careful selection of
components and lot verification testing of finished
hybrids. Many of the best circuit design features
characterizing earlier Lambda Advanced Analog
products have been incorporated into the ARM
topology. Capable of uniformly high performance
through long term exposures in radiation intense
environments, this series sets the standard for
distributed power systems demanding high
performance and reliability.
n
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n
n
n
n
n
n
n
n
n
n
n
n
Total Dose > 1 MRad (Si)
No SEE to LET > 83 MeV·cm2/mg
Derated per MIL-STD-975 & MIL-STD-1547
Output Power Range 3 To 30 Watts
19 To 50 Volt Input Range
Input Undervoltage Lockout
High Electrical Efficiency > 80%
Full Performance from -55°C to +125°C
Continuous Short Circuit Protection
12.8 W / in3 output power density
True Hermetic Package
The ARM converters are hermetically sealed in a
rugged, low profile package utilizing copper core
pins to minimize resistive DC losses. Long term
hermeticity is assured through use of parallel seam
welded lid attachment along with Lambda
Advanced Analog's rugged ceramic pin-to-package
seal. Axial lead orentation facilitates preferred
bulkhead mounting to the principal heat-dissipating
surface.
External Inhibit Port
Externally Synchronizable
Fault Tolerant Design
5V, ±12V or 5V, ±15V Outputs Available
Manufactured in a facility fully qualified to MIL-
PRF-38534, these converters are fabricated
utilizing DESC qualified processes, and are fully
compliant to Class H while being fully processed to
the requirements of Class K. The complete suite of
PI tests have been completed including Group C
life test. Variations in electrical, mechanical and
screening specifications may be accommodated.
Contact Lambda Advanced Analog for special
requirements.
1
SPECIFICATIONS
ARM2800T
Absolute Maximum/Minimum Ratings Note 1
Input Voltage
-0.5V to 80V
Minimum Output Current
Soldering Temperature
Storage Temperature
5% of maximum rated current, any output.
300°C for 10 seconds
-65°C to +135°C
Recommended Operating Conditions Note 2
Input Voltage Range
19V to 60V
19V to 50V for full derating to MIL-STD-975
Output Power Range
3 W to 30 W
Operating Temperature
-55°C to +125ºC
-55°C to +85°C for full derating to MIL-STD-975
Electrical Performance -55°C £ TCASE £ +125°C, VIN = 28V, CL = 0 unless otherwise specified.
Limit
Min
Limit
Max
Parameter
Symbol Conditions
Units
4.95
5.05
IOUT = 1.5Adc, TC = +25°C
(main)
Output voltage accuracy
VOUT
Vdc
±11.50
±14.50
±12.50
±15.15
IOUT = ±250mAdc, TC = +25°C ARM2812(dual)
IOUT = ±250mAdc, TC = +25°C ARM2815(dual)
POUT
19 Vdc< VIN < 50Vdc
3
30
W
Output power Note 5
Output current Note 5
(main)
150
3000
IOUT
19 Vdc< VIN < 50Vdc
(dual)
mAdc
75
750
+15
-15
150 mAdc < IOUT < 3000 mAdc
19 Vdc< VIN < 50Vdc
(main)
VRLINE
mV
mV
Line regulation Note 3
Load regulation Note 4
-60
+60
±75 mAdc < IOUT < ±750 mAdc
(dual)
-180
+180
150 mAdc < IOUT < 3000 mAdc
19 Vdc< VIN < 50Vdc
(main)
VRLOAD
-300
-10
+300
+10
±75 mAdc < IOUT < ±750 mAdc
(dual)
(main)
VRCROSS
mV
V
Cross regulation Note 8
19 Vdc< VIN < 50Vdc
-500
4.8
+500
5.2
(dual)
All conditions of Line, Load,
Cross Regulation, Aging,
(main)
Total regulation
VR
Temperature and Radiation ARM*2812(dual)
ARM2815(dual)
±11.1
±13.9
±12.9
±16.0
IOUT = minimum rated, Pin 3 open
Pin 3 shorted to pin 2 (disabled)
250
Input current
IIN
VRIP
IRIP
mA
8
19 Vdc< VIN < 50Vdc
IOUT = 3000 mAdc (main), ±500 mAdc (dual)
100
mVp.p
mAp.p
Output ripple voltage Note 6
Input ripple current Note 6
19 Vdc< VIN < 50Vdc
IOUT = 3000 mAdc (main), ±500 mAdc (dual)
150
275
Switching frequency
Efficiency
FS
Sychronization input open. (pin 6)
225
80
kHz
%
Eff
IOUT = 3000 mAdc (main), ±500 mAdc (dual)
2
Electrical Performance (Continued)
Limit
MIN
Limit
MAX
Parameter
Symbol Conditions
Units
Enable Input
open circuit voltage
drive current (sink)
voltage range
19 Vdc< VIN < 50Vdc
3.0
0.1
-0.5
5.0
V
mA
V
50.0
Synchronization Input
frequency range
pulse high level
pulse low level
External clock signal on Sync. input (pin 4)
225
4.5
-0.5
40
310
10.0
0.25
Khz
V
V
V/mS
%
pulse rise time
pulse duty cycle
20
80
7.5
200
Power dissipation, load fault
PD
Short circuit, any output
W
Output response to step load
changes Notes 7, 11
10% Load to/from 50% load
-200
-200
VTLD
mVPK
50% Load to/from 100% load
10% Load to/from 50% load
200
200
Recovery time from step load
TTLD
VTLN
TTLN
changes Notes 11, 12
mS
mVPK
mS
50% Load to/from 100% load
200
350
Output response to step line
changes Notes 10, 11
IOUT = 3000 mAdc
VIN = 19 V to/from 50 V
IOUT = ±500 mAdc
(main)
-350
(dual)
-1050
1050
500
Recovery time from step line
changes Notes 10, 11,13
IOUT = 3000 mAdc
VIN = 19 V to/from 50 V
IOUT = ±500 mAdc
(main)
(dual)
500
500
(main)
Turn on overshoot
Turn on delay Note 14
Capacitive load Notes 9, 10
Isolation
VOS
TDLY
CL
IOUT = minimum and full rated
IOUT = minimum and full rated
No effect on DC performance
mV
mS
µF
(dual)
1500
20
5
(main)
(dual)
500
100
ISO
500VDC Input to Output or any pin to case
(except pin 12)
100
MW
Notes to Electrical Performance Table
1. Operation outside absolute maximum/minimum limits may cause permanent damage to the device. Extended operation at the limits may
permanently degrade performance and affect reliability.
2. Device performance specified in Electrical Performance table is guaranteed when operated within recommended limits. Operation outside
recommended limits is not specified.
3. Parameter measured from 28V to 19 V or to 50V while loads remain fixed.
4. Parameter measured from nominal to minimum or maximum load conditions while line remains fixed.
5. Up to 750 mA is available from each of the dual outputs provided the total output power does not exceed 30W.
6. Guaranteed for a bandwidth of DC to 20Mhz. Tested using a 20Khz to 2Mhz bandwidth.
7. Load current is stepped for output under test while other outputs are fixed at half rated load.
8. Load current is fixed for output under test while other output loads are varied for any combination of minimum to maximum.
9. A capacitive load of any value from 0 to the specified maximum is permitted without comprise to DC performance. A capacitive load in excess of the
maximum limit may interfere with the proper operation of the converter’s short circuit protection, causing erratic behavior during turn on.
10. Parameter is tested as part of design characterization or after design or process changes. Thereafter, parameters shall be guaranteed to the limits
specified in the table.
11. Load transient rate of change, di/dt £ 2 A/µSec.
12. Recovery time is measured from the initiation of the transient to where VOUT has returned to within ±1% of its steady state value.
13. Line transient rate of change, dv/dt £ 50 V/µSec.
14. Turn on delay time is for either a step application of input power or a logical low to high transition on the enable pin (pin 3) while power is present at
the input.
3
Group A Tests VIN = 28 Volts, CL = 0 unless otherwise specified.
Group A
Subgroups
Limit
MIN
Limit
MAX
Test
Symbol Conditions unless otherwise specified
Units
IOUT = 1.5 Adc
(main)
1, 2, 3
4.95
5.05
Output voltage accuracy
VOUT
V
IOUT = ±250mAdc
IOUT = ±250mAdc
ARM2812(dual)
ARM2815(dual)
1, 2, 3
1, 2, 3
±11.70
±14.50
±12.30
±15.15
POUT
VIN = 19 V, 28V, 50 V
1, 2, 3
1, 2, 3
3
30
W
Output power Note 1
(main)
150
3000
Output current
IOUT
VIN 19 V, 28V, 50 V
mA
(dual)
1, 2, 3
1, 2, 3
75
500
5.2
Note 1
IOUT = 150, 1500, 3000mAdc
VIN = 19 V, 28V, 50 V
(main)
4.8
VR
V
Output regulation Note 4
IOUT = ±75, ±310, ±625mAdc
IOUT = ±75, ±250, ±500mAdc
2812(dual)
2815(dual)
1, 2, 3
1, 2, 3
±11.1
±14.0
±12.9
±15.8
IOUT = minimum rated, Pin 3 open
Pin 3 shorted to pin 2 (disabled)
1, 2, 3
250
Input current
IIN
VRIP
IRIP
mA
1, 2, 3
1, 2, 3
8
VIN = 19 V, 28V, 50 V
IOUT = 3000mA main, ±500mA dual
100
mVP-P
mAP-P
Output ripple Note 2
Input ripple Note 2
VIN = 19 V, 28V, 50 V
IOUT = 3000mA main, ±500mA dual
1, 2, 3
4, 5, 6
150
275
Switching frequency
Efficiency
FS
Synchronization pin (pin 6) open
IOUT = 800mA main, ±500mA dual
225
KHz
%
Eff
1
2, 3
80
78
Power dissipation,
load fault
PD
VTL
TTL
VOS
Short circuit, any output
1, 2, 3
4, 5, 6
7.5
W
mVPK
µS
Output response to step
load changes Notes 3, 5
10% Load to/from 50% load
-200
-200
200
50% Load to/from 100% load
10% Load to/from 50% load
4, 5, 6
4, 5, 6
200
200
Recovery time from step
load changes Notes 5, 6
50% Load to/from 100% load
IOUT = minimum and full rated
IOUT = minimum and full rated
4, 5, 6
4, 5, 6
200
500
(main)
(dual)
Turn on overshoot
mV
4, 5, 6
4, 5, 6
1
1500
20
TDLY
ISO
5
mS
Turn on delay Note 7
Isolation
500VDC Input to output or any pin to case
(except pin 12)
100
MW
Notes to Group A Test Table
1. Parameter verified during dynamic load regulation tests.
2. Guaranteed for DC to 20 MHz bandwidth. Test conducted using a 20KHz to 2MHz bandwidth.
3. Load current is stepped for output under test while other outputs are fixed at half rated load.
4. Each output is measured for all combinations of line and load. Only the minimum and maximum readings for each output are recorded.
5. Load step transition time ³ 10µS.
6. Recovery time is measured from the initiation of the transient to where VOUT has returned to within ±1% of its steady state value.
7. Turn on delay time is tested by application of a logical low to high transition on the enable pin (pin 3) with power present at the input.
8. Subgroups 1 and 4 are performed at +25ºC, subgroups 2 and 5 at -55ºC and subgroups 3 and 6 at +125ºC.
4
RADIATION PERFORMANCE
The radiation tolerance characteristics inherent in
the ARM2800T converter are based in the results of
the ground-up design effort on the ART2800T
program, started with specific radiation design
goals. By imposing sufficiently large margins on
those electrical parameters subject to the degrading
effects of radiation, appropriate elements were
selected for incorporation into the ART2800T circuit.
Known radiation data was utilized for input to
PSPICE and RadSPICE in the generation of circuit
performance verification analyses. Thus, electrical
performance capability under all environmental
conditions including radiation was well understood
before first application of power to the inputs.
variations. Radiation tests on random ART2800T
manufacturing lots provide continued confirmation
of the soundness of the design goals as well as
justification for the element selection criteria.
To achieve the radiation levels specified for the
ARM2800T, the ART2800T topology is utilized as
the basis but lot assurance testing is utilized as part
of the screening process to assure the specified
level. Each ARM2800T converter is delivered with
lot test data at the hybrid level supporting the
minimum TID specification.
Other radiation
specifications are assured by design and generic
data are available on request.
The principal ART2800T design goal was a
converter topology, which because of large design
margins, had radiation performance essentially
independent of wafer-lot radiation performance
The following table specifies guaranteed minimum
radiation exposure levels tolerated while maintaining
specification limits.
Radiation Specification
Tcase = 25°C
Test
Conditions
Min
Unit
Total Ionizing Dose
MIL-STD-883, Method 1019.4
Operating bias applied during exposure
1,000
Krads
(Si)
Dose Rate
MIL-STD-883, Method 1021
Temporary Saturation
Survival
1E8
1E11
Rads
(Si)/sec
Neutron Fluence
MIL-STD-883, Method 1017.2
3E12
83
Neutron
/cm²
Heavy Ions
BNL Dual Van de Graf Generator
MeV•
(Single event effects)
cm²/mg
5
ARM2800T Physical & Interface Characteristics
Terminal Connections
Terminal #
Terminal Symbol
1
+ V input
2
Input return
3
Enable
4
Sync In
5
8
9
10
11
12
13
14
No connection
No connection
- 15 Vdc output
15 Vdc output return
+ 15 Vdc output
Chassis
+ 5 Vdc output
5 Vdc output return
Ø 0.136 - 6 Holes
0.040
Pin Dia.
6 x 0.200
= 1.200
1.675 2.200
1.950
0.375
0.263
0.138
0.300
1.400
2.400
0.150
0.275
0.240
2.700
3.25 Ref.
Max
Mounting
Plane
0.050
Flange
0.500
Max
Note:
1. Dimensions are in inches.
2. Base Plate Mounting Plane Flatness 0.003 maximum.
3. Unless otherwise specified, tolerances are
Ð = ± 2°
.XX= ± .01
.XXX
= ± .005
4. Device Weight - 120 grams maximum.
5. Materials:
Case: Cold rolled steel
Cover: Kovar
Pins: Copper cored Alloy 42 with ceramic insulators
6
Standard Process Screening for ARM2800T Series.
MIL-STD-883
Method
/HB Limits
/SF Limits
(Class K)
Requirement
Temperature Range
Element Evaluation
Non-destructive Bond Pull
Internal Visual
-55°C to +125°C
-55°C to +125°C
MIL-PRF-38534
100%
N/A
N/A
3
2023
2017
1010
2001,
2020
1015
3
Temperature Cycle
Constant Acceleration
PIND
3
Cond C
500 g
N/A
Cond A
Cond A
Burn-in
160 hrs @ 125°C 320 hrs @ 125°C
(2 × 160 hrs)
Interim Electrical @ 160 hrs
Final Electrical (Group A)
Read & Record Data
MIL-PRF-38534
& Specification
-55, +25, +125°C
-55, +25, +125°C
PDA (25°C, interim to final)
Radiographic Inspection
Seal, Fine & Gross
N/A
N/A
3
2%
2012
1014
2009
3
Cond A, C
3
External Visual
3
Standard Periodic Inspections on ARM2800T Series
As perscribed by MIL-PRF-38534 for Option 2 Plus Added Group E
Inspection
Application
Quantity
Group A
Group B
Group C
Part of Screening on Each Unit
Each Inspection Lot
100%
5 units
First Inspection Lot or
10 Units
Following Class 1 Change
Group D
Group E
In Line (Part of Element Evaluation)
TID Testing, Each Manufacturing Lot
3 Units
Part Numbering
ARM 28 15 T / SF
Model
Input Voltage
Screening Level
/SF = Flight
28 = 28V
/HB = Engineering
100 = 100V
Outputs
T = Triple
Output Voltages
15 = 5V, ± 15V
12 = 5V, ± 12V
Note: Radiation performance not specified for /HB screened device type.
7
ARM2800T Circuit Description
Figure I. ARM Block Diagram
EMI
Filter
+Vout
Dual
+Input
Under-Voltage
Detector
Return
-Vout
Dual
Primary Bias
& Reference
+5
Enable
Short
Circuit
Return
Sample
Hold
Pulse Width
Modulator
Sync
Input
Return
components, and all current paths are limited with
series resistance to limit photo currents.
Circuit Description and Application Information
The ARM2800T series of converters have been
designed using a single ended forward switched
mode converter topology. (refer to Figure I.) Single
ended topologies enjoy some advantage in radiation
hardened designs in that they eliminate the
possibility of simultaneous turn on of both switching
elements during a radiation induced upset; in
addition, single ended topologies are not subject to
transformer saturation problems often associated
with double ended implementations.
Other key circuit design features include short circuit
protection, undervoltage lockout and an external
synchronization port permitting operation at an
externally set clock rate.
Operating Guidelines
The circuit topology used for regulating output
voltages in the ARM2800T series of converters was
selected for a number of reasons. Significant
among these is the ability to simultaneously provide
adequate regulation to three output voltages while
The design incorporates an LC input filter to
attenuate input ripple current. A low overhead linear
bias regulator is used to provide bias voltage for the
converter primary control logic and a stable, well
regulated reference for the error amplifier. Output
control is realized using a wide band discrete pulse
width modulator control circuit incorporating a
unique non-linear ramp generator circuit. This
circuit helps stabilize loop gain over variations in
line voltage for superior output transient response.
Nominal conversion frequency has been selected as
250 KHz to maximize efficiency and minimize
magnetic element size.
maintaining modest circuit complexity.
These
attributes were fundamental in retaining the high
reliability and insensitivity to radiation that
characterizes device performance. Use of this
topology dictates that the user maintain a minimum
load on each output as specified in the electrical
tables. Attempts to operate the converter without a
load on any output will result in peak charging to an
output voltage well above the specified voltage
regulation limits, potentially in excess of ratings, and
should be avoided. Output loads that are less than
specification minimums will result in regulation
performance outside the limits presented in the
tables. In most practical applications, this lower
bound on the load range does not present a serious
constraint; however the user should be mindfull of
the results. Characteristic curves illustrating typical
Output voltages are sensed using a coupled
inductor and a patented magnetic feedback circuit.
This circuit is relatively insensitive to variations in
temperature, aging, radiation and manufacturing
tolerances making it particularly well suited to
radiation hardened designs. The control logic has
been designed to use only radiation tolerant
8
regulation performance are shown in Figures VII,
VIII and IX.
DT = 65 - 35 = 35°C.
From the Specification Table, the worst case full
load efficiency for this device is 80%; therefore the
maximum power dissipation at full load is given by
Thermal Considerations
The ARM series of converters is capable of
providing relatively high output power from a
package of modest volume. The power density
exhibited by these devices is obtained by combining
high circuit efficiency with effective methods of heat
1
ì
í
î
ü
( )
- 1 = 30 ´ 0.25 = 7.5W
ý
P = 30 ´
.80
þ
and the required heat sink area is
removal from the die junctions.
practices have effectively addressed
Good design
this
ü- 1.43
requirement inside the device. However when
operating at maximum loads, significant heat
generated at the die junctions must be carried away
by conduction from the base. To maintain case
temperature at or below the specified maximum of
125°C, this heat can be transferred by attachment to
an appropriate heat dissipater held in intimate
contact with the converter base-plate.
35
ì
í
î
A
HEAT SINK
=
- 5.94 = 31.8 in2
ý
þ
80 ´ 7.50.85
Thus, a total heat sink surface area (including fins, if
any) of approximately 32 in2 in this example, would
limit case rise to 35°C above ambient. A flat
aluminum plate, 0.25" thick and of approximate
dimension 4" by 4" (16 in2 per side) would suffice for
this application in a still air environment. Note that
to satisfy the criteria, both sides of the plate require
unrestricted exposure to the ambient air.
Effectiveness of this heat transfer is dependent on
the intimacy of the baseplate-heatsink interface. It
is therefore suggested that a heat-transferring
medium possessing good thermal conductivity is
Inhibiting Converter Output
inserted between the baseplate and heatsink.
A
material utilized at the factory during testing and
burn-in processes is sold under the trade name of
As an alternative to application and removal of the
DC voltage to the input, the user can control the
converter output by providing an input referenced,
TTL compatible, logic signal to the enable pin 3.
This port is internally pulled "high" so that when not
used, an open connection on the pin permits normal
converter operation. When inhibited outputs are
desired, a logical "low" on this port will shut the
converter down. An open collector device capable
of sinking at least 100 µA connected to enable pin 3
will work well in this application.
Sil-Padâ 4001.
This particular product is an
insulator but electrically conductive versions are
also available. Use of these materials assures
optimum surface contact with the heat dissipater by
compensating for minor surface variations. While
other available types of heat conducting materials
and
thermal
compounds
provide
similar
effectiveness, these alternatives are often less
convenient and are frequently messy to use.
A benefit of utilization of the enable input is that
following initial charge of the input capacitor,
subsequent turn-on commands will induce no
uncontrolled current inrush.
A conservative aid to estimating the total heat sink
surface area (AHEAT SINK) required to set the maximum
case temperature rise (DT) above ambient
temperature is given by the following expression:
ü- 1.43
DT
80P0.85
ì
í
î
Figure II. Enable Input Equivalent Circuit
A
HEAT SINK
»
- 5.94
ý
þ
Vin
where
DT = Case temperature rise above ambient
5K
2N2907A
ì
í
î
ü
1
64K
P = Device dissipation in Watts = POUT
- 1
ý
150K
150K
Enable
Input
5.6 V
2N2222A
2N2222A
Eff
þ
186K
150K
As an example, assume that it is desired to maintain
the case temperature of an ARM2815T at +65°C or
less while operating in an open area whose ambient
temperature does not exceed +35°C; then
Input
Return
Converter inhibit is initiated when
this transistor is turned off
1
Sil-Pad is a registered Trade Mark of Bergquist, Minneapolis, MN
9
converter will resume normal operation. The effect
is that during a shorted condition, a series of narrow
pulses are generated at approximately 5% duty
cycle which periodically sample the state of the
load. Thus device power dissipation is greatly
reduced during this mode of operation.
Synchronization
When using
requirements may dictate operating several
converters at a common system frequency. To
accommodate this requirement, the ARM2800T type
converter provides a synchronization input port (pin
4). Circuit topology is as illustrated in Figure III.
multiple
converters,
system
Parallel Operation
Although no special provision for forced current
sharing has been incorporated in the ARM2800T
series, multiple units may be operated in parallel for
increased output power applications. The 5 volt
outputs will typically share to within approximately
10% of their full load capability and the dual (±15
volt) outputs will typically share to within 50% of
their full load. Load sharing is a function of the
individual impedance of each output and the
converter with the highest nominal set voltage will
furnish the predominant load current.
The sync input port permits synchronization of an
ARM converter to any compatible external
frequency source operating in the band of 225 to
310 KHz.
The synchronization input is edge
triggered with synchronization initiated on the
negative transition. This input signal should be a
negative going pulse referenced to the input return
and have a 20% to 80% duty cycle. Compatibility
requires the negative transition time to be less than
100 ns with a minimum pulse amplitude of +4.25
volts referred to the input return. In the event of
failure of an external synchronization source, the
converter will revert to its own internally set
frequency. When external synchronization is not
desired, the sync in port may be left open
(unconnected) permitting the converter to operate at
its' own internally set frequency.
Input Undervoltage Protection
A minimum voltage is required at the input of the
converter to initiate operation. This voltage is set to
a nominal value of 16.8 volts. To preclude the
possibility of noise or other variations at the input
falsely initiating and halting converter operation, a
hysteresis of approximately 1.0 volts is incorporated
in this circuit. The converter is guaranteed to
operate at 19 Volts input under all specified
conditions.
Figure III. Synchronization Input Equivalent Circuit
+10V
5K
Input Filter
Sync
Input
2N2907A
To attenuate input ripple current, the ARM2800T
series converters incorporate a single stage LC
input filter. The elements of this filter comprise the
dominant input load impedance characteristic, and
therefore determine the nature of the current inrush
at turn-on. The input filter circuit elements are as
shown in Figure IV.
47pf
5K
Input
Return
Figure IV. Input Filter Circuit
10
W
Output Short Circuit Protection
+ Input
Protection against accidental short circuits on any
output is provided in the ARM2800T converters.
This protection is implemented by sensing primary
switching current and, when an over-current
condition is detected, switching action is terminated
and a restart cycle is initiated. If the short circuit
condition has not been cleared by the time the
restart cycle has completed, another restart cycle is
initiated. The sequence will repeat until the short
circuit condition is cleared at which time the
3.6 µH
5.4 µfd
Input
Return
10
Additional Filtering
It is important to be aware that when filtering high
frequency noise, parasitic circuit elements can
easily dominate filter performance. Therefore, it is
incumbent on the designer to exercise care when
preparing a circuit layout for such devices. Wire
runs and lengths should be minimized, high
frequency loops should be avoided and careful
attention paid to the construction details of magnetic
Although internal filtering is provided at both the
input and output terminals of the ARM2800 series,
additional filtering may be desirable in some
applications to accommodate more stringent system
requirements.
While the internal input filter of Figure IV keeps
input ripple current below 100 mAp-p, an external
filter is available that will further attenuate this ripple
content to a level below the CE03 limits imposed by
MIL-STD-461B. Figure V is a general diagram of
the Lambda Advanced Analog ARF461 filter module
designed to operate in conjunction with the
ARM2800 series converters to provide that
attenuation.
circuit elements.
Tight magnetic coupling will
improve overall magnetic performance and reduce
stray magnetic fields.
Figure VI. External Output Filter
L1
+5 V
+5V Out
L3
C1
C2
C6
Figure V. ARF461 Input EMI Filter
5V
+5V
Return
Return
L2
L4
+15V
Out
+15V
C3
C7
C8
15V
Return
15V
Return
C4
C5
This circuit as shown in Figure V is constructed
using the same quality materials and processes as
those employed in the ARM2800 series converters
and is intended for use in the same environments.
This filter is fabricated in a complementary package
style whose output pin configuration allows pin to pin
connection between the filter and the converter.
More complete information on this filter can be
obtained from the ARF461 data sheet.
-15V
Out
-15V
L1
L2
L3
L4
7 turns AWG21 bifilar on Mag Inc. core PN YJ-41305-TC or equivalent.
7 turns AWG24 trifilar on Mag Inc. core PN YJ-41305-TC or equivalent.
4 turns AWG21 on Mag Inc. core PN MPP55048 or equivalent.
5 turns AWG21 bifilar on Mag Inc. core PN MPP55048 or equivalent.
C1-C5 2200pF type CKR ceramic capacitor.
C6 170µF, 15V M39006/22-0514 Tantalum.
C7, C8 25µF, 50V M39006/22-0568 Tantalum.
Measurement techniques play a significant role on
results.
All noise measurements should be
An external filter may also be added to the output
where circuit requirements dictate extremely low
output ripple noise. The output filter described by
Figure VI has been characterized with the
ARM2815T using the values shown in the
associated material list.
measured with test leads as close to the device
output pins and as short as physically possible.
Probe ground should be minimum length.
11
Performance Characteristics (Typical @ 25°C)
Figure VII. Efficiency vs Output Power
for Three Line Voltages.
85
80
75
70
18V
65
60
55
50
28V
50V
0
5
10
15
20
25
30
35
Output Power (Watts)
Figure VIII. 5 V Output Regulation Limits
Including all conditions of Line, Load and Cross Regulation.
5.2
5.1
5.0
4.9
4.8
4.7
Upper Limit
Lower Limit
0.0
0.5
1.0
1.5
2.0
2.5
3.0
Output Current (Amps)
Figure IX. ±15 V Regulation Curves
For three conditions of Load on the 5 Volt Output.
17.0
16.0
15.0
14.0
5V Load = 3.0A
5V Load = 1.5A
5V Load = 150 mA
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
Output Current (Each Output)
12
Figure X.
Cross Regulation Curves.
5 Volt Output as a function of 15 Volt Load Current for Three 5 Volt Loads.
5.2
5.1
5.0
4.9
4.8
4.7
4.6
5V Load = 150mA
5V Load = 1.5A
5V Load = 3.0A
4.5
0
0.1
0.2
0.3
0.4
0.5
0.6
±15 Volt Load Current
13
The information in this data sheet has been carefully checked and is believed to be accurate; however no
responsibility is assumed for possible errors. These specifications are subject to change without notice.
Ó
Lambda Advanced Analog
0027
2270 Martin Avenue
Santa Clara CA 95050-2781
(408) 988-4930 FAX (408) 988-2702
MIL-PRF-38534 Qualified
ISO9001 Registered
l
LAMBDA ADVANCED ANALOG INC.
14
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