BSC072N04LD [INFINEON]
OptiMOS™ power transistor 40V;
| 型号： | BSC072N04LD |
| 厂家： | 
Infineon |
| 描述： | OptiMOS™ power transistor 40V 开关 脉冲 光电二极管 晶体管 |
| 文件： | 总10页 (文件大小：1132K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
BSC072N04LD
MOSFET
OptiMOSTM-T2ꢀPowerꢀTransistor,ꢀ40ꢀV
PG-TDSON-8-4
8
4
1
7
6
5
2
Features
·ꢀDualꢀN-channel,ꢀlogicꢀlevel
3
4
·ꢀFastꢀswitchingꢀMOSFETsꢀforꢀSMPS
·ꢀOptimizedꢀtechnologyꢀforꢀSynchronousꢀRectification
·ꢀPb-freeꢀplating;ꢀRoHSꢀcompliant
·ꢀ100%ꢀAvalancheꢀtested
·ꢀHalogen-freeꢀaccordingꢀtoꢀIEC61249-2-21
·ꢀSuperiorꢀthermalꢀresistance
1
8
7
6
2
3
5
ProductꢀValidation
Qualifiedꢀforꢀindustrialꢀapplicationsꢀaccordingꢀtoꢀtheꢀrelevantꢀtestsꢀof
JEDEC47/20/22
D1 D1 D2 D2
Tableꢀ1ꢀꢀꢀꢀꢀKeyꢀPerformanceꢀParameters
Parameter
Value
Unit
VDS
40
V
S1 G1 S2 G2
RDS(on),max
ID
7.2
mΩ
A
20
Typeꢀ/ꢀOrderingꢀCode
Package
SSO8 dual (TDSON-8-4)
Marking
RelatedꢀLinks
BSC072N04LD
072N04LD
-
Final Data Sheet
1
Rev.ꢀ2.0,ꢀꢀ2018-12-11
OptiMOSTM-T2ꢀPowerꢀTransistor,ꢀ40ꢀV
BSC072N04LD
TableꢀofꢀContents
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Final Data Sheet
2
Rev.ꢀ2.0,ꢀꢀ2018-12-11
OptiMOSTM-T2ꢀPowerꢀTransistor,ꢀ40ꢀV
BSC072N04LD
1ꢀꢀꢀꢀꢀMaximumꢀratings
atꢀTA=25ꢀ°C,ꢀunlessꢀotherwiseꢀspecified,ꢀoneꢀtransistorꢀactive
Tableꢀ2ꢀꢀꢀꢀꢀMaximumꢀratings
Values
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Typ.
Max.
20
Continuous drain current
Pulsed drain current1)
Avalanche energy, single pulse2)
Gate source voltage
ID
-
-
-
-
-
-
A
VGS=10ꢀV,ꢀTC=25ꢀ°C
TA=25ꢀ°C
ID,pulse
EAS
VGS
Ptot
-
80
A
-
87
mJ
V
ID=10ꢀA,ꢀRGS=25ꢀΩ
-
-16
-
16
Power dissipation
65
W
TC=25ꢀ°C
IEC climatic category; DIN IEC 68-1:
55/175/56
Operating and storage temperature
Tj,ꢀTstg
-55
-
175
°C
2ꢀꢀꢀꢀꢀThermalꢀcharacteristics
Tableꢀ3ꢀꢀꢀꢀꢀThermalꢀcharacteristics
Values
Typ.
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Thermal resistance, junction - case,
bottom
RthJC
RthJA
RthJA
-
-
-
-
2.3
°C/W -
°C/W -
°C/W -
Device on PCB,
-
-
60
6 cm² cooling area3)
Device on PCB,
100
minimal footprint4)
3ꢀꢀꢀꢀꢀElectricalꢀcharacteristics
atꢀTj=25ꢀ°C,ꢀunlessꢀotherwiseꢀspecified
Tableꢀ4ꢀꢀꢀꢀꢀStaticꢀcharacteristics
Values
Typ.
-
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
40
Max.
-
Drain-source breakdown voltage
Gate threshold voltage
V(BR)DSS
VGS(th)
V
V
VGS=0ꢀV,ꢀID=1ꢀmA
VDS=VGS,ꢀID=30ꢀµA
1.2
1.7
2.2
-
-
0.1
10
1
100
VDS=40ꢀV,ꢀVGS=0ꢀV,ꢀTj=25ꢀ°C
VDS=40ꢀV,ꢀVGS=0ꢀV,ꢀTj=125ꢀ°C
Zero gate voltage drain current
Gate-source leakage current
Drain-source on-state resistance
IDSS
µA
nA
IGSS
-
-
100
VGS=20ꢀV,ꢀVDS=0ꢀV
-
-
6.5
8.0
7.2
9.2
VGS=10ꢀV,ꢀID=17ꢀA
VGS=4.5ꢀV,ꢀID=10ꢀA
RDS(on)
mΩ
1) See Diagram 3 for more detailed information
2) See Diagram 13 for more detailed information
3) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection.
PCB is vertical in still air.
4) device mounted on a minimum pad (one layer, 70 µm thick)
Final Data Sheet
3
Rev.ꢀ2.0,ꢀꢀ2018-12-11
OptiMOSTM-T2ꢀPowerꢀTransistor,ꢀ40ꢀV
BSC072N04LD
Tableꢀ5ꢀꢀꢀꢀꢀDynamicꢀcharacteristics
Values
Typ.
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Input capacitance1)
Output capacitance1)
Reverse transfer capacitance1)
Ciss
Coss
Crss
-
-
-
3070 3990 pF
VGS=0ꢀV,ꢀVDS=20ꢀV,ꢀf=1ꢀMHz
VGS=0ꢀV,ꢀVDS=20ꢀV,ꢀf=1ꢀMHz
VGS=0ꢀV,ꢀVDS=20ꢀV,ꢀf=1ꢀMHz
680
36
880
72
pF
pF
VDD=20ꢀV,ꢀVGS=10ꢀV,ꢀID=20ꢀA,
RG,ext=11ꢀΩ
Turn-on delay time
Rise time
td(on)
tr
td(off)
tf
-
-
-
-
9
-
-
-
-
ns
ns
ns
ns
VDD=20ꢀV,ꢀVGS=10ꢀV,ꢀID=20ꢀA,
RG,ext=11ꢀΩ
4
VDD=20ꢀV,ꢀVGS=10ꢀV,ꢀID=20ꢀA,
RG,ext=11ꢀΩ
Turn-off delay time
Fall time
50
25
VDD=20ꢀV,ꢀVGS=10ꢀV,ꢀID=20ꢀA,
RG,ext=11ꢀΩ
Tableꢀ6ꢀꢀꢀꢀꢀGateꢀchargeꢀcharacteristics2)ꢀ
Values
Typ.
9
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
13
Gate to source charge
Gate to drain charge
Gate charge total1)
Qgs
-
-
-
-
nC
nC
nC
V
VDD=20ꢀV,ꢀID=20ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV
VDD=20ꢀV,ꢀID=20ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV
VDD=20ꢀV,ꢀID=20ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV
VDD=20ꢀV,ꢀID=20ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV
Qgd
4.1
8.2
52
Qg
39
Gate plateau voltage
Vplateau
3.1
-
Tableꢀ7ꢀꢀꢀꢀꢀReverseꢀdiode
Values
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Typ.
-
Max.
20
80
1.1
-
Diode continuous forward current
Diode pulse current
IS
-
-
-
-
-
A
TC=25ꢀ°C
IS,pulse
VSD
trr
-
A
TC=25ꢀ°C
Diode forward voltage
0.85
35
35
V
VGS=0ꢀV,ꢀIF=17ꢀA,ꢀTj=25ꢀ°C
VR=15ꢀV,ꢀIF=9ꢀA,ꢀdiF/dt=100ꢀA/µs
VR=15ꢀV,ꢀIF=9ꢀA,ꢀdiF/dt=100ꢀA/µs
Reverse recovery time1)
Reverse recovery charge1)
ns
nC
Qrr
-
1) Defined by design. Not subject to production test.
2) See ″Gate charge waveforms″ for parameter definition
Final Data Sheet
4
Rev.ꢀ2.0,ꢀꢀ2018-12-11
OptiMOSTM-T2ꢀPowerꢀTransistor,ꢀ40ꢀV
BSC072N04LD
4ꢀꢀꢀꢀꢀElectricalꢀcharacteristicsꢀdiagrams
Diagramꢀ1:ꢀPowerꢀdissipation
Diagramꢀ2:ꢀDrainꢀcurrent
70
80
70
60
50
40
30
20
10
0
silicon limit
60
50
40
30
20
10
0
package limit
0
25
50
75
100
125
150
175
200
0
25
50
75
100
125
150
175
200
TAꢀ[°C]
TAꢀ[°C]
Ptot=f(TA),ꢀminimalꢀfootprint
ID=f(TA);ꢀminimalꢀfootprint
Diagramꢀ3:ꢀSafeꢀoperatingꢀarea
Diagramꢀ4:ꢀMax.ꢀtransientꢀthermalꢀimpedance
102
101
single pulse
0.01
0.02
1 µs
10 µs
100 µs
0.05
0.1
10 ms
0.2
0.5
DC
1 ms
101
100
10-1
10-2
100
10-1
10-1
100
101
102
10-5
10-4
10-3
10-2
10-1
100
VDSꢀ[V]
tpꢀ[s]
ID=f(VDS);ꢀTC=25ꢀ°C;ꢀD=0;ꢀparameter:ꢀtp
ZthJC=f(tp);ꢀparameter:ꢀD=tp/T
Final Data Sheet
5
Rev.ꢀ2.0,ꢀꢀ2018-12-11
OptiMOSTM-T2ꢀPowerꢀTransistor,ꢀ40ꢀV
BSC072N04LD
Diagramꢀ5:ꢀTyp.ꢀoutputꢀcharacteristics
Diagramꢀ6:ꢀTyp.ꢀdrain-sourceꢀonꢀresistance
80
40
4 V
3.5 V
70
60
50
40
30
20
10
0
4.5 V
10 V
30
3.5 V
4 V
3 V
20
10
4.5 V
10 V
3 V
0
0.0
1.0
2.0
3.0
4.0
0
10
20
30
40
50
60
70
80
VDSꢀ[V]
IDꢀ[A]
ID=f(VDS),ꢀTj=25ꢀ°C;ꢀparameter:ꢀVGS
RDS(on)=f(ID),ꢀTj=25ꢀ°C;ꢀparameter:ꢀVGS
Diagramꢀ7:ꢀTyp.ꢀtransferꢀcharacteristics
Diagramꢀ8:ꢀTyp.ꢀdrain-sourceꢀonꢀresistance
80
20.0
70
60
50
40
30
17.5
15.0
12.5
175 °C
10.0
7.5
5.0
2.5
0.0
25 °C
20
175 °C
10
0
25 °C
0
1
2
3
4
5
0
2
4
6
8
10
VGSꢀ[V]
VGSꢀ[V]
ID=f(VGS),ꢀ|VDS|>2|ID|RDS(on)max;ꢀparameter:ꢀTj
RDS(on)=f(VGS),ꢀID=17ꢀA;ꢀparameter:ꢀTj
Final Data Sheet
6
Rev.ꢀ2.0,ꢀꢀ2018-12-11
OptiMOSTM-T2ꢀPowerꢀTransistor,ꢀ40ꢀV
BSC072N04LD
Diagramꢀ9:ꢀNormalizedꢀdrain-sourceꢀonꢀresistance
Diagramꢀ10:ꢀTyp.ꢀgateꢀthresholdꢀvoltage
1.75
2.00
1.75
1.50
1.25
1.00
0.75
0.50
0.25
0.00
1.50
1.25
1.00
0.75
0.50
0.25
0.00
300 µA
30 µA
-80
-40
0
40
80
120
160
200
-80
-40
0
40
80
120
160
200
Tjꢀ[°C]
Tjꢀ[°C]
RDS(on)=f(Tj),ꢀID=17ꢀA,ꢀVGS=10ꢀV
VGS(th=f(Tj),ꢀVGS=VDS;ꢀparameter:ꢀID
Diagramꢀ11:ꢀTyp.ꢀcapacitances
Diagramꢀ12:ꢀForwardꢀcharacteristicsꢀofꢀreverseꢀdiode
104
102
25 °C
25 °C, max
175 °C
175 °C, max
Ciss
103
102
101
101
Coss
100
Crss
40
10-1
0
5
10
15
20
25
30
35
0.00
0.25
0.50
0.75
1.00
1.25
1.50
VDSꢀ[V]
VSDꢀ[V]
C=f(VDS);ꢀVGS=0ꢀV;ꢀf=1ꢀMHz
IF=f(VSD);ꢀparameter:ꢀTj
Final Data Sheet
7
Rev.ꢀ2.0,ꢀꢀ2018-12-11
OptiMOSTM-T2ꢀPowerꢀTransistor,ꢀ40ꢀV
BSC072N04LD
Diagramꢀ13:ꢀAvalancheꢀcharacteristics
Diagramꢀ14:ꢀTyp.ꢀgateꢀcharge
102
10
8 V
20 V
32 V
8
6
4
2
0
101
25 °C
100 °C
100
150 °C
10-1
100
101
102
103
0
5
10
15
20
25
30
35
40
tAVꢀ[µs]
Qgateꢀ[nC]
IAS=f(tAV);ꢀRGS=25ꢀΩ;ꢀparameter:ꢀTj,start
VGS=f(Qgate),ꢀID=20ꢀAꢀpulsed,ꢀTj=25ꢀ°C;ꢀparameter:ꢀVDD
Diagramꢀ15:ꢀDrain-sourceꢀbreakdownꢀvoltage
Diagram Gate charge waveforms
44
43
42
41
40
39
38
-80
-40
0
40
80
120
160
200
Tjꢀ[°C]
VBR(DSS)=f(Tj);ꢀID=1ꢀmA
Final Data Sheet
8
Rev.ꢀ2.0,ꢀꢀ2018-12-11
OptiMOSTM-T2ꢀPowerꢀTransistor,ꢀ40ꢀV
BSC072N04LD
5ꢀꢀꢀꢀꢀPackageꢀOutlines
MILLIMETERS
DIMENSIONS
MIN.
0.90
0.15
0.34
0.02
4.95
4.20
0.50
5.95
5.70
4.075
4.035
0.15
MAX.
1.10
0.35
0.54
0.22
5.35
4.40
0.70
6.35
6.10
4.275
4.235
0.35
DOCUMENT NO.
Z8B00189767
A
A1
b
REVISION
01
b1
D
D1
D2
E
SCALE 5:1
4mm
0
1
2
3
E1
E2
E3
E4
e
EUROPEAN PROJECTION
1.27
L
0.45
0.45
8.5°
0.65
0.65
M
Θ
11.5°
ISSUE DATE
31.07.2018
aaa
ddd
0.05
0.10
Figureꢀ1ꢀꢀꢀꢀꢀOutlineꢀSSO8ꢀdualꢀ(TDSON-8-4),ꢀdimensionsꢀinꢀmm
Final Data Sheet
9
Rev.ꢀ2.0,ꢀꢀ2018-12-11
OptiMOSTM-T2ꢀPowerꢀTransistor,ꢀ40ꢀV
BSC072N04LD
RevisionꢀHistory
BSC072N04LD
Revision:ꢀ2018-12-11,ꢀRev.ꢀ2.0
Previous Revision
Revision Date
Subjects (major changes since last revision)
Release of final version
2.0
2018-12-11
Trademarks
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automotive,ꢀaviationꢀandꢀaerospaceꢀapplicationsꢀorꢀsystemsꢀonlyꢀwithꢀtheꢀexpressꢀwrittenꢀapprovalꢀofꢀInfineonꢀTechnologies,ꢀifꢀa
failureꢀofꢀsuchꢀcomponentsꢀcanꢀreasonablyꢀbeꢀexpectedꢀtoꢀcauseꢀtheꢀfailureꢀofꢀthatꢀlife-support,ꢀautomotive,ꢀaviationꢀand
aerospaceꢀdeviceꢀorꢀsystemꢀorꢀtoꢀaffectꢀtheꢀsafetyꢀorꢀeffectivenessꢀofꢀthatꢀdeviceꢀorꢀsystem.ꢀLifeꢀsupportꢀdevicesꢀorꢀsystemsꢀare
intendedꢀtoꢀbeꢀimplantedꢀinꢀtheꢀhumanꢀbodyꢀorꢀtoꢀsupportꢀand/orꢀmaintainꢀandꢀsustainꢀand/orꢀprotectꢀhumanꢀlife.ꢀIfꢀtheyꢀfail,ꢀitꢀis
reasonableꢀtoꢀassumeꢀthatꢀtheꢀhealthꢀofꢀtheꢀuserꢀorꢀotherꢀpersonsꢀmayꢀbeꢀendangered.
Final Data Sheet
10
Rev.ꢀ2.0,ꢀꢀ2018-12-11
相关型号：
BSC072N08NS5
OptiMOS™ 5 80 V power MOSFET, especially designed for Synchronous Rectification for telecom and server power supplies. In addition, the device can also be utilized in other industrial applications such as solar, low voltage drives and adapter. Within seven different packages, the OptiMOS™ 5 80 V MOSFETs offer the industry’s lowest RDS(on). Additionally, compared to the previous generation, OptiMOS™ 5 80 V has an RDS(on) reduction of up to 43%.
INFINEON
BSC074N15NS5
Infineon's OptiMOS™ MOSFETs in SuperSO8 package extend OptiMOS™ 3 and 5 product portfolio and enable higher power density in addition to improved robustness, responding to the need for lower system cost and increased performance.
INFINEON
BSC076N06NS3 G
OptiMOS ™ 60V 是交换模式电源 (SMPS)中的同步整流的理想之选，例如服务器和台式机以及平板电脑充电器中的电源。此外，这些器件可用于电机控制、太阳能微逆变器和快速开关直流-直流转换器等广泛工业应用。
INFINEON
BSC076N06NS3GATMA1
Power Field-Effect Transistor, 14A I(D), 60V, 0.0076ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, GREEN, PLASTIC, TDSON-8
INFINEON
BSC077N12NS3 G
120V OptiMOS™ 系列提供业内最低导通电阻和最快开关性能，适用于各种应用，支持实现卓越性能。120V OptiMOS™ 技术带来全新可能性，帮助实现优化解决方案。
INFINEON
BSC077N12NS3GATMA1
Power Field-Effect Transistor, 13.4A I(D), 120V, 0.0077ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, GREEN, PLASTIC, TDSON-8
INFINEON
BSC077N12NS3GXT
Power Field-Effect Transistor, 13.4A I(D), 120V, 0.0077ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, GREEN, PLASTIC, TDSON-8
INFINEON
BSC079N03LSCGATMA1
Power Field-Effect Transistor, 14A I(D), 30V, 0.0127ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, GREEN, PLASTIC, TDSON-8
INFINEON
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